1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2018 NXP 4 */ 5 6 #ifndef __ASM_ARCH_IMX8_IOMUX_H__ 7 #define __ASM_ARCH_IMX8_IOMUX_H__ 8 9 #ifndef __ASSEMBLY__ 10 #include <linux/bitops.h> 11 #endif 12 13 /* 14 * We use 64bits value for iomux settings. 15 * High 32bits are used for padring register value, 16 * low 16bits are used for pin index. 17 */ 18 typedef u64 iomux_cfg_t; 19 20 #define PADRING_IFMUX_EN_SHIFT 31 21 #define PADRING_IFMUX_EN_MASK BIT(31) 22 #define PADRING_GP_EN_SHIFT 30 23 #define PADRING_GP_EN_MASK BIT(30) 24 #define PADRING_IFMUX_SHIFT 27 25 #define PADRING_IFMUX_MASK GENMASK(29, 27) 26 #define PADRING_CONFIG_SHIFT 25 27 #define PADRING_LPCONFIG_SHIFT 23 28 #define PADRING_PULL_SHIFT 5 29 #define PADRING_DSE_SHIFT 0 30 31 #define MUX_PAD_CTRL_SHIFT 32 32 #define MUX_PAD_CTRL_MASK ((iomux_cfg_t)0xFFFFFFFF << MUX_PAD_CTRL_SHIFT) 33 #define MUX_PAD_CTRL(x) ((iomux_cfg_t)(x) << MUX_PAD_CTRL_SHIFT) 34 #define MUX_MODE_SHIFT (PADRING_IFMUX_SHIFT + MUX_PAD_CTRL_SHIFT) 35 #define MUX_MODE_MASK ((iomux_cfg_t)0x7 << MUX_MODE_SHIFT) 36 #define PIN_ID_MASK ((iomux_cfg_t)0xFFFF) 37 38 /* Valid mux alt0 to alt7 */ 39 #define MUX_MODE_ALT(x) (((iomux_cfg_t)(x) << MUX_MODE_SHIFT) & \ 40 MUX_MODE_MASK) 41 42 void imx8_iomux_setup_pad(iomux_cfg_t pad); 43 void imx8_iomux_setup_multiple_pads(iomux_cfg_t const *pad_list, u32 count); 44 #endif /* __ASM_ARCH_IMX8_IOMUX_H__ */ 45