1/dts-v1/; 2 3#include <dt-bindings/gpio/gpio.h> 4#include <dt-bindings/gpio/sandbox-gpio.h> 5#include <dt-bindings/input/input.h> 6#include <dt-bindings/pinctrl/sandbox-pinmux.h> 7#include <dt-bindings/mux/mux.h> 8 9/ { 10 model = "sandbox"; 11 compatible = "sandbox"; 12 #address-cells = <1>; 13 #size-cells = <1>; 14 15 aliases { 16 console = &uart0; 17 ethernet0 = "/eth@10002000"; 18 ethernet2 = &swp_0; 19 ethernet3 = ð_3; 20 ethernet4 = &dsa_eth0; 21 ethernet5 = ð_5; 22 gpio1 = &gpio_a; 23 gpio2 = &gpio_b; 24 gpio3 = &gpio_c; 25 i2c0 = "/i2c@0"; 26 mmc0 = "/mmc0"; 27 mmc1 = "/mmc1"; 28 pci0 = &pci0; 29 pci1 = &pci1; 30 pci2 = &pci2; 31 remoteproc0 = &rproc_1; 32 remoteproc1 = &rproc_2; 33 rtc0 = &rtc_0; 34 rtc1 = &rtc_1; 35 spi0 = "/spi@0"; 36 testfdt6 = "/e-test"; 37 testbus3 = "/some-bus"; 38 testfdt0 = "/some-bus/c-test@0"; 39 testfdt12 = "/some-bus/c-test@1"; 40 testfdt3 = "/b-test"; 41 testfdt5 = "/some-bus/c-test@5"; 42 testfdt8 = "/a-test"; 43 testfdtm1 = &testfdtm1; 44 fdt-dummy0 = "/translation-test@8000/dev@0,0"; 45 fdt-dummy1 = "/translation-test@8000/dev@1,100"; 46 fdt-dummy2 = "/translation-test@8000/dev@2,200"; 47 fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42"; 48 usb0 = &usb_0; 49 usb1 = &usb_1; 50 usb2 = &usb_2; 51 axi0 = &axi; 52 osd0 = "/osd"; 53 }; 54 55 config { 56 environment { 57 from_fdt = "yes"; 58 fdt_env_path = ""; 59 }; 60 }; 61 62 audio: audio-codec { 63 compatible = "sandbox,audio-codec"; 64 #sound-dai-cells = <1>; 65 }; 66 67 buttons { 68 compatible = "gpio-keys"; 69 70 btn1 { 71 gpios = <&gpio_a 3 0>; 72 label = "button1"; 73 }; 74 75 btn2 { 76 gpios = <&gpio_a 4 0>; 77 label = "button2"; 78 }; 79 }; 80 81 buttons2 { 82 compatible = "adc-keys"; 83 io-channels = <&adc 3>; 84 keyup-threshold-microvolt = <3000000>; 85 86 button-up { 87 label = "button3"; 88 linux,code = <KEY_F3>; 89 press-threshold-microvolt = <1500000>; 90 }; 91 92 button-down { 93 label = "button4"; 94 linux,code = <KEY_F4>; 95 press-threshold-microvolt = <1000000>; 96 }; 97 98 button-enter { 99 label = "button5"; 100 linux,code = <KEY_F5>; 101 press-threshold-microvolt = <500000>; 102 }; 103 }; 104 105 cros_ec: cros-ec { 106 reg = <0 0>; 107 compatible = "google,cros-ec-sandbox"; 108 109 /* 110 * This describes the flash memory within the EC. Note 111 * that the STM32L flash erases to 0, not 0xff. 112 */ 113 flash { 114 image-pos = <0x08000000>; 115 size = <0x20000>; 116 erase-value = <0>; 117 118 /* Information for sandbox */ 119 ro { 120 image-pos = <0>; 121 size = <0xf000>; 122 }; 123 wp-ro { 124 image-pos = <0xf000>; 125 size = <0x1000>; 126 used = <0x884>; 127 compress = "lz4"; 128 uncomp-size = <0xcf8>; 129 hash { 130 algo = "sha256"; 131 value = [00 01 02 03 04 05 06 07 132 08 09 0a 0b 0c 0d 0e 0f 133 10 11 12 13 14 15 16 17 134 18 19 1a 1b 1c 1d 1e 1f]; 135 }; 136 }; 137 rw { 138 image-pos = <0x10000>; 139 size = <0x10000>; 140 }; 141 }; 142 }; 143 144 dsi_host: dsi_host { 145 compatible = "sandbox,dsi-host"; 146 }; 147 148 a-test { 149 reg = <0 1>; 150 compatible = "denx,u-boot-fdt-test"; 151 ping-expect = <0>; 152 ping-add = <0>; 153 u-boot,dm-pre-reloc; 154 test-gpios = <&gpio_a 1>, <&gpio_a 4>, 155 <&gpio_b 5 GPIO_ACTIVE_HIGH 3 2 1>, 156 <0>, <&gpio_a 12>; 157 test2-gpios = <&gpio_a 1>, <&gpio_a 4>, 158 <&gpio_b 6 GPIO_ACTIVE_LOW 3 2 1>, 159 <&gpio_b 7 GPIO_IN 3 2 1>, 160 <&gpio_b 8 GPIO_OUT 3 2 1>, 161 <&gpio_b 9 (GPIO_OUT|GPIO_OUT_ACTIVE) 3 2 1>; 162 test3-gpios = 163 <&gpio_c 0 (GPIO_OUT|GPIO_OPEN_DRAIN)>, 164 <&gpio_c 1 (GPIO_OUT|GPIO_OPEN_SOURCE)>, 165 <&gpio_c 2 GPIO_OUT>, 166 <&gpio_c 3 (GPIO_IN|GPIO_PULL_UP)>, 167 <&gpio_c 4 (GPIO_IN|GPIO_PULL_DOWN)>, 168 <&gpio_c 5 GPIO_IN>, 169 <&gpio_c 6 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_DRAIN)>, 170 <&gpio_c 7 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_SOURCE)>; 171 test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>; 172 test5-gpios = <&gpio_a 19>; 173 174 int-value = <1234>; 175 uint-value = <(-1234)>; 176 int64-value = /bits/ 64 <0x1111222233334444>; 177 int-array = <5678 9123 4567>; 178 str-value = "test string"; 179 interrupts-extended = <&irq 3 0>; 180 acpi,name = "GHIJ"; 181 phandle-value = <&gpio_c 10>, <0xFFFFFFFF 20>, <&gpio_a 30>; 182 183 mux-controls = <&muxcontroller0 0>, <&muxcontroller0 1>, 184 <&muxcontroller0 2>, <&muxcontroller0 3>, 185 <&muxcontroller1>; 186 mux-control-names = "mux0", "mux1", "mux2", "mux3", "mux4"; 187 mux-syscon = <&syscon3>; 188 display-timings { 189 timing0: 240x320 { 190 clock-frequency = <6500000>; 191 hactive = <240>; 192 vactive = <320>; 193 hfront-porch = <6>; 194 hback-porch = <7>; 195 hsync-len = <1>; 196 vback-porch = <5>; 197 vfront-porch = <8>; 198 vsync-len = <2>; 199 hsync-active = <1>; 200 vsync-active = <0>; 201 de-active = <1>; 202 pixelclk-active = <1>; 203 interlaced; 204 doublescan; 205 doubleclk; 206 }; 207 timing1: 480x800 { 208 clock-frequency = <9000000>; 209 hactive = <480>; 210 vactive = <800>; 211 hfront-porch = <10>; 212 hback-porch = <59>; 213 hsync-len = <12>; 214 vback-porch = <15>; 215 vfront-porch = <17>; 216 vsync-len = <16>; 217 hsync-active = <0>; 218 vsync-active = <1>; 219 de-active = <0>; 220 pixelclk-active = <0>; 221 }; 222 timing2: 800x480 { 223 clock-frequency = <33500000>; 224 hactive = <800>; 225 vactive = <480>; 226 hback-porch = <89>; 227 hfront-porch = <164>; 228 vback-porch = <23>; 229 vfront-porch = <10>; 230 hsync-len = <11>; 231 vsync-len = <13>; 232 }; 233 }; 234 }; 235 236 junk { 237 reg = <1 1>; 238 compatible = "not,compatible"; 239 }; 240 241 no-compatible { 242 reg = <2 1>; 243 }; 244 245 backlight: backlight { 246 compatible = "pwm-backlight"; 247 enable-gpios = <&gpio_a 1>; 248 power-supply = <&ldo_1>; 249 pwms = <&pwm 0 1000>; 250 default-brightness-level = <5>; 251 brightness-levels = <0 16 32 64 128 170 202 234 255>; 252 }; 253 254 bind-test { 255 compatible = "simple-bus"; 256 bind-test-child1 { 257 compatible = "sandbox,phy"; 258 #phy-cells = <1>; 259 }; 260 261 bind-test-child2 { 262 compatible = "simple-bus"; 263 }; 264 }; 265 266 b-test { 267 reg = <3 1>; 268 compatible = "denx,u-boot-fdt-test"; 269 ping-expect = <3>; 270 ping-add = <3>; 271 272 mux-controls = <&muxcontroller0 0>; 273 mux-control-names = "mux0"; 274 }; 275 276 phy_provider0: gen_phy@0 { 277 compatible = "sandbox,phy"; 278 #phy-cells = <1>; 279 }; 280 281 phy_provider1: gen_phy@1 { 282 compatible = "sandbox,phy"; 283 #phy-cells = <0>; 284 broken; 285 }; 286 287 phy_provider2: gen_phy@2 { 288 compatible = "sandbox,phy"; 289 #phy-cells = <0>; 290 }; 291 292 gen_phy_user: gen_phy_user { 293 compatible = "simple-bus"; 294 phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>; 295 phy-names = "phy1", "phy2", "phy3"; 296 }; 297 298 gen_phy_user1: gen_phy_user1 { 299 compatible = "simple-bus"; 300 phys = <&phy_provider0 0>, <&phy_provider2>; 301 phy-names = "phy1", "phy2"; 302 }; 303 304 some-bus { 305 #address-cells = <1>; 306 #size-cells = <0>; 307 compatible = "denx,u-boot-test-bus"; 308 reg = <3 1>; 309 ping-expect = <4>; 310 ping-add = <4>; 311 c-test@5 { 312 compatible = "denx,u-boot-fdt-test"; 313 reg = <5>; 314 ping-expect = <5>; 315 ping-add = <5>; 316 }; 317 c-test@0 { 318 compatible = "denx,u-boot-fdt-test"; 319 reg = <0>; 320 ping-expect = <6>; 321 ping-add = <6>; 322 }; 323 c-test@1 { 324 compatible = "denx,u-boot-fdt-test"; 325 reg = <1>; 326 ping-expect = <7>; 327 ping-add = <7>; 328 }; 329 }; 330 331 d-test { 332 reg = <3 1>; 333 ping-expect = <6>; 334 ping-add = <6>; 335 compatible = "google,another-fdt-test"; 336 }; 337 338 e-test { 339 reg = <3 1>; 340 ping-expect = <6>; 341 ping-add = <6>; 342 compatible = "google,another-fdt-test"; 343 }; 344 345 f-test { 346 compatible = "denx,u-boot-fdt-test"; 347 }; 348 349 g-test { 350 compatible = "denx,u-boot-fdt-test"; 351 }; 352 353 h-test { 354 compatible = "denx,u-boot-fdt-test1"; 355 }; 356 357 i-test { 358 compatible = "mediatek,u-boot-fdt-test"; 359 #address-cells = <1>; 360 #size-cells = <0>; 361 362 subnode@0 { 363 reg = <0>; 364 }; 365 366 subnode@1 { 367 reg = <1>; 368 }; 369 370 subnode@2 { 371 reg = <2>; 372 }; 373 }; 374 375 devres-test { 376 compatible = "denx,u-boot-devres-test"; 377 }; 378 379 another-test { 380 reg = <0 2>; 381 compatible = "denx,u-boot-fdt-test"; 382 test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>; 383 test5-gpios = <&gpio_a 19>; 384 }; 385 386 mmio-bus@0 { 387 #address-cells = <1>; 388 #size-cells = <1>; 389 compatible = "denx,u-boot-test-bus"; 390 dma-ranges = <0x10000000 0x00000000 0x00040000>; 391 392 subnode@0 { 393 compatible = "denx,u-boot-fdt-test"; 394 }; 395 }; 396 397 mmio-bus@1 { 398 #address-cells = <1>; 399 #size-cells = <1>; 400 compatible = "denx,u-boot-test-bus"; 401 402 subnode@0 { 403 compatible = "denx,u-boot-fdt-test"; 404 }; 405 }; 406 407 acpi_test1: acpi-test { 408 compatible = "denx,u-boot-acpi-test"; 409 acpi-ssdt-test-data = "ab"; 410 acpi-dsdt-test-data = "hi"; 411 child { 412 compatible = "denx,u-boot-acpi-test"; 413 }; 414 }; 415 416 acpi_test2: acpi-test2 { 417 compatible = "denx,u-boot-acpi-test"; 418 acpi-ssdt-test-data = "cd"; 419 acpi-dsdt-test-data = "jk"; 420 }; 421 422 clocks { 423 clk_fixed: clk-fixed { 424 compatible = "fixed-clock"; 425 #clock-cells = <0>; 426 clock-frequency = <1234>; 427 }; 428 429 clk_fixed_factor: clk-fixed-factor { 430 compatible = "fixed-factor-clock"; 431 #clock-cells = <0>; 432 clock-div = <3>; 433 clock-mult = <2>; 434 clocks = <&clk_fixed>; 435 }; 436 437 osc { 438 compatible = "fixed-clock"; 439 #clock-cells = <0>; 440 clock-frequency = <20000000>; 441 }; 442 }; 443 444 clk_sandbox: clk-sbox { 445 compatible = "sandbox,clk"; 446 #clock-cells = <1>; 447 assigned-clocks = <&clk_sandbox 3>; 448 assigned-clock-rates = <321>; 449 }; 450 451 clk-test { 452 compatible = "sandbox,clk-test"; 453 clocks = <&clk_fixed>, 454 <&clk_sandbox 1>, 455 <&clk_sandbox 0>, 456 <&clk_sandbox 3>, 457 <&clk_sandbox 2>; 458 clock-names = "fixed", "i2c", "spi", "uart2", "uart1"; 459 }; 460 461 ccf: clk-ccf { 462 compatible = "sandbox,clk-ccf"; 463 }; 464 465 eth@10002000 { 466 compatible = "sandbox,eth"; 467 reg = <0x10002000 0x1000>; 468 fake-host-hwaddr = [00 00 66 44 22 00]; 469 }; 470 471 eth_5: eth@10003000 { 472 compatible = "sandbox,eth"; 473 reg = <0x10003000 0x1000>; 474 fake-host-hwaddr = [00 00 66 44 22 11]; 475 }; 476 477 eth_3: sbe5 { 478 compatible = "sandbox,eth"; 479 reg = <0x10005000 0x1000>; 480 fake-host-hwaddr = [00 00 66 44 22 33]; 481 }; 482 483 eth@10004000 { 484 compatible = "sandbox,eth"; 485 reg = <0x10004000 0x1000>; 486 fake-host-hwaddr = [00 00 66 44 22 22]; 487 }; 488 489 dsa_eth0: dsa-test-eth { 490 compatible = "sandbox,eth"; 491 reg = <0x10006000 0x1000>; 492 fake-host-hwaddr = [00 00 66 44 22 66]; 493 }; 494 495 dsa-test { 496 compatible = "sandbox,dsa"; 497 498 ports { 499 #address-cells = <1>; 500 #size-cells = <0>; 501 swp_0: port@0 { 502 reg = <0>; 503 label = "lan0"; 504 phy-mode = "rgmii-rxid"; 505 506 fixed-link { 507 speed = <100>; 508 full-duplex; 509 }; 510 }; 511 512 swp_1: port@1 { 513 reg = <1>; 514 label = "lan1"; 515 phy-mode = "rgmii-txid"; 516 fixed-link = <0 1 100 0 0>; 517 }; 518 519 port@2 { 520 reg = <2>; 521 ethernet = <&dsa_eth0>; 522 523 fixed-link { 524 speed = <1000>; 525 full-duplex; 526 }; 527 }; 528 }; 529 }; 530 531 firmware { 532 sandbox_firmware: sandbox-firmware { 533 compatible = "sandbox,firmware"; 534 }; 535 536 sandbox-scmi-agent@0 { 537 compatible = "sandbox,scmi-agent"; 538 #address-cells = <1>; 539 #size-cells = <0>; 540 541 clk_scmi0: protocol@14 { 542 reg = <0x14>; 543 #clock-cells = <1>; 544 }; 545 546 reset_scmi0: protocol@16 { 547 reg = <0x16>; 548 #reset-cells = <1>; 549 }; 550 551 protocol@17 { 552 reg = <0x17>; 553 554 regulators { 555 #address-cells = <1>; 556 #size-cells = <0>; 557 558 regul0_scmi0: reg@0 { 559 reg = <0>; 560 regulator-name = "sandbox-voltd0"; 561 regulator-min-microvolt = <1100000>; 562 regulator-max-microvolt = <3300000>; 563 }; 564 regul1_scmi0: reg@1 { 565 reg = <0x1>; 566 regulator-name = "sandbox-voltd1"; 567 regulator-min-microvolt = <1800000>; 568 }; 569 }; 570 }; 571 }; 572 573 sandbox-scmi-agent@1 { 574 compatible = "sandbox,scmi-agent"; 575 #address-cells = <1>; 576 #size-cells = <0>; 577 578 clk_scmi1: protocol@14 { 579 reg = <0x14>; 580 #clock-cells = <1>; 581 }; 582 583 protocol@10 { 584 reg = <0x10>; 585 }; 586 }; 587 }; 588 589 pinctrl-gpio { 590 compatible = "sandbox,pinctrl-gpio"; 591 592 gpio_a: base-gpios { 593 compatible = "sandbox,gpio"; 594 gpio-controller; 595 #gpio-cells = <1>; 596 gpio-bank-name = "a"; 597 sandbox,gpio-count = <20>; 598 hog_input_active_low { 599 gpio-hog; 600 input; 601 gpios = <10 GPIO_ACTIVE_LOW>; 602 }; 603 hog_input_active_high { 604 gpio-hog; 605 input; 606 gpios = <11 GPIO_ACTIVE_HIGH>; 607 }; 608 hog_output_low { 609 gpio-hog; 610 output-low; 611 gpios = <12 GPIO_ACTIVE_HIGH>; 612 }; 613 hog_output_high { 614 gpio-hog; 615 output-high; 616 gpios = <13 GPIO_ACTIVE_HIGH>; 617 }; 618 }; 619 620 gpio_b: extra-gpios { 621 compatible = "sandbox,gpio"; 622 gpio-controller; 623 #gpio-cells = <5>; 624 gpio-bank-name = "b"; 625 sandbox,gpio-count = <10>; 626 }; 627 628 gpio_c: pinmux-gpios { 629 compatible = "sandbox,gpio"; 630 gpio-controller; 631 #gpio-cells = <2>; 632 gpio-bank-name = "c"; 633 sandbox,gpio-count = <10>; 634 }; 635 }; 636 637 i2c@0 { 638 #address-cells = <1>; 639 #size-cells = <0>; 640 reg = <0 1>; 641 compatible = "sandbox,i2c"; 642 clock-frequency = <100000>; 643 pinctrl-names = "default"; 644 pinctrl-0 = <&pinmux_i2c0_pins>; 645 646 eeprom@2c { 647 reg = <0x2c>; 648 compatible = "i2c-eeprom"; 649 sandbox,emul = <&emul_eeprom>; 650 partitions { 651 compatible = "fixed-partitions"; 652 #address-cells = <1>; 653 #size-cells = <1>; 654 bootcount_i2c: bootcount@10 { 655 reg = <10 2>; 656 }; 657 }; 658 }; 659 660 rtc_0: rtc@43 { 661 reg = <0x43>; 662 compatible = "sandbox-rtc"; 663 sandbox,emul = <&emul0>; 664 }; 665 666 rtc_1: rtc@61 { 667 reg = <0x61>; 668 compatible = "sandbox-rtc"; 669 sandbox,emul = <&emul1>; 670 }; 671 672 i2c_emul: emul { 673 reg = <0xff>; 674 compatible = "sandbox,i2c-emul-parent"; 675 emul_eeprom: emul-eeprom { 676 compatible = "sandbox,i2c-eeprom"; 677 sandbox,filename = "i2c.bin"; 678 sandbox,size = <256>; 679 }; 680 emul0: emul0 { 681 compatible = "sandbox,i2c-rtc-emul"; 682 }; 683 emul1: emull { 684 compatible = "sandbox,i2c-rtc-emul"; 685 }; 686 }; 687 688 sandbox_pmic: sandbox_pmic { 689 reg = <0x40>; 690 sandbox,emul = <&emul_pmic0>; 691 }; 692 693 mc34708: pmic@41 { 694 reg = <0x41>; 695 sandbox,emul = <&emul_pmic1>; 696 }; 697 }; 698 699 bootcount@0 { 700 compatible = "u-boot,bootcount-rtc"; 701 rtc = <&rtc_1>; 702 offset = <0x13>; 703 }; 704 705 bootcount { 706 compatible = "u-boot,bootcount-i2c-eeprom"; 707 i2c-eeprom = <&bootcount_i2c>; 708 }; 709 710 adc: adc@0 { 711 compatible = "sandbox,adc"; 712 #io-channel-cells = <1>; 713 vdd-supply = <&buck2>; 714 vss-microvolts = <0>; 715 }; 716 717 irq: irq { 718 compatible = "sandbox,irq"; 719 interrupt-controller; 720 #interrupt-cells = <2>; 721 }; 722 723 lcd { 724 u-boot,dm-pre-reloc; 725 compatible = "sandbox,lcd-sdl"; 726 pinctrl-names = "default"; 727 pinctrl-0 = <&pinmux_lcd_pins>; 728 xres = <1366>; 729 yres = <768>; 730 }; 731 732 leds { 733 compatible = "gpio-leds"; 734 735 iracibble { 736 gpios = <&gpio_a 1 0>; 737 label = "sandbox:red"; 738 }; 739 740 martinet { 741 gpios = <&gpio_a 2 0>; 742 label = "sandbox:green"; 743 }; 744 745 default_on { 746 gpios = <&gpio_a 5 0>; 747 label = "sandbox:default_on"; 748 default-state = "on"; 749 }; 750 751 default_off { 752 gpios = <&gpio_a 6 0>; 753 /* label intentionally omitted */ 754 default-state = "off"; 755 }; 756 }; 757 758 mbox: mbox { 759 compatible = "sandbox,mbox"; 760 #mbox-cells = <1>; 761 }; 762 763 mbox-test { 764 compatible = "sandbox,mbox-test"; 765 mboxes = <&mbox 100>, <&mbox 1>; 766 mbox-names = "other", "test"; 767 }; 768 769 cpus { 770 timebase-frequency = <2000000>; 771 cpu-test1 { 772 timebase-frequency = <3000000>; 773 compatible = "sandbox,cpu_sandbox"; 774 u-boot,dm-pre-reloc; 775 }; 776 777 cpu-test2 { 778 compatible = "sandbox,cpu_sandbox"; 779 u-boot,dm-pre-reloc; 780 }; 781 782 cpu-test3 { 783 compatible = "sandbox,cpu_sandbox"; 784 u-boot,dm-pre-reloc; 785 }; 786 }; 787 788 chipid: chipid { 789 compatible = "sandbox,soc"; 790 }; 791 792 i2s: i2s { 793 compatible = "sandbox,i2s"; 794 #sound-dai-cells = <1>; 795 sandbox,silent; /* Don't emit sounds while testing */ 796 }; 797 798 nop-test_0 { 799 compatible = "sandbox,nop_sandbox1"; 800 nop-test_1 { 801 compatible = "sandbox,nop_sandbox2"; 802 bind = "True"; 803 }; 804 nop-test_2 { 805 compatible = "sandbox,nop_sandbox2"; 806 bind = "False"; 807 }; 808 }; 809 810 misc-test { 811 compatible = "sandbox,misc_sandbox"; 812 }; 813 814 mmc2 { 815 compatible = "sandbox,mmc"; 816 }; 817 818 mmc1 { 819 compatible = "sandbox,mmc"; 820 }; 821 822 mmc0 { 823 compatible = "sandbox,mmc"; 824 }; 825 826 pch { 827 compatible = "sandbox,pch"; 828 }; 829 830 pci0: pci@0 { 831 compatible = "sandbox,pci"; 832 device_type = "pci"; 833 bus-range = <0x00 0xff>; 834 #address-cells = <3>; 835 #size-cells = <2>; 836 ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000 837 0x01000000 0 0x20000000 0x20000000 0 0x2000>; 838 pci@0,0 { 839 compatible = "pci-generic"; 840 reg = <0x0000 0 0 0 0>; 841 sandbox,emul = <&swap_case_emul0_0>; 842 }; 843 pci@1,0 { 844 compatible = "pci-generic"; 845 /* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */ 846 reg = <0x02000814 0 0 0 0 847 0x01000810 0 0 0 0>; 848 sandbox,emul = <&swap_case_emul0_1>; 849 }; 850 p2sb-pci@2,0 { 851 compatible = "sandbox,p2sb"; 852 reg = <0x02001010 0 0 0 0>; 853 sandbox,emul = <&p2sb_emul>; 854 855 adder { 856 intel,p2sb-port-id = <3>; 857 compatible = "sandbox,adder"; 858 }; 859 }; 860 pci@1e,0 { 861 compatible = "sandbox,pmc"; 862 reg = <0xf000 0 0 0 0>; 863 sandbox,emul = <&pmc_emul1e>; 864 acpi-base = <0x400>; 865 gpe0-dwx-mask = <0xf>; 866 gpe0-dwx-shift-base = <4>; 867 gpe0-dw = <6 7 9>; 868 gpe0-sts = <0x20>; 869 gpe0-en = <0x30>; 870 }; 871 pci@1f,0 { 872 compatible = "pci-generic"; 873 /* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */ 874 reg = <0x0100f810 0 0 0 0>; 875 sandbox,emul = <&swap_case_emul0_1f>; 876 }; 877 }; 878 879 pci-emul0 { 880 compatible = "sandbox,pci-emul-parent"; 881 swap_case_emul0_0: emul0@0,0 { 882 compatible = "sandbox,swap-case"; 883 }; 884 swap_case_emul0_1: emul0@1,0 { 885 compatible = "sandbox,swap-case"; 886 use-ea; 887 }; 888 swap_case_emul0_1f: emul0@1f,0 { 889 compatible = "sandbox,swap-case"; 890 }; 891 p2sb_emul: emul@2,0 { 892 compatible = "sandbox,p2sb-emul"; 893 }; 894 pmc_emul1e: emul@1e,0 { 895 compatible = "sandbox,pmc-emul"; 896 }; 897 }; 898 899 pci1: pci@1 { 900 compatible = "sandbox,pci"; 901 device_type = "pci"; 902 bus-range = <0x00 0xff>; 903 #address-cells = <3>; 904 #size-cells = <2>; 905 ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 // MEM0 906 0x02000000 0 0x31000000 0x31000000 0 0x2000 // MEM1 907 0x01000000 0 0x40000000 0x40000000 0 0x2000>; 908 sandbox,dev-info = <0x08 0x00 0x1234 0x5678 909 0x0c 0x00 0x1234 0x5678 910 0x10 0x00 0x1234 0x5678>; 911 pci@10,0 { 912 reg = <0x8000 0 0 0 0>; 913 }; 914 }; 915 916 pci2: pci@2 { 917 compatible = "sandbox,pci"; 918 device_type = "pci"; 919 bus-range = <0x00 0xff>; 920 #address-cells = <3>; 921 #size-cells = <2>; 922 ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000 923 0x01000000 0 0x60000000 0x60000000 0 0x2000>; 924 sandbox,dev-info = <0x08 0x00 0x1234 0x5678>; 925 pci@1f,0 { 926 compatible = "pci-generic"; 927 reg = <0xf800 0 0 0 0>; 928 sandbox,emul = <&swap_case_emul2_1f>; 929 }; 930 }; 931 932 pci-emul2 { 933 compatible = "sandbox,pci-emul-parent"; 934 swap_case_emul2_1f: emul2@1f,0 { 935 compatible = "sandbox,swap-case"; 936 }; 937 }; 938 939 pci_ep: pci_ep { 940 compatible = "sandbox,pci_ep"; 941 }; 942 943 probing { 944 compatible = "simple-bus"; 945 test1 { 946 compatible = "denx,u-boot-probe-test"; 947 }; 948 949 test2 { 950 compatible = "denx,u-boot-probe-test"; 951 }; 952 953 test3 { 954 compatible = "denx,u-boot-probe-test"; 955 }; 956 957 test4 { 958 compatible = "denx,u-boot-probe-test"; 959 first-syscon = <&syscon0>; 960 second-sys-ctrl = <&another_system_controller>; 961 third-syscon = <&syscon2>; 962 }; 963 }; 964 965 pwrdom: power-domain { 966 compatible = "sandbox,power-domain"; 967 #power-domain-cells = <1>; 968 }; 969 970 power-domain-test { 971 compatible = "sandbox,power-domain-test"; 972 power-domains = <&pwrdom 2>; 973 }; 974 975 pwm: pwm { 976 compatible = "sandbox,pwm"; 977 #pwm-cells = <2>; 978 pinctrl-names = "default"; 979 pinctrl-0 = <&pinmux_pwm_pins>; 980 }; 981 982 pwm2 { 983 compatible = "sandbox,pwm"; 984 #pwm-cells = <2>; 985 }; 986 987 ram { 988 compatible = "sandbox,ram"; 989 }; 990 991 reset@0 { 992 compatible = "sandbox,warm-reset"; 993 }; 994 995 reset@1 { 996 compatible = "sandbox,reset"; 997 }; 998 999 resetc: reset-ctl { 1000 compatible = "sandbox,reset-ctl"; 1001 #reset-cells = <1>; 1002 }; 1003 1004 reset-ctl-test { 1005 compatible = "sandbox,reset-ctl-test"; 1006 resets = <&resetc 100>, <&resetc 2>, <&resetc 20>, <&resetc 40>; 1007 reset-names = "other", "test", "test2", "test3"; 1008 }; 1009 1010 rng { 1011 compatible = "sandbox,sandbox-rng"; 1012 }; 1013 1014 rproc_1: rproc@1 { 1015 compatible = "sandbox,test-processor"; 1016 remoteproc-name = "remoteproc-test-dev1"; 1017 }; 1018 1019 rproc_2: rproc@2 { 1020 compatible = "sandbox,test-processor"; 1021 internal-memory-mapped; 1022 remoteproc-name = "remoteproc-test-dev2"; 1023 }; 1024 1025 panel { 1026 compatible = "simple-panel"; 1027 backlight = <&backlight 0 100>; 1028 }; 1029 1030 smem@0 { 1031 compatible = "sandbox,smem"; 1032 }; 1033 1034 sound { 1035 compatible = "sandbox,sound"; 1036 cpu { 1037 sound-dai = <&i2s 0>; 1038 }; 1039 1040 codec { 1041 sound-dai = <&audio 0>; 1042 }; 1043 }; 1044 1045 spi@0 { 1046 #address-cells = <1>; 1047 #size-cells = <0>; 1048 reg = <0 1>; 1049 compatible = "sandbox,spi"; 1050 cs-gpios = <0>, <0>, <&gpio_a 0>; 1051 pinctrl-names = "default"; 1052 pinctrl-0 = <&pinmux_spi0_pins>; 1053 1054 spi.bin@0 { 1055 reg = <0>; 1056 compatible = "spansion,m25p16", "jedec,spi-nor"; 1057 spi-max-frequency = <40000000>; 1058 sandbox,filename = "spi.bin"; 1059 }; 1060 spi.bin@1 { 1061 reg = <1>; 1062 compatible = "spansion,m25p16", "jedec,spi-nor"; 1063 spi-max-frequency = <50000000>; 1064 sandbox,filename = "spi.bin"; 1065 spi-cpol; 1066 spi-cpha; 1067 }; 1068 }; 1069 1070 syscon0: syscon@0 { 1071 compatible = "sandbox,syscon0"; 1072 reg = <0x10 16>; 1073 }; 1074 1075 another_system_controller: syscon@1 { 1076 compatible = "sandbox,syscon1"; 1077 reg = <0x20 5 1078 0x28 6 1079 0x30 7 1080 0x38 8>; 1081 }; 1082 1083 syscon2: syscon@2 { 1084 compatible = "simple-mfd", "syscon"; 1085 reg = <0x40 5 1086 0x48 6 1087 0x50 7 1088 0x58 8>; 1089 }; 1090 1091 syscon3: syscon@3 { 1092 compatible = "simple-mfd", "syscon"; 1093 reg = <0x000100 0x10>; 1094 1095 muxcontroller0: a-mux-controller { 1096 compatible = "mmio-mux"; 1097 #mux-control-cells = <1>; 1098 1099 mux-reg-masks = <0x0 0x30>, /* 0: reg 0x0, bits 5:4 */ 1100 <0xc 0x1E>, /* 1: reg 0xc, bits 4:1 */ 1101 <0x4 0xFF>; /* 2: reg 0x4, bits 7:0 */ 1102 idle-states = <MUX_IDLE_AS_IS>, <0x02>, <0x73>; 1103 u-boot,mux-autoprobe; 1104 }; 1105 }; 1106 1107 muxcontroller1: emul-mux-controller { 1108 compatible = "mux-emul"; 1109 #mux-control-cells = <0>; 1110 u-boot,mux-autoprobe; 1111 idle-state = <0xabcd>; 1112 }; 1113 1114 testfdtm0 { 1115 compatible = "denx,u-boot-fdtm-test"; 1116 }; 1117 1118 testfdtm1: testfdtm1 { 1119 compatible = "denx,u-boot-fdtm-test"; 1120 }; 1121 1122 testfdtm2 { 1123 compatible = "denx,u-boot-fdtm-test"; 1124 }; 1125 1126 timer@0 { 1127 compatible = "sandbox,timer"; 1128 clock-frequency = <1000000>; 1129 }; 1130 1131 timer@1 { 1132 compatible = "sandbox,timer"; 1133 sandbox,timebase-frequency-fallback; 1134 }; 1135 1136 tpm2 { 1137 compatible = "sandbox,tpm2"; 1138 }; 1139 1140 uart0: serial { 1141 compatible = "sandbox,serial"; 1142 u-boot,dm-pre-reloc; 1143 pinctrl-names = "default"; 1144 pinctrl-0 = <&pinmux_uart0_pins>; 1145 }; 1146 1147 usb_0: usb@0 { 1148 compatible = "sandbox,usb"; 1149 status = "disabled"; 1150 hub { 1151 compatible = "sandbox,usb-hub"; 1152 #address-cells = <1>; 1153 #size-cells = <0>; 1154 flash-stick { 1155 reg = <0>; 1156 compatible = "sandbox,usb-flash"; 1157 }; 1158 }; 1159 }; 1160 1161 usb_1: usb@1 { 1162 compatible = "sandbox,usb"; 1163 hub { 1164 compatible = "usb-hub"; 1165 usb,device-class = <9>; 1166 #address-cells = <1>; 1167 #size-cells = <0>; 1168 hub-emul { 1169 compatible = "sandbox,usb-hub"; 1170 #address-cells = <1>; 1171 #size-cells = <0>; 1172 flash-stick@0 { 1173 reg = <0>; 1174 compatible = "sandbox,usb-flash"; 1175 sandbox,filepath = "testflash.bin"; 1176 }; 1177 1178 flash-stick@1 { 1179 reg = <1>; 1180 compatible = "sandbox,usb-flash"; 1181 sandbox,filepath = "testflash1.bin"; 1182 }; 1183 1184 flash-stick@2 { 1185 reg = <2>; 1186 compatible = "sandbox,usb-flash"; 1187 sandbox,filepath = "testflash2.bin"; 1188 }; 1189 1190 keyb@3 { 1191 reg = <3>; 1192 compatible = "sandbox,usb-keyb"; 1193 }; 1194 1195 }; 1196 1197 usbstor@1 { 1198 reg = <1>; 1199 }; 1200 usbstor@3 { 1201 reg = <3>; 1202 }; 1203 }; 1204 }; 1205 1206 usb_2: usb@2 { 1207 compatible = "sandbox,usb"; 1208 status = "disabled"; 1209 }; 1210 1211 spmi: spmi@0 { 1212 compatible = "sandbox,spmi"; 1213 #address-cells = <0x1>; 1214 #size-cells = <0x1>; 1215 ranges; 1216 pm8916@0 { 1217 compatible = "qcom,spmi-pmic"; 1218 reg = <0x0 0x1>; 1219 #address-cells = <0x1>; 1220 #size-cells = <0x1>; 1221 ranges; 1222 1223 spmi_gpios: gpios@c000 { 1224 compatible = "qcom,pm8916-gpio"; 1225 reg = <0xc000 0x400>; 1226 gpio-controller; 1227 gpio-count = <4>; 1228 #gpio-cells = <2>; 1229 gpio-bank-name="spmi"; 1230 }; 1231 }; 1232 }; 1233 1234 wdt0: wdt@0 { 1235 compatible = "sandbox,wdt"; 1236 }; 1237 1238 axi: axi@0 { 1239 compatible = "sandbox,axi"; 1240 #address-cells = <0x1>; 1241 #size-cells = <0x1>; 1242 store@0 { 1243 compatible = "sandbox,sandbox_store"; 1244 reg = <0x0 0x400>; 1245 }; 1246 }; 1247 1248 chosen { 1249 #address-cells = <1>; 1250 #size-cells = <1>; 1251 setting = "sunrise ohoka"; 1252 other-node = "/some-bus/c-test@5"; 1253 int-values = <0x1937 72993>; 1254 u-boot,acpi-ssdt-order = <&acpi_test2 &acpi_test1>; 1255 chosen-test { 1256 compatible = "denx,u-boot-fdt-test"; 1257 reg = <9 1>; 1258 }; 1259 }; 1260 1261 translation-test@8000 { 1262 compatible = "simple-bus"; 1263 reg = <0x8000 0x4000>; 1264 1265 #address-cells = <0x2>; 1266 #size-cells = <0x1>; 1267 1268 ranges = <0 0x0 0x8000 0x1000 1269 1 0x100 0x9000 0x1000 1270 2 0x200 0xA000 0x1000 1271 3 0x300 0xB000 0x1000 1272 >; 1273 1274 dma-ranges = <0 0x000 0x10000000 0x1000 1275 1 0x100 0x20000000 0x1000 1276 >; 1277 1278 dev@0,0 { 1279 compatible = "denx,u-boot-fdt-dummy"; 1280 reg = <0 0x0 0x1000>; 1281 reg-names = "sandbox-dummy-0"; 1282 }; 1283 1284 dev@1,100 { 1285 compatible = "denx,u-boot-fdt-dummy"; 1286 reg = <1 0x100 0x1000>; 1287 1288 }; 1289 1290 dev@2,200 { 1291 compatible = "denx,u-boot-fdt-dummy"; 1292 reg = <2 0x200 0x1000>; 1293 }; 1294 1295 1296 noxlatebus@3,300 { 1297 compatible = "simple-bus"; 1298 reg = <3 0x300 0x1000>; 1299 1300 #address-cells = <0x1>; 1301 #size-cells = <0x0>; 1302 1303 dev@42 { 1304 compatible = "denx,u-boot-fdt-dummy"; 1305 reg = <0x42>; 1306 }; 1307 }; 1308 }; 1309 1310 osd { 1311 compatible = "sandbox,sandbox_osd"; 1312 }; 1313 1314 sandbox_tee { 1315 compatible = "sandbox,tee"; 1316 }; 1317 1318 sandbox_virtio1 { 1319 compatible = "sandbox,virtio1"; 1320 }; 1321 1322 sandbox_virtio2 { 1323 compatible = "sandbox,virtio2"; 1324 }; 1325 1326 sandbox_scmi { 1327 compatible = "sandbox,scmi-devices"; 1328 clocks = <&clk_scmi0 7>, <&clk_scmi0 3>, <&clk_scmi1 1>; 1329 resets = <&reset_scmi0 3>; 1330 regul0-supply = <®ul0_scmi0>; 1331 regul1-supply = <®ul1_scmi0>; 1332 }; 1333 1334 pinctrl { 1335 compatible = "sandbox,pinctrl"; 1336 1337 pinctrl-names = "default", "alternate"; 1338 pinctrl-0 = <&pinctrl_gpios>, <&pinctrl_i2s>; 1339 pinctrl-1 = <&pinctrl_spi>, <&pinctrl_i2c>; 1340 1341 pinctrl_gpios: gpios { 1342 gpio0 { 1343 pins = "P5"; 1344 function = "GPIO"; 1345 bias-pull-up; 1346 input-disable; 1347 }; 1348 gpio1 { 1349 pins = "P6"; 1350 function = "GPIO"; 1351 output-high; 1352 drive-open-drain; 1353 }; 1354 gpio2 { 1355 pinmux = <SANDBOX_PINMUX(7, SANDBOX_PINMUX_GPIO)>; 1356 bias-pull-down; 1357 input-enable; 1358 }; 1359 gpio3 { 1360 pinmux = <SANDBOX_PINMUX(8, SANDBOX_PINMUX_GPIO)>; 1361 bias-disable; 1362 }; 1363 }; 1364 1365 pinctrl_i2c: i2c { 1366 groups { 1367 groups = "I2C_UART"; 1368 function = "I2C"; 1369 }; 1370 1371 pins { 1372 pins = "P0", "P1"; 1373 drive-open-drain; 1374 }; 1375 }; 1376 1377 pinctrl_i2s: i2s { 1378 groups = "SPI_I2S"; 1379 function = "I2S"; 1380 }; 1381 1382 pinctrl_spi: spi { 1383 groups = "SPI_I2S"; 1384 function = "SPI"; 1385 1386 cs { 1387 pinmux = <SANDBOX_PINMUX(5, SANDBOX_PINMUX_CS)>, 1388 <SANDBOX_PINMUX(6, SANDBOX_PINMUX_CS)>; 1389 }; 1390 }; 1391 }; 1392 1393 pinctrl-single-no-width { 1394 compatible = "pinctrl-single"; 1395 reg = <0x0000 0x238>; 1396 #pinctrl-cells = <1>; 1397 pinctrl-single,function-mask = <0x7f>; 1398 }; 1399 1400 pinctrl-single-pins { 1401 compatible = "pinctrl-single"; 1402 reg = <0x0000 0x238>; 1403 #pinctrl-cells = <1>; 1404 pinctrl-single,register-width = <32>; 1405 pinctrl-single,function-mask = <0x7f>; 1406 1407 pinmux_pwm_pins: pinmux_pwm_pins { 1408 pinctrl-single,pins = < 0x48 0x06 >; 1409 }; 1410 1411 pinmux_spi0_pins: pinmux_spi0_pins { 1412 pinctrl-single,pins = < 1413 0x190 0x0c 1414 0x194 0x0c 1415 0x198 0x23 1416 0x19c 0x0c 1417 >; 1418 }; 1419 1420 pinmux_uart0_pins: pinmux_uart0_pins { 1421 pinctrl-single,pins = < 1422 0x70 0x30 1423 0x74 0x00 1424 >; 1425 }; 1426 }; 1427 1428 pinctrl-single-bits { 1429 compatible = "pinctrl-single"; 1430 reg = <0x0000 0x50>; 1431 #pinctrl-cells = <2>; 1432 pinctrl-single,bit-per-mux; 1433 pinctrl-single,register-width = <32>; 1434 pinctrl-single,function-mask = <0xf>; 1435 1436 pinmux_i2c0_pins: pinmux_i2c0_pins { 1437 pinctrl-single,bits = < 1438 0x10 0x00002200 0x0000ff00 1439 >; 1440 }; 1441 1442 pinmux_lcd_pins: pinmux_lcd_pins { 1443 pinctrl-single,bits = < 1444 0x40 0x22222200 0xffffff00 1445 0x44 0x22222222 0xffffffff 1446 0x48 0x00000022 0x000000ff 1447 0x48 0x02000000 0x0f000000 1448 0x4c 0x02000022 0x0f0000ff 1449 >; 1450 }; 1451 }; 1452 1453 hwspinlock@0 { 1454 compatible = "sandbox,hwspinlock"; 1455 }; 1456 1457 dma: dma { 1458 compatible = "sandbox,dma"; 1459 #dma-cells = <1>; 1460 1461 dmas = <&dma 0>, <&dma 1>, <&dma 2>; 1462 dma-names = "m2m", "tx0", "rx0"; 1463 }; 1464 1465 /* 1466 * keep mdio-mux ahead of mdio so that the mux is removed first at the 1467 * end of the test. If parent mdio is removed first, clean-up of the 1468 * mux will trigger a 2nd probe of parent-mdio, leaving parent-mdio 1469 * active at the end of the test. That it turn doesn't allow the mdio 1470 * class to be destroyed, triggering an error. 1471 */ 1472 mdio-mux-test { 1473 compatible = "sandbox,mdio-mux"; 1474 #address-cells = <1>; 1475 #size-cells = <0>; 1476 mdio-parent-bus = <&mdio>; 1477 1478 mdio-ch-test@0 { 1479 reg = <0>; 1480 }; 1481 mdio-ch-test@1 { 1482 reg = <1>; 1483 }; 1484 }; 1485 1486 mdio: mdio-test { 1487 compatible = "sandbox,mdio"; 1488 }; 1489 1490 pm-bus-test { 1491 compatible = "simple-pm-bus"; 1492 clocks = <&clk_sandbox 4>; 1493 power-domains = <&pwrdom 1>; 1494 }; 1495 1496 resetc2: syscon-reset { 1497 compatible = "syscon-reset"; 1498 #reset-cells = <1>; 1499 regmap = <&syscon0>; 1500 offset = <1>; 1501 mask = <0x27FFFFFF>; 1502 assert-high = <0>; 1503 }; 1504 1505 syscon-reset-test { 1506 compatible = "sandbox,misc_sandbox"; 1507 resets = <&resetc2 15>, <&resetc2 30>, <&resetc2 60>; 1508 reset-names = "valid", "no_mask", "out_of_range"; 1509 }; 1510 1511 sysinfo { 1512 compatible = "sandbox,sysinfo-sandbox"; 1513 }; 1514 1515 sysinfo-gpio { 1516 compatible = "gpio-sysinfo"; 1517 gpios = <&gpio_a 15>, <&gpio_a 16>, <&gpio_a 17>; 1518 revisions = <19>, <5>; 1519 names = "rev_a", "foo"; 1520 }; 1521 1522 some_regmapped-bus { 1523 #address-cells = <0x1>; 1524 #size-cells = <0x1>; 1525 1526 ranges = <0x0 0x0 0x10>; 1527 compatible = "simple-bus"; 1528 1529 regmap-test_0 { 1530 reg = <0 0x10>; 1531 compatible = "sandbox,regmap_test"; 1532 }; 1533 }; 1534}; 1535 1536#include "sandbox_pmic.dtsi" 1537#include "cros-ec-keyboard.dtsi" 1538