1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2020 Toradex
4 */
5
6 #include <common.h>
7 #include <init.h>
8 #include <asm/arch/clock.h>
9 #include <asm/arch/sys_proto.h>
10 #include <asm/global_data.h>
11 #include <asm/io.h>
12 #include <i2c.h>
13 #include <miiphy.h>
14 #include <netdev.h>
15 #include <micrel.h>
16
17 #include "../common/tdx-cfg-block.h"
18
19 DECLARE_GLOBAL_DATA_PTR;
20
21 #define I2C_PMIC 0
22
23 enum pcb_rev_t {
24 PCB_VERSION_1_0,
25 PCB_VERSION_1_1
26 };
27
28 #if IS_ENABLED(CONFIG_FEC_MXC)
setup_fec(void)29 static int setup_fec(void)
30 {
31 struct iomuxc_gpr_base_regs *gpr =
32 (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
33
34 /* Use 125M anatop REF_CLK1 for ENET1, not from external */
35 clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
36
37 return 0;
38 }
39
board_phy_config(struct phy_device * phydev)40 int board_phy_config(struct phy_device *phydev)
41 {
42 int tmp;
43
44 switch (ksz9xx1_phy_get_id(phydev) & MII_KSZ9x31_SILICON_REV_MASK) {
45 case PHY_ID_KSZ9031:
46 /*
47 * The PHY adds 1.2ns for the RXC and 0ns for TXC clock by
48 * default. The MAC and the layout don't add a skew between
49 * clock and data.
50 * Add 0.3ns for the RXC path and 0.96 + 0.42 ns (1.38 ns) for
51 * the TXC path to get the required clock skews.
52 */
53 /* control data pad skew - devaddr = 0x02, register = 0x04 */
54 ksz9031_phy_extended_write(phydev, 0x02,
55 MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,
56 MII_KSZ9031_MOD_DATA_NO_POST_INC,
57 0x0070);
58 /* rx data pad skew - devaddr = 0x02, register = 0x05 */
59 ksz9031_phy_extended_write(phydev, 0x02,
60 MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,
61 MII_KSZ9031_MOD_DATA_NO_POST_INC,
62 0x7777);
63 /* tx data pad skew - devaddr = 0x02, register = 0x06 */
64 ksz9031_phy_extended_write(phydev, 0x02,
65 MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,
66 MII_KSZ9031_MOD_DATA_NO_POST_INC,
67 0x0000);
68 /* gtx and rx clock pad skew - devaddr = 0x02,register = 0x08 */
69 ksz9031_phy_extended_write(phydev, 0x02,
70 MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,
71 MII_KSZ9031_MOD_DATA_NO_POST_INC,
72 0x03f4);
73 break;
74 case PHY_ID_KSZ9131:
75 default:
76 /* read rxc dll control - devaddr = 0x2, register = 0x4c */
77 tmp = ksz9031_phy_extended_read(phydev, 0x02,
78 MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL,
79 MII_KSZ9031_MOD_DATA_NO_POST_INC);
80 /* disable rxdll bypass (enable 2ns skew delay on RXC) */
81 tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS;
82 /* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4c */
83 tmp = ksz9031_phy_extended_write(phydev, 0x02,
84 MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL,
85 MII_KSZ9031_MOD_DATA_NO_POST_INC, tmp);
86 /* read txc dll control - devaddr = 0x02, register = 0x4d */
87 tmp = ksz9031_phy_extended_read(phydev, 0x02,
88 MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL,
89 MII_KSZ9031_MOD_DATA_NO_POST_INC);
90 /* disable txdll bypass (enable 2ns skew delay on TXC) */
91 tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS;
92 /* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4d */
93 tmp = ksz9031_phy_extended_write(phydev, 0x02,
94 MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL,
95 MII_KSZ9031_MOD_DATA_NO_POST_INC, tmp);
96 break;
97 }
98
99 if (phydev->drv->config)
100 phydev->drv->config(phydev);
101 return 0;
102 }
103 #endif
104
board_init(void)105 int board_init(void)
106 {
107 if (IS_ENABLED(CONFIG_FEC_MXC))
108 setup_fec();
109
110 return 0;
111 }
112
board_mmc_get_env_dev(int devno)113 int board_mmc_get_env_dev(int devno)
114 {
115 return devno;
116 }
117
get_pcb_revision(void)118 static enum pcb_rev_t get_pcb_revision(void)
119 {
120 struct udevice *bus;
121 struct udevice *i2c_dev = NULL;
122 int ret;
123 u8 is_bd71837 = 0;
124
125 ret = uclass_get_device_by_seq(UCLASS_I2C, I2C_PMIC, &bus);
126 if (!ret)
127 ret = dm_i2c_probe(bus, 0x4b, 0, &i2c_dev);
128 if (!ret)
129 ret = dm_i2c_read(i2c_dev, 0x0, &is_bd71837, 1);
130
131 /* BD71837_REV, High Nibble is major version, fix 1010 */
132 is_bd71837 = !ret && ((is_bd71837 & 0xf0) == 0xa0);
133 return is_bd71837 ? PCB_VERSION_1_0 : PCB_VERSION_1_1;
134 }
135
select_dt_from_module_version(void)136 static void select_dt_from_module_version(void)
137 {
138 char variant[32];
139 char *env_variant = env_get("variant");
140 int is_wifi = 0;
141
142 if (IS_ENABLED(CONFIG_TDX_CFG_BLOCK)) {
143 /*
144 * If we have a valid config block and it says we are a
145 * module with Wi-Fi/Bluetooth make sure we use the -wifi
146 * device tree.
147 */
148 is_wifi = (tdx_hw_tag.prodid == VERDIN_IMX8MMQ_WIFI_BT_IT) ||
149 (tdx_hw_tag.prodid == VERDIN_IMX8MMDL_WIFI_BT_IT);
150 }
151
152 switch (get_pcb_revision()) {
153 case PCB_VERSION_1_0:
154 printf("Detected a V1.0 module\n");
155 if (is_wifi)
156 strncpy(&variant[0], "wifi", sizeof(variant));
157 else
158 strncpy(&variant[0], "nonwifi", sizeof(variant));
159 break;
160 default:
161 if (is_wifi)
162 strncpy(&variant[0], "wifi-v1.1", sizeof(variant));
163 else
164 strncpy(&variant[0], "nonwifi-v1.1", sizeof(variant));
165 break;
166 }
167
168 if (strcmp(variant, env_variant)) {
169 printf("Setting variant to %s\n", variant);
170 env_set("variant", variant);
171
172 if (IS_ENABLED(CONFIG_ENV_IS_NOWHERE))
173 env_save();
174 }
175 }
176
board_late_init(void)177 int board_late_init(void)
178 {
179 select_dt_from_module_version();
180
181 return 0;
182 }
183
board_phys_sdram_size(phys_size_t * size)184 int board_phys_sdram_size(phys_size_t *size)
185 {
186 if (!size)
187 return -EINVAL;
188
189 *size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
190
191 return 0;
192 }
193
194 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
ft_board_setup(void * blob,struct bd_info * bd)195 int ft_board_setup(void *blob, struct bd_info *bd)
196 {
197 return 0;
198 }
199 #endif
200