1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2004,2009-2011 Freescale Semiconductor, Inc.
4 * Jeff Brown
5 * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
6 */
7
8 /*
9 * cpu_init.c - low level cpu init
10 */
11
12 #include <asm-offsets.h>
13 #include <config.h>
14 #include <common.h>
15 #include <init.h>
16 #include <mpc86xx.h>
17 #include <asm/global_data.h>
18 #include <asm/mmu.h>
19 #include <asm/fsl_law.h>
20 #include <asm/fsl_serdes.h>
21 #include <asm/mp.h>
22
23 extern void srio_init(void);
24
25 DECLARE_GLOBAL_DATA_PTR;
26
27 /*
28 * Breathe some life into the CPU...
29 *
30 * Set up the memory map
31 * initialize a bunch of registers
32 */
33
cpu_init_f(void)34 void cpu_init_f(void)
35 {
36 /* Pointer is writable since we allocated a register for it */
37 gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
38
39 /* Clear initial global data */
40 memset ((void *) gd, 0, sizeof (gd_t));
41
42 #ifdef CONFIG_FSL_LAW
43 init_laws();
44 #endif
45
46 setup_bats();
47
48 init_early_memctl_regs();
49
50 #if defined(CONFIG_FSL_DMA)
51 dma_init();
52 #endif
53
54 /* enable the timebase bit in HID0 */
55 set_hid0(get_hid0() | 0x4000000);
56
57 /* enable EMCP, SYNCBE | ABE bits in HID1 */
58 set_hid1(get_hid1() | 0x80000C00);
59 }
60
61 /*
62 * initialize higher level parts of CPU like timers
63 */
cpu_init_r(void)64 int cpu_init_r(void)
65 {
66 /* needs to be in ram since code uses global static vars */
67 fsl_serdes_init();
68
69 #ifdef CONFIG_SYS_SRIO
70 srio_init();
71 #endif
72
73 #if defined(CONFIG_MP)
74 setup_mp();
75 #endif
76 return 0;
77 }
78
79 #ifdef CONFIG_ADDR_MAP
80 /* Initialize address mapping array */
init_addr_map(void)81 void init_addr_map(void)
82 {
83 int i;
84 ppc_bat_t bat = DBAT0;
85 phys_size_t size;
86 unsigned long upper, lower;
87
88 for (i = 0; i < CONFIG_SYS_NUM_ADDR_MAP; i++, bat++) {
89 if (read_bat(bat, &upper, &lower) != -1) {
90 if (!BATU_VALID(upper))
91 size = 0;
92 else
93 size = BATU_SIZE(upper);
94 addrmap_set_entry(BATU_VADDR(upper), BATL_PADDR(lower),
95 size, i);
96 }
97 #ifdef CONFIG_HIGH_BATS
98 /* High bats are not contiguous with low BAT numbers */
99 if (bat == DBAT3)
100 bat = DBAT4 - 1;
101 #endif
102 }
103 }
104 #endif
105