1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (c) 2016 Google, Inc
4  */
5 
6 #ifndef __ASM_INTEL_REGS_H
7 #define __ASM_INTEL_REGS_H
8 
9 /* Access the memory-controller hub */
10 #define MCH_BASE_ADDRESS	0xfed10000
11 #define MCH_BASE_SIZE		0x8000
12 #define MCHBAR_REG(reg)		(MCH_BASE_ADDRESS + (reg))
13 
14 #define MCHBAR_PEI_VERSION	0x5034
15 #define MCH_PKG_POWER_LIMIT_LO	0x59a0
16 #define MCH_PKG_POWER_LIMIT_HI	0x59a4
17 #define MCH_DDR_POWER_LIMIT_LO	0x58e0
18 #define MCH_DDR_POWER_LIMIT_HI	0x58e4
19 
20 /* Access the Root Complex Register Block */
21 #define RCB_BASE_ADDRESS	0xfed1c000
22 #define RCB_REG(reg)		(RCB_BASE_ADDRESS + (reg))
23 
24 #define SOFT_RESET_CTRL		0x38f4
25 #define SOFT_RESET_DATA		0x38f8
26 
27 #endif
28