1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2020 Stefan Roese <sr@denx.de>
4 */
5
6 #include <config.h>
7 #include <dm.h>
8 #include <ram.h>
9 #include <asm/global_data.h>
10 #include <linux/compat.h>
11 #include <display_options.h>
12
13 DECLARE_GLOBAL_DATA_PTR;
14
15 #define UBOOT_RAM_SIZE_MAX 0x10000000ULL
16
dram_init(void)17 int dram_init(void)
18 {
19 if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
20 struct ram_info ram;
21 struct udevice *dev;
22 int ret;
23
24 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
25 if (ret) {
26 debug("DRAM init failed: %d\n", ret);
27 return ret;
28 }
29
30 ret = ram_get_info(dev, &ram);
31 if (ret) {
32 debug("Cannot get DRAM size: %d\n", ret);
33 return ret;
34 }
35
36 gd->ram_size = ram.size;
37 debug("SDRAM base=%lx, size=%lx\n",
38 (unsigned long)ram.base, (unsigned long)ram.size);
39 } else {
40 /*
41 * No DDR init yet -> run in L2 cache
42 */
43 gd->ram_size = (4 << 20);
44 gd->bd->bi_dram[0].size = gd->ram_size;
45 gd->bd->bi_dram[1].size = 0;
46 }
47
48 return 0;
49 }
50
board_add_ram_info(int use_default)51 void board_add_ram_info(int use_default)
52 {
53 if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
54 struct ram_info ram;
55 struct udevice *dev;
56 int ret;
57
58 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
59 if (ret) {
60 debug("DRAM init failed: %d\n", ret);
61 return;
62 }
63
64 ret = ram_get_info(dev, &ram);
65 if (ret) {
66 debug("Cannot get DRAM size: %d\n", ret);
67 return;
68 }
69
70 printf(" (");
71 print_size(ram.size, " total)");
72 }
73 }
74
get_effective_memsize(void)75 phys_size_t get_effective_memsize(void)
76 {
77 return UBOOT_RAM_SIZE_MAX;
78 }
79
board_get_usable_ram_top(ulong total_size)80 ulong board_get_usable_ram_top(ulong total_size)
81 {
82 if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
83 /* Map a maximum of 256MiB - return not size but address */
84 return CONFIG_SYS_SDRAM_BASE + min(gd->ram_size,
85 UBOOT_RAM_SIZE_MAX);
86 } else {
87 return gd->ram_top;
88 }
89 }
90