1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
4 */
5
6#include <dt-bindings/pinctrl/k3.h>
7#include <dt-bindings/net/ti-dp83867.h>
8
9/ {
10	chosen {
11		stdout-path = "serial2:115200n8";
12	};
13
14	aliases {
15		serial2 = &main_uart0;
16		ethernet0 = &cpsw_port1;
17		usb0 = &usb0;
18		usb1 = &usb1;
19		spi0 = &ospi0;
20		spi1 = &ospi1;
21	};
22};
23
24&cbass_main{
25	u-boot,dm-spl;
26	main-navss {
27		u-boot,dm-spl;
28	};
29};
30
31&cbass_mcu {
32	u-boot,dm-spl;
33
34	mcu-navss {
35		u-boot,dm-spl;
36
37		ringacc@2b800000 {
38			u-boot,dm-spl;
39			ti,dma-ring-reset-quirk;
40		};
41
42		dma-controller@285c0000 {
43			u-boot,dm-spl;
44		};
45	};
46};
47
48&cbass_wakeup {
49	u-boot,dm-spl;
50
51	chipid@43000014 {
52		u-boot,dm-spl;
53	};
54};
55
56&secure_proxy_main {
57	u-boot,dm-spl;
58};
59
60&dmsc {
61	u-boot,dm-spl;
62	k3_sysreset: sysreset-controller {
63		compatible = "ti,sci-sysreset";
64		u-boot,dm-spl;
65	};
66};
67
68&k3_pds {
69	u-boot,dm-spl;
70};
71
72&k3_clks {
73	u-boot,dm-spl;
74};
75
76&k3_reset {
77	u-boot,dm-spl;
78};
79
80&wkup_pmx0 {
81	u-boot,dm-spl;
82
83	wkup_i2c0_pins_default {
84		u-boot,dm-spl;
85	};
86};
87
88&main_pmx0 {
89	u-boot,dm-spl;
90	usb0_pins_default: usb0_pins_default {
91		pinctrl-single,pins = <
92			AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
93		>;
94		u-boot,dm-spl;
95	};
96};
97
98&main_uart0_pins_default {
99	u-boot,dm-spl;
100};
101
102&main_pmx1 {
103	u-boot,dm-spl;
104};
105
106&wkup_pmx0 {
107	mcu-fss0-ospi0-pins-default {
108		u-boot,dm-spl;
109	};
110};
111
112&main_uart0 {
113	u-boot,dm-spl;
114};
115
116&main_mmc0_pins_default {
117	u-boot,dm-spl;
118};
119
120&main_mmc1_pins_default {
121	u-boot,dm-spl;
122};
123
124&sdhci0 {
125	u-boot,dm-spl;
126};
127
128&sdhci1 {
129	u-boot,dm-spl;
130};
131
132&davinci_mdio {
133	phy0: ethernet-phy@0 {
134		reg = <0>;
135		/* TODO: phy reset: TCA9555RTWR(i2c:0x21)[p04].GPIO_MCU_RGMII_RSTN */
136		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
137		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
138	};
139};
140
141&mcu_cpsw {
142	reg = <0x0 0x46000000 0x0 0x200000>,
143	      <0x0 0x40f00200 0x0 0x2>;
144	reg-names = "cpsw_nuss", "mac_efuse";
145	/delete-property/ ranges;
146
147	cpsw-phy-sel@40f04040 {
148		compatible = "ti,am654-cpsw-phy-sel";
149		reg= <0x0 0x40f04040 0x0 0x4>;
150		reg-names = "gmii-sel";
151	};
152};
153
154&wkup_i2c0 {
155	u-boot,dm-spl;
156};
157
158&usb1 {
159	dr_mode = "peripheral";
160};
161
162&fss {
163	u-boot,dm-spl;
164};
165
166&ospi0 {
167	u-boot,dm-spl;
168
169	 flash@0{
170		u-boot,dm-spl;
171	};
172};
173
174&dwc3_0 {
175	status = "okay";
176	u-boot,dm-spl;
177};
178
179&usb0_phy {
180	status = "okay";
181	u-boot,dm-spl;
182};
183
184&usb0 {
185	pinctrl-names = "default";
186	pinctrl-0 = <&usb0_pins_default>;
187	dr_mode = "host";
188	u-boot,dm-spl;
189};
190
191&scm_conf {
192	u-boot,dm-spl;
193};
194