1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2008,2010 Freescale Semiconductor, Inc.
4 * Copyright 2019 NXP
5 * Author: Dave Liu <daveliu@freescale.com>
6 */
7
8 #include <common.h>
9 #include <blk.h>
10 #include <command.h>
11 #include <console.h>
12 #include <cpu_func.h>
13 #include <log.h>
14 #include <asm/io.h>
15 #include <asm/processor.h>
16 #include <asm/fsl_serdes.h>
17 #include <malloc.h>
18 #include <libata.h>
19 #include <fis.h>
20 #include <sata.h>
21 #include <linux/delay.h>
22 #include "fsl_sata.h"
23
24 #if CONFIG_IS_ENABLED(BLK)
25 #include <dm.h>
26 #include <ahci.h>
27 #include <blk.h>
28 #include <dm/device-internal.h>
29 #else
30 #ifndef CONFIG_SYS_SATA1_FLAGS
31 #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
32 #endif
33 #ifndef CONFIG_SYS_SATA2_FLAGS
34 #define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
35 #endif
36
37 static struct fsl_sata_info fsl_sata_info[] = {
38 #ifdef CONFIG_SATA1
39 {CONFIG_SYS_SATA1, CONFIG_SYS_SATA1_FLAGS},
40 #else
41 {0, 0},
42 #endif
43 #ifdef CONFIG_SATA2
44 {CONFIG_SYS_SATA2, CONFIG_SYS_SATA2_FLAGS},
45 #else
46 {0, 0},
47 #endif
48 };
49 #endif
50
sdelay(unsigned long sec)51 static inline void sdelay(unsigned long sec)
52 {
53 unsigned long i;
54 for (i = 0; i < sec; i++)
55 mdelay(1000);
56 }
57
fsl_sata_dump_sfis(struct sata_fis_d2h * s)58 static void fsl_sata_dump_sfis(struct sata_fis_d2h *s)
59 {
60 printf("Status FIS dump:\n\r");
61 printf("fis_type: %02x\n\r", s->fis_type);
62 printf("pm_port_i: %02x\n\r", s->pm_port_i);
63 printf("status: %02x\n\r", s->status);
64 printf("error: %02x\n\r", s->error);
65 printf("lba_low: %02x\n\r", s->lba_low);
66 printf("lba_mid: %02x\n\r", s->lba_mid);
67 printf("lba_high: %02x\n\r", s->lba_high);
68 printf("device: %02x\n\r", s->device);
69 printf("lba_low_exp: %02x\n\r", s->lba_low_exp);
70 printf("lba_mid_exp: %02x\n\r", s->lba_mid_exp);
71 printf("lba_high_exp: %02x\n\r", s->lba_high_exp);
72 printf("res1: %02x\n\r", s->res1);
73 printf("sector_count: %02x\n\r", s->sector_count);
74 printf("sector_count_exp: %02x\n\r", s->sector_count_exp);
75 }
76
ata_wait_register(unsigned __iomem * addr,u32 mask,u32 val,u32 timeout_msec)77 static int ata_wait_register(unsigned __iomem *addr, u32 mask,
78 u32 val, u32 timeout_msec)
79 {
80 int i;
81 u32 temp;
82
83 for (i = 0; (((temp = in_le32(addr)) & mask) != val)
84 && i < timeout_msec; i++)
85 mdelay(1);
86 return (i < timeout_msec) ? 0 : -1;
87 }
88
89 #if !CONFIG_IS_ENABLED(BLK)
init_sata(int dev)90 int init_sata(int dev)
91 #else
92 static int init_sata(struct fsl_ata_priv *priv, int dev)
93 #endif
94 {
95 u32 length, align;
96 cmd_hdr_tbl_t *cmd_hdr;
97 u32 cda;
98 u32 val32;
99 fsl_sata_reg_t __iomem *reg;
100 u32 sig;
101 int i;
102 fsl_sata_t *sata;
103
104 if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) {
105 printf("the sata index %d is out of ranges\n\r", dev);
106 return -1;
107 }
108
109 #ifdef CONFIG_MPC85xx
110 if ((dev == 0) && (!is_serdes_configured(SATA1))) {
111 printf("SATA%d [dev = %d] is not enabled\n", dev+1, dev);
112 return -1;
113 }
114 if ((dev == 1) && (!is_serdes_configured(SATA2))) {
115 printf("SATA%d [dev = %d] is not enabled\n", dev+1, dev);
116 return -1;
117 }
118 #endif
119
120 /* Allocate SATA device driver struct */
121 sata = (fsl_sata_t *)malloc(sizeof(fsl_sata_t));
122 if (!sata) {
123 printf("alloc the sata device struct failed\n\r");
124 return -1;
125 }
126 /* Zero all of the device driver struct */
127 memset((void *)sata, 0, sizeof(fsl_sata_t));
128
129 snprintf(sata->name, 12, "SATA%d:", dev);
130
131 /* Set the controller register base address to device struct */
132 #if !CONFIG_IS_ENABLED(BLK)
133 sata_dev_desc[dev].priv = (void *)sata;
134 reg = (fsl_sata_reg_t *)(fsl_sata_info[dev].sata_reg_base);
135 sata->dma_flag = fsl_sata_info[dev].flags;
136 #else
137 reg = (fsl_sata_reg_t *)(priv->base + priv->offset * dev);
138 sata->dma_flag = priv->flag;
139 priv->fsl_sata = sata;
140 #endif
141 sata->reg_base = reg;
142
143 /* Allocate the command header table, 4 bytes aligned */
144 length = sizeof(struct cmd_hdr_tbl);
145 align = SATA_HC_CMD_HDR_TBL_ALIGN;
146 sata->cmd_hdr_tbl_offset = (void *)malloc(length + align);
147 if (!sata->cmd_hdr_tbl_offset) {
148 printf("alloc the command header failed\n\r");
149 return -1;
150 }
151
152 cmd_hdr = (cmd_hdr_tbl_t *)(((u32)sata->cmd_hdr_tbl_offset + align)
153 & ~(align - 1));
154 sata->cmd_hdr = cmd_hdr;
155
156 /* Zero all of the command header table */
157 memset((void *)sata->cmd_hdr_tbl_offset, 0, length + align);
158
159 /* Allocate command descriptor for all command */
160 length = sizeof(struct cmd_desc) * SATA_HC_MAX_CMD;
161 align = SATA_HC_CMD_DESC_ALIGN;
162 sata->cmd_desc_offset = (void *)malloc(length + align);
163 if (!sata->cmd_desc_offset) {
164 printf("alloc the command descriptor failed\n\r");
165 return -1;
166 }
167 sata->cmd_desc = (cmd_desc_t *)(((u32)sata->cmd_desc_offset + align)
168 & ~(align - 1));
169 /* Zero all of command descriptor */
170 memset((void *)sata->cmd_desc_offset, 0, length + align);
171
172 /* Link the command descriptor to command header */
173 for (i = 0; i < SATA_HC_MAX_CMD; i++) {
174 cda = ((u32)sata->cmd_desc + SATA_HC_CMD_DESC_SIZE * i)
175 & ~(CMD_HDR_CDA_ALIGN - 1);
176 cmd_hdr->cmd_slot[i].cda = cpu_to_le32(cda);
177 }
178
179 /* To have safe state, force the controller offline */
180 val32 = in_le32(®->hcontrol);
181 val32 &= ~HCONTROL_ONOFF;
182 val32 |= HCONTROL_FORCE_OFFLINE;
183 out_le32(®->hcontrol, val32);
184
185 /* Wait the controller offline */
186 ata_wait_register(®->hstatus, HSTATUS_ONOFF, 0, 1000);
187
188 /* Set the command header base address to CHBA register to tell DMA */
189 out_le32(®->chba, (u32)cmd_hdr & ~0x3);
190
191 /* Snoop for the command header */
192 val32 = in_le32(®->hcontrol);
193 val32 |= HCONTROL_HDR_SNOOP;
194 out_le32(®->hcontrol, val32);
195
196 /* Disable all of interrupts */
197 val32 = in_le32(®->hcontrol);
198 val32 &= ~HCONTROL_INT_EN_ALL;
199 out_le32(®->hcontrol, val32);
200
201 /* Clear all of interrupts */
202 val32 = in_le32(®->hstatus);
203 out_le32(®->hstatus, val32);
204
205 /* Set the ICC, no interrupt coalescing */
206 out_le32(®->icc, 0x01000000);
207
208 /* No PM attatched, the SATA device direct connect */
209 out_le32(®->cqpmp, 0);
210
211 /* Clear SError register */
212 val32 = in_le32(®->serror);
213 out_le32(®->serror, val32);
214
215 /* Clear CER register */
216 val32 = in_le32(®->cer);
217 out_le32(®->cer, val32);
218
219 /* Clear DER register */
220 val32 = in_le32(®->der);
221 out_le32(®->der, val32);
222
223 /* No device detection or initialization action requested */
224 out_le32(®->scontrol, 0x00000300);
225
226 /* Configure the transport layer, default value */
227 out_le32(®->transcfg, 0x08000016);
228
229 /* Configure the link layer, default value */
230 out_le32(®->linkcfg, 0x0000ff34);
231
232 /* Bring the controller online */
233 val32 = in_le32(®->hcontrol);
234 val32 |= HCONTROL_ONOFF;
235 out_le32(®->hcontrol, val32);
236
237 mdelay(100);
238
239 /* print sata device name */
240 printf("%s ", sata->name);
241
242 /* Wait PHY RDY signal changed for 500ms */
243 ata_wait_register(®->hstatus, HSTATUS_PHY_RDY,
244 HSTATUS_PHY_RDY, 500);
245
246 /* Check PHYRDY */
247 val32 = in_le32(®->hstatus);
248 if (val32 & HSTATUS_PHY_RDY) {
249 sata->link = 1;
250 } else {
251 sata->link = 0;
252 printf("(No RDY)\n\r");
253 return -1;
254 }
255
256 /* Wait for signature updated, which is 1st D2H */
257 ata_wait_register(®->hstatus, HSTATUS_SIGNATURE,
258 HSTATUS_SIGNATURE, 10000);
259
260 if (val32 & HSTATUS_SIGNATURE) {
261 sig = in_le32(®->sig);
262 debug("Signature updated, the sig =%08x\n\r", sig);
263 sata->ata_device_type = ata_dev_classify(sig);
264 }
265
266 /* Check the speed */
267 val32 = in_le32(®->sstatus);
268 if ((val32 & SSTATUS_SPD_MASK) == SSTATUS_SPD_GEN1)
269 printf("(1.5 Gbps)\n\r");
270 else if ((val32 & SSTATUS_SPD_MASK) == SSTATUS_SPD_GEN2)
271 printf("(3 Gbps)\n\r");
272
273 return 0;
274 }
275
reset_sata(int dev)276 int reset_sata(int dev)
277 {
278 return 0;
279 }
280
fsl_sata_dump_regs(fsl_sata_reg_t __iomem * reg)281 static void fsl_sata_dump_regs(fsl_sata_reg_t __iomem *reg)
282 {
283 printf("\n\rSATA: %08x\n\r", (u32)reg);
284 printf("CQR: %08x\n\r", in_le32(®->cqr));
285 printf("CAR: %08x\n\r", in_le32(®->car));
286 printf("CCR: %08x\n\r", in_le32(®->ccr));
287 printf("CER: %08x\n\r", in_le32(®->cer));
288 printf("CQR: %08x\n\r", in_le32(®->cqr));
289 printf("DER: %08x\n\r", in_le32(®->der));
290 printf("CHBA: %08x\n\r", in_le32(®->chba));
291 printf("HStatus: %08x\n\r", in_le32(®->hstatus));
292 printf("HControl: %08x\n\r", in_le32(®->hcontrol));
293 printf("CQPMP: %08x\n\r", in_le32(®->cqpmp));
294 printf("SIG: %08x\n\r", in_le32(®->sig));
295 printf("ICC: %08x\n\r", in_le32(®->icc));
296 printf("SStatus: %08x\n\r", in_le32(®->sstatus));
297 printf("SError: %08x\n\r", in_le32(®->serror));
298 printf("SControl: %08x\n\r", in_le32(®->scontrol));
299 printf("SNotification: %08x\n\r", in_le32(®->snotification));
300 printf("TransCfg: %08x\n\r", in_le32(®->transcfg));
301 printf("TransStatus: %08x\n\r", in_le32(®->transstatus));
302 printf("LinkCfg: %08x\n\r", in_le32(®->linkcfg));
303 printf("LinkCfg1: %08x\n\r", in_le32(®->linkcfg1));
304 printf("LinkCfg2: %08x\n\r", in_le32(®->linkcfg2));
305 printf("LinkStatus: %08x\n\r", in_le32(®->linkstatus));
306 printf("LinkStatus1: %08x\n\r", in_le32(®->linkstatus1));
307 printf("PhyCtrlCfg: %08x\n\r", in_le32(®->phyctrlcfg));
308 printf("SYSPR: %08x\n\r", in_be32(®->syspr));
309 }
310
fsl_ata_exec_ata_cmd(struct fsl_sata * sata,struct sata_fis_h2d * cfis,int is_ncq,int tag,u8 * buffer,u32 len)311 static int fsl_ata_exec_ata_cmd(struct fsl_sata *sata, struct sata_fis_h2d *cfis,
312 int is_ncq, int tag, u8 *buffer, u32 len)
313 {
314 cmd_hdr_entry_t *cmd_hdr;
315 cmd_desc_t *cmd_desc;
316 sata_fis_h2d_t *h2d;
317 prd_entry_t *prde;
318 u32 ext_c_ddc;
319 u32 prde_count;
320 u32 val32;
321 u32 ttl;
322 fsl_sata_reg_t __iomem *reg = sata->reg_base;
323 int i;
324
325 /* Check xfer length */
326 if (len > SATA_HC_MAX_XFER_LEN) {
327 printf("max transfer length is 64MB\n\r");
328 return 0;
329 }
330
331 /* Setup the command descriptor */
332 cmd_desc = sata->cmd_desc + tag;
333
334 /* Get the pointer cfis of command descriptor */
335 h2d = (sata_fis_h2d_t *)cmd_desc->cfis;
336
337 /* Zero the cfis of command descriptor */
338 memset((void *)h2d, 0, SATA_HC_CMD_DESC_CFIS_SIZE);
339
340 /* Copy the cfis from user to command descriptor */
341 h2d->fis_type = cfis->fis_type;
342 h2d->pm_port_c = cfis->pm_port_c;
343 h2d->command = cfis->command;
344
345 h2d->features = cfis->features;
346 h2d->features_exp = cfis->features_exp;
347
348 h2d->lba_low = cfis->lba_low;
349 h2d->lba_mid = cfis->lba_mid;
350 h2d->lba_high = cfis->lba_high;
351 h2d->lba_low_exp = cfis->lba_low_exp;
352 h2d->lba_mid_exp = cfis->lba_mid_exp;
353 h2d->lba_high_exp = cfis->lba_high_exp;
354
355 if (!is_ncq) {
356 h2d->sector_count = cfis->sector_count;
357 h2d->sector_count_exp = cfis->sector_count_exp;
358 } else { /* NCQ */
359 h2d->sector_count = (u8)(tag << 3);
360 }
361
362 h2d->device = cfis->device;
363 h2d->control = cfis->control;
364
365 /* Setup the PRD table */
366 prde = (prd_entry_t *)cmd_desc->prdt;
367 memset((void *)prde, 0, sizeof(struct prdt));
368
369 prde_count = 0;
370 ttl = len;
371 for (i = 0; i < SATA_HC_MAX_PRD_DIRECT; i++) {
372 if (!len)
373 break;
374 prde->dba = cpu_to_le32((u32)buffer & ~0x3);
375 debug("dba = %08x\n\r", (u32)buffer);
376
377 if (len < PRD_ENTRY_MAX_XFER_SZ) {
378 ext_c_ddc = PRD_ENTRY_DATA_SNOOP | len;
379 debug("ext_c_ddc1 = %08x, len = %08x\n\r", ext_c_ddc, len);
380 prde->ext_c_ddc = cpu_to_le32(ext_c_ddc);
381 prde_count++;
382 prde++;
383 break;
384 } else {
385 ext_c_ddc = PRD_ENTRY_DATA_SNOOP; /* 4M bytes */
386 debug("ext_c_ddc2 = %08x, len = %08x\n\r", ext_c_ddc, len);
387 prde->ext_c_ddc = cpu_to_le32(ext_c_ddc);
388 buffer += PRD_ENTRY_MAX_XFER_SZ;
389 len -= PRD_ENTRY_MAX_XFER_SZ;
390 prde_count++;
391 prde++;
392 }
393 }
394
395 /* Setup the command slot of cmd hdr */
396 cmd_hdr = (cmd_hdr_entry_t *)&sata->cmd_hdr->cmd_slot[tag];
397
398 cmd_hdr->cda = cpu_to_le32((u32)cmd_desc & ~0x3);
399
400 val32 = prde_count << CMD_HDR_PRD_ENTRY_SHIFT;
401 val32 |= sizeof(sata_fis_h2d_t);
402 cmd_hdr->prde_fis_len = cpu_to_le32(val32);
403
404 cmd_hdr->ttl = cpu_to_le32(ttl);
405
406 if (!is_ncq) {
407 val32 = CMD_HDR_ATTR_RES | CMD_HDR_ATTR_SNOOP;
408 } else {
409 val32 = CMD_HDR_ATTR_RES | CMD_HDR_ATTR_SNOOP | CMD_HDR_ATTR_FPDMA;
410 }
411
412 tag &= CMD_HDR_ATTR_TAG;
413 val32 |= tag;
414
415 debug("attribute = %08x\n\r", val32);
416 cmd_hdr->attribute = cpu_to_le32(val32);
417
418 /* Make sure cmd desc and cmd slot valid before command issue */
419 sync();
420
421 /* PMP*/
422 val32 = (u32)(h2d->pm_port_c & 0x0f);
423 out_le32(®->cqpmp, val32);
424
425 /* Wait no active */
426 if (ata_wait_register(®->car, (1 << tag), 0, 10000))
427 printf("Wait no active time out\n\r");
428
429 /* Issue command */
430 if (!(in_le32(®->cqr) & (1 << tag))) {
431 val32 = 1 << tag;
432 out_le32(®->cqr, val32);
433 }
434
435 /* Wait command completed for 10s */
436 if (ata_wait_register(®->ccr, (1 << tag), (1 << tag), 10000)) {
437 if (!is_ncq)
438 printf("Non-NCQ command time out\n\r");
439 else
440 printf("NCQ command time out\n\r");
441 }
442
443 val32 = in_le32(®->cer);
444
445 if (val32) {
446 u32 der;
447 fsl_sata_dump_sfis((struct sata_fis_d2h *)cmd_desc->sfis);
448 printf("CE at device\n\r");
449 fsl_sata_dump_regs(reg);
450 der = in_le32(®->der);
451 out_le32(®->cer, val32);
452 out_le32(®->der, der);
453 }
454
455 /* Clear complete flags */
456 val32 = in_le32(®->ccr);
457 out_le32(®->ccr, val32);
458
459 return len;
460 }
461
fsl_ata_exec_reset_cmd(struct fsl_sata * sata,struct sata_fis_h2d * cfis,int tag,u8 * buffer,u32 len)462 static int fsl_ata_exec_reset_cmd(struct fsl_sata *sata, struct sata_fis_h2d *cfis,
463 int tag, u8 *buffer, u32 len)
464 {
465 return 0;
466 }
467
fsl_sata_exec_cmd(struct fsl_sata * sata,struct sata_fis_h2d * cfis,enum cmd_type command_type,int tag,u8 * buffer,u32 len)468 static int fsl_sata_exec_cmd(struct fsl_sata *sata, struct sata_fis_h2d *cfis,
469 enum cmd_type command_type, int tag, u8 *buffer, u32 len)
470 {
471 int rc;
472
473 if (tag > SATA_HC_MAX_CMD || tag < 0) {
474 printf("tag is out of range, tag=%d\n\r", tag);
475 return -1;
476 }
477
478 switch (command_type) {
479 case CMD_ATA:
480 rc = fsl_ata_exec_ata_cmd(sata, cfis, 0, tag, buffer, len);
481 return rc;
482 case CMD_RESET:
483 rc = fsl_ata_exec_reset_cmd(sata, cfis, tag, buffer, len);
484 return rc;
485 case CMD_NCQ:
486 rc = fsl_ata_exec_ata_cmd(sata, cfis, 1, tag, buffer, len);
487 return rc;
488 case CMD_ATAPI:
489 case CMD_VENDOR_BIST:
490 case CMD_BIST:
491 printf("not support now\n\r");
492 return -1;
493 default:
494 break;
495 }
496
497 return -1;
498 }
499
fsl_sata_xfer_mode(fsl_sata_t * sata,u16 * id)500 static void fsl_sata_xfer_mode(fsl_sata_t *sata, u16 *id)
501 {
502 sata->pio = id[ATA_ID_PIO_MODES];
503 sata->mwdma = id[ATA_ID_MWDMA_MODES];
504 sata->udma = id[ATA_ID_UDMA_MODES];
505 debug("pio %04x, mwdma %04x, udma %04x\n\r", sata->pio, sata->mwdma, sata->udma);
506 }
507
fsl_sata_set_features(fsl_sata_t * sata)508 static void fsl_sata_set_features(fsl_sata_t *sata)
509 {
510 struct sata_fis_h2d h2d, *cfis = &h2d;
511 u8 udma_cap;
512
513 memset(cfis, 0, sizeof(struct sata_fis_h2d));
514
515 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
516 cfis->pm_port_c = 0x80; /* is command */
517 cfis->command = ATA_CMD_SET_FEATURES;
518 cfis->features = SETFEATURES_XFER;
519
520 /* First check the device capablity */
521 udma_cap = (u8)(sata->udma & 0xff);
522 debug("udma_cap %02x\n\r", udma_cap);
523
524 if (udma_cap == ATA_UDMA6)
525 cfis->sector_count = XFER_UDMA_6;
526 if (udma_cap == ATA_UDMA5)
527 cfis->sector_count = XFER_UDMA_5;
528 if (udma_cap == ATA_UDMA4)
529 cfis->sector_count = XFER_UDMA_4;
530 if (udma_cap == ATA_UDMA3)
531 cfis->sector_count = XFER_UDMA_3;
532
533 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0);
534 }
535
fsl_sata_rw_cmd(fsl_sata_t * sata,u32 start,u32 blkcnt,u8 * buffer,int is_write)536 static u32 fsl_sata_rw_cmd(fsl_sata_t *sata, u32 start, u32 blkcnt, u8 *buffer,
537 int is_write)
538 {
539 struct sata_fis_h2d h2d, *cfis = &h2d;
540 u32 block;
541
542 block = start;
543
544 memset(cfis, 0, sizeof(struct sata_fis_h2d));
545
546 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
547 cfis->pm_port_c = 0x80; /* is command */
548 cfis->command = (is_write) ? ATA_CMD_WRITE : ATA_CMD_READ;
549 cfis->device = ATA_LBA;
550
551 cfis->device |= (block >> 24) & 0xf;
552 cfis->lba_high = (block >> 16) & 0xff;
553 cfis->lba_mid = (block >> 8) & 0xff;
554 cfis->lba_low = block & 0xff;
555 cfis->sector_count = (u8)(blkcnt & 0xff);
556
557 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, buffer, ATA_SECT_SIZE * blkcnt);
558 return blkcnt;
559 }
560
fsl_sata_flush_cache(fsl_sata_t * sata)561 static void fsl_sata_flush_cache(fsl_sata_t *sata)
562 {
563 struct sata_fis_h2d h2d, *cfis = &h2d;
564
565 memset(cfis, 0, sizeof(struct sata_fis_h2d));
566
567 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
568 cfis->pm_port_c = 0x80; /* is command */
569 cfis->command = ATA_CMD_FLUSH;
570
571 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0);
572 }
573
fsl_sata_rw_cmd_ext(fsl_sata_t * sata,u32 start,u32 blkcnt,u8 * buffer,int is_write)574 static u32 fsl_sata_rw_cmd_ext(fsl_sata_t *sata, u32 start, u32 blkcnt,
575 u8 *buffer, int is_write)
576 {
577 struct sata_fis_h2d h2d, *cfis = &h2d;
578 u64 block;
579
580 block = (u64)start;
581
582 memset(cfis, 0, sizeof(struct sata_fis_h2d));
583
584 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
585 cfis->pm_port_c = 0x80; /* is command */
586
587 cfis->command = (is_write) ? ATA_CMD_WRITE_EXT
588 : ATA_CMD_READ_EXT;
589
590 cfis->lba_high_exp = (block >> 40) & 0xff;
591 cfis->lba_mid_exp = (block >> 32) & 0xff;
592 cfis->lba_low_exp = (block >> 24) & 0xff;
593 cfis->lba_high = (block >> 16) & 0xff;
594 cfis->lba_mid = (block >> 8) & 0xff;
595 cfis->lba_low = block & 0xff;
596 cfis->device = ATA_LBA;
597 cfis->sector_count_exp = (blkcnt >> 8) & 0xff;
598 cfis->sector_count = blkcnt & 0xff;
599
600 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, buffer, ATA_SECT_SIZE * blkcnt);
601 return blkcnt;
602 }
603
fsl_sata_rw_ncq_cmd(fsl_sata_t * sata,u32 start,u32 blkcnt,u8 * buffer,int is_write)604 static u32 fsl_sata_rw_ncq_cmd(fsl_sata_t *sata, u32 start, u32 blkcnt,
605 u8 *buffer, int is_write)
606 {
607 struct sata_fis_h2d h2d, *cfis = &h2d;
608 int ncq_channel;
609 u64 block;
610
611 if (sata->lba48 != 1) {
612 printf("execute FPDMA command on non-LBA48 hard disk\n\r");
613 return -1;
614 }
615
616 block = (u64)start;
617
618 memset(cfis, 0, sizeof(struct sata_fis_h2d));
619
620 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
621 cfis->pm_port_c = 0x80; /* is command */
622
623 cfis->command = (is_write) ? ATA_CMD_FPDMA_WRITE
624 : ATA_CMD_FPDMA_READ;
625
626 cfis->lba_high_exp = (block >> 40) & 0xff;
627 cfis->lba_mid_exp = (block >> 32) & 0xff;
628 cfis->lba_low_exp = (block >> 24) & 0xff;
629 cfis->lba_high = (block >> 16) & 0xff;
630 cfis->lba_mid = (block >> 8) & 0xff;
631 cfis->lba_low = block & 0xff;
632
633 cfis->device = ATA_LBA;
634 cfis->features_exp = (blkcnt >> 8) & 0xff;
635 cfis->features = blkcnt & 0xff;
636
637 if (sata->queue_depth >= SATA_HC_MAX_CMD)
638 ncq_channel = SATA_HC_MAX_CMD - 1;
639 else
640 ncq_channel = sata->queue_depth - 1;
641
642 /* Use the latest queue */
643 fsl_sata_exec_cmd(sata, cfis, CMD_NCQ, ncq_channel, buffer, ATA_SECT_SIZE * blkcnt);
644 return blkcnt;
645 }
646
fsl_sata_flush_cache_ext(fsl_sata_t * sata)647 static void fsl_sata_flush_cache_ext(fsl_sata_t *sata)
648 {
649 struct sata_fis_h2d h2d, *cfis = &h2d;
650
651 memset(cfis, 0, sizeof(struct sata_fis_h2d));
652
653 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
654 cfis->pm_port_c = 0x80; /* is command */
655 cfis->command = ATA_CMD_FLUSH_EXT;
656
657 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0);
658 }
659
fsl_sata_init_wcache(fsl_sata_t * sata,u16 * id)660 static void fsl_sata_init_wcache(fsl_sata_t *sata, u16 *id)
661 {
662 if (ata_id_has_wcache(id) && ata_id_wcache_enabled(id))
663 sata->wcache = 1;
664 if (ata_id_has_flush(id))
665 sata->flush = 1;
666 if (ata_id_has_flush_ext(id))
667 sata->flush_ext = 1;
668 }
669
ata_low_level_rw_lba48(fsl_sata_t * sata,u32 blknr,lbaint_t blkcnt,const void * buffer,int is_write)670 static u32 ata_low_level_rw_lba48(fsl_sata_t *sata, u32 blknr, lbaint_t blkcnt,
671 const void *buffer, int is_write)
672 {
673 u32 start, blks;
674 u8 *addr;
675 int max_blks;
676
677 start = blknr;
678 blks = blkcnt;
679 addr = (u8 *)buffer;
680
681 max_blks = ATA_MAX_SECTORS_LBA48;
682 do {
683 if (blks > max_blks) {
684 if (sata->dma_flag != FLAGS_FPDMA)
685 fsl_sata_rw_cmd_ext(sata, start, max_blks, addr,
686 is_write);
687 else
688 fsl_sata_rw_ncq_cmd(sata, start, max_blks, addr,
689 is_write);
690 start += max_blks;
691 blks -= max_blks;
692 addr += ATA_SECT_SIZE * max_blks;
693 } else {
694 if (sata->dma_flag != FLAGS_FPDMA)
695 fsl_sata_rw_cmd_ext(sata, start, blks, addr,
696 is_write);
697 else
698 fsl_sata_rw_ncq_cmd(sata, start, blks, addr,
699 is_write);
700 start += blks;
701 blks = 0;
702 addr += ATA_SECT_SIZE * blks;
703 }
704 } while (blks != 0);
705
706 return blkcnt;
707 }
708
ata_low_level_rw_lba28(fsl_sata_t * sata,u32 blknr,u32 blkcnt,const void * buffer,int is_write)709 static u32 ata_low_level_rw_lba28(fsl_sata_t *sata, u32 blknr, u32 blkcnt,
710 const void *buffer, int is_write)
711 {
712 u32 start, blks;
713 u8 *addr;
714 int max_blks;
715
716 start = blknr;
717 blks = blkcnt;
718 addr = (u8 *)buffer;
719
720 max_blks = ATA_MAX_SECTORS;
721 do {
722 if (blks > max_blks) {
723 fsl_sata_rw_cmd(sata, start, max_blks, addr, is_write);
724 start += max_blks;
725 blks -= max_blks;
726 addr += ATA_SECT_SIZE * max_blks;
727 } else {
728 fsl_sata_rw_cmd(sata, start, blks, addr, is_write);
729 start += blks;
730 blks = 0;
731 addr += ATA_SECT_SIZE * blks;
732 }
733 } while (blks != 0);
734
735 return blkcnt;
736 }
737
738 /*
739 * SATA interface between low level driver and command layer
740 */
741 #if !CONFIG_IS_ENABLED(BLK)
sata_read(int dev,ulong blknr,lbaint_t blkcnt,void * buffer)742 ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)
743 {
744 fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
745 #else
746 static ulong sata_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
747 void *buffer)
748 {
749 struct fsl_ata_priv *priv = dev_get_plat(dev);
750 fsl_sata_t *sata = priv->fsl_sata;
751 #endif
752 u32 rc;
753
754 if (sata->lba48)
755 rc = ata_low_level_rw_lba48(sata, blknr, blkcnt, buffer,
756 READ_CMD);
757 else
758 rc = ata_low_level_rw_lba28(sata, blknr, blkcnt, buffer,
759 READ_CMD);
760 return rc;
761 }
762
763 #if !CONFIG_IS_ENABLED(BLK)
764 ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)
765 {
766 fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
767 #else
768 static ulong sata_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
769 const void *buffer)
770 {
771 struct fsl_ata_priv *priv = dev_get_plat(dev);
772 fsl_sata_t *sata = priv->fsl_sata;
773 #endif
774 u32 rc;
775
776 if (sata->lba48) {
777 rc = ata_low_level_rw_lba48(sata, blknr, blkcnt, buffer,
778 WRITE_CMD);
779 if (sata->wcache && sata->flush_ext)
780 fsl_sata_flush_cache_ext(sata);
781 } else {
782 rc = ata_low_level_rw_lba28(sata, blknr, blkcnt, buffer,
783 WRITE_CMD);
784 if (sata->wcache && sata->flush)
785 fsl_sata_flush_cache(sata);
786 }
787 return rc;
788 }
789
790 static void fsl_sata_identify(fsl_sata_t *sata, u16 *id)
791 {
792 struct sata_fis_h2d h2d, *cfis = &h2d;
793
794 memset(cfis, 0, sizeof(struct sata_fis_h2d));
795
796 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
797 cfis->pm_port_c = 0x80; /* is command */
798 cfis->command = ATA_CMD_ID_ATA;
799
800 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, (u8 *)id, ATA_ID_WORDS * 2);
801 ata_swap_buf_le16(id, ATA_ID_WORDS);
802 }
803
804 #if !CONFIG_IS_ENABLED(BLK)
805 int scan_sata(int dev)
806 {
807 fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
808 #else
809 static int scan_sata(struct udevice *dev)
810 {
811 struct blk_desc *desc = dev_get_uclass_plat(dev);
812 struct fsl_ata_priv *priv = dev_get_plat(dev);
813 fsl_sata_t *sata = priv->fsl_sata;
814 #endif
815
816 unsigned char serial[ATA_ID_SERNO_LEN + 1];
817 unsigned char firmware[ATA_ID_FW_REV_LEN + 1];
818 unsigned char product[ATA_ID_PROD_LEN + 1];
819 u16 *id;
820 u64 n_sectors;
821
822 /* if no detected link */
823 if (!sata->link)
824 return -1;
825
826 id = (u16 *)malloc(ATA_ID_WORDS * 2);
827 if (!id) {
828 printf("id malloc failed\n\r");
829 return -1;
830 }
831
832 /* Identify device to get information */
833 fsl_sata_identify(sata, id);
834
835 /* Serial number */
836 ata_id_c_string(id, serial, ATA_ID_SERNO, sizeof(serial));
837
838 /* Firmware version */
839 ata_id_c_string(id, firmware, ATA_ID_FW_REV, sizeof(firmware));
840
841 /* Product model */
842 ata_id_c_string(id, product, ATA_ID_PROD, sizeof(product));
843
844 /* Totoal sectors */
845 n_sectors = ata_id_n_sectors(id);
846
847 #ifdef CONFIG_LBA48
848 /* Check if support LBA48 */
849 if (ata_id_has_lba48(id)) {
850 sata->lba48 = 1;
851 debug("Device support LBA48\n\r");
852 } else
853 debug("Device supports LBA28\n\r");
854 #endif
855
856 #if !CONFIG_IS_ENABLED(BLK)
857 memcpy(sata_dev_desc[dev].product, serial, sizeof(serial));
858 memcpy(sata_dev_desc[dev].revision, firmware, sizeof(firmware));
859 memcpy(sata_dev_desc[dev].vendor, product, sizeof(product));
860 sata_dev_desc[dev].lba = (u32)n_sectors;
861 #ifdef CONFIG_LBA48
862 sata_dev_desc[dev].lba48 = sata->lba48;
863 #endif
864 #else
865 memcpy(desc->product, serial, sizeof(serial));
866 memcpy(desc->revision, firmware, sizeof(firmware));
867 memcpy(desc->vendor, product, sizeof(product));
868 desc->lba = n_sectors;
869 #ifdef CONFIG_LBA48
870 desc->lba48 = sata->lba48;
871 #endif
872 #endif
873
874 /* Get the NCQ queue depth from device */
875 sata->queue_depth = ata_id_queue_depth(id);
876
877 /* Get the xfer mode from device */
878 fsl_sata_xfer_mode(sata, id);
879
880 /* Get the write cache status from device */
881 fsl_sata_init_wcache(sata, id);
882
883 /* Set the xfer mode to highest speed */
884 fsl_sata_set_features(sata);
885
886 #ifdef DEBUG
887 ata_dump_id(id);
888 #endif
889 free((void *)id);
890 return 0;
891 }
892
893 #if CONFIG_IS_ENABLED(BLK)
894 static const struct blk_ops sata_fsl_blk_ops = {
895 .read = sata_read,
896 .write = sata_write,
897 };
898
899 U_BOOT_DRIVER(sata_fsl_driver) = {
900 .name = "sata_fsl_blk",
901 .id = UCLASS_BLK,
902 .ops = &sata_fsl_blk_ops,
903 .plat_auto = sizeof(struct fsl_ata_priv),
904 };
905
906 static int fsl_ata_of_to_plat(struct udevice *dev)
907 {
908 struct fsl_ata_priv *priv = dev_get_priv(dev);
909
910 priv->number = dev_read_u32_default(dev, "sata-number", -1);
911 priv->flag = dev_read_u32_default(dev, "sata-fpdma", -1);
912 priv->offset = dev_read_u32_default(dev, "sata-offset", -1);
913
914 priv->base = dev_read_addr(dev);
915 if (priv->base == FDT_ADDR_T_NONE)
916 return -EINVAL;
917
918 return 0;
919 }
920
921 static int fsl_unbind_device(struct udevice *dev)
922 {
923 int ret;
924
925 ret = device_remove(dev, DM_REMOVE_NORMAL);
926 if (ret)
927 return ret;
928
929 ret = device_unbind(dev);
930 if (ret)
931 return ret;
932
933 return 0;
934 }
935
936 static int fsl_ata_probe(struct udevice *dev)
937 {
938 struct fsl_ata_priv *blk_priv, *priv;
939 struct udevice *blk;
940 int failed_number;
941 char sata_name[10];
942 int nr_ports;
943 int ret;
944 int i;
945
946 failed_number = 0;
947 priv = dev_get_priv(dev);
948 nr_ports = priv->number;
949 nr_ports = min(nr_ports, CONFIG_SYS_SATA_MAX_DEVICE);
950
951 for (i = 0; i < nr_ports; i++) {
952 snprintf(sata_name, sizeof(sata_name), "fsl_sata%d", i);
953 ret = blk_create_devicef(dev, "sata_fsl_blk", sata_name,
954 IF_TYPE_SATA, -1, 512, 0, &blk);
955 if (ret) {
956 debug("Can't create device\n");
957 return ret;
958 }
959
960 /* Init SATA port */
961 ret = init_sata(priv, i);
962 if (ret) {
963 debug("%s: Failed to init sata\n", __func__);
964 ret = fsl_unbind_device(blk);
965 if (ret)
966 return ret;
967
968 failed_number++;
969 continue;
970 }
971
972 blk_priv = dev_get_plat(blk);
973 blk_priv->fsl_sata = priv->fsl_sata;
974 /* Scan SATA port */
975 ret = scan_sata(blk);
976 if (ret) {
977 debug("%s: Failed to scan bus\n", __func__);
978 ret = fsl_unbind_device(blk);
979 if (ret)
980 return ret;
981
982 failed_number++;
983 continue;
984 }
985 }
986
987 if (failed_number == nr_ports)
988 return -ENODEV;
989 else
990 return 0;
991 }
992
993 static int fsl_ata_remove(struct udevice *dev)
994 {
995 fsl_sata_t *sata;
996 struct fsl_ata_priv *priv;
997
998 priv = dev_get_priv(dev);
999 sata = priv->fsl_sata;
1000
1001 free(sata->cmd_hdr_tbl_offset);
1002 free(sata->cmd_desc_offset);
1003 free(sata);
1004
1005 return 0;
1006 }
1007
1008 static int sata_fsl_scan(struct udevice *dev)
1009 {
1010 /* Nothing to do here */
1011
1012 return 0;
1013 }
1014
1015 struct ahci_ops sata_fsl_ahci_ops = {
1016 .scan = sata_fsl_scan,
1017 };
1018
1019 static const struct udevice_id fsl_ata_ids[] = {
1020 { .compatible = "fsl,pq-sata-v2" },
1021 { }
1022 };
1023
1024 U_BOOT_DRIVER(fsl_ahci) = {
1025 .name = "fsl_ahci",
1026 .id = UCLASS_AHCI,
1027 .of_match = fsl_ata_ids,
1028 .ops = &sata_fsl_ahci_ops,
1029 .of_to_plat = fsl_ata_of_to_plat,
1030 .probe = fsl_ata_probe,
1031 .remove = fsl_ata_remove,
1032 .priv_auto = sizeof(struct fsl_ata_priv),
1033 };
1034 #endif
1035