1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2020 NXP
4 */
5
6 #include <common.h>
7 #include <dm.h>
8 #include <errno.h>
9 #include <miiphy.h>
10 #include <asm/io.h>
11 #include <fsl_memac.h>
12
13 #ifdef CONFIG_SYS_MEMAC_LITTLE_ENDIAN
14 #define memac_out_32(a, v) out_le32(a, v)
15 #define memac_clrbits_32(a, v) clrbits_le32(a, v)
16 #define memac_setbits_32(a, v) setbits_le32(a, v)
17 #else
18 #define memac_out_32(a, v) out_be32(a, v)
19 #define memac_clrbits_32(a, v) clrbits_be32(a, v)
20 #define memac_setbits_32(a, v) setbits_be32(a, v)
21 #endif
22
memac_in_32(u32 * reg)23 static u32 memac_in_32(u32 *reg)
24 {
25 #ifdef CONFIG_SYS_MEMAC_LITTLE_ENDIAN
26 return in_le32(reg);
27 #else
28 return in_be32(reg);
29 #endif
30 }
31
32 struct fsl_ls_mdio_priv {
33 void *regs_base;
34 };
35
fsl_ls_mdio_setup_operation(struct udevice * dev,int addr,int devad,int reg)36 static u32 fsl_ls_mdio_setup_operation(struct udevice *dev, int addr, int devad,
37 int reg)
38 {
39 struct fsl_ls_mdio_priv *priv = dev_get_priv(dev);
40 struct memac_mdio_controller *regs;
41 u32 mdio_ctl;
42 u32 c45 = 1;
43
44 regs = (struct memac_mdio_controller *)(priv->regs_base);
45 if (devad == MDIO_DEVAD_NONE) {
46 c45 = 0; /* clause 22 */
47 devad = reg & 0x1f;
48 memac_clrbits_32(®s->mdio_stat, MDIO_STAT_ENC);
49 } else {
50 memac_setbits_32(®s->mdio_stat, MDIO_STAT_ENC);
51 }
52
53 /* Wait till the bus is free */
54 while ((memac_in_32(®s->mdio_stat)) & MDIO_STAT_BSY)
55 ;
56
57 /* Set the Port and Device Addrs */
58 mdio_ctl = MDIO_CTL_PORT_ADDR(addr) | MDIO_CTL_DEV_ADDR(devad);
59 memac_out_32(®s->mdio_ctl, mdio_ctl);
60
61 /* Set the register address */
62 if (c45)
63 memac_out_32(®s->mdio_addr, reg & 0xffff);
64
65 /* Wait till the bus is free */
66 while ((memac_in_32(®s->mdio_stat)) & MDIO_STAT_BSY)
67 ;
68
69 return mdio_ctl;
70 }
71
dm_fsl_ls_mdio_read(struct udevice * dev,int addr,int devad,int reg)72 static int dm_fsl_ls_mdio_read(struct udevice *dev, int addr,
73 int devad, int reg)
74 {
75 struct fsl_ls_mdio_priv *priv = dev_get_priv(dev);
76 struct memac_mdio_controller *regs;
77 u32 mdio_ctl;
78
79 regs = (struct memac_mdio_controller *)(priv->regs_base);
80 mdio_ctl = fsl_ls_mdio_setup_operation(dev, addr, devad, reg);
81
82 /* Initiate the read */
83 mdio_ctl |= MDIO_CTL_READ;
84 memac_out_32(®s->mdio_ctl, mdio_ctl);
85
86 /* Wait till the MDIO write is complete */
87 while ((memac_in_32(®s->mdio_data)) & MDIO_DATA_BSY)
88 ;
89
90 /* Return all Fs if nothing was there */
91 if (memac_in_32(®s->mdio_stat) & MDIO_STAT_RD_ER)
92 return 0xffff;
93
94 return memac_in_32(®s->mdio_data) & 0xffff;
95 }
96
dm_fsl_ls_mdio_write(struct udevice * dev,int addr,int devad,int reg,u16 val)97 static int dm_fsl_ls_mdio_write(struct udevice *dev, int addr, int devad,
98 int reg, u16 val)
99 {
100 struct fsl_ls_mdio_priv *priv = dev_get_priv(dev);
101 struct memac_mdio_controller *regs;
102
103 regs = (struct memac_mdio_controller *)(priv->regs_base);
104 fsl_ls_mdio_setup_operation(dev, addr, devad, reg);
105
106 /* Write the value to the register */
107 memac_out_32(®s->mdio_data, MDIO_DATA(val));
108
109 /* Wait till the MDIO write is complete */
110 while ((memac_in_32(®s->mdio_data)) & MDIO_DATA_BSY)
111 ;
112
113 return 0;
114 }
115
116 static const struct mdio_ops fsl_ls_mdio_ops = {
117 .read = dm_fsl_ls_mdio_read,
118 .write = dm_fsl_ls_mdio_write,
119 };
120
fsl_ls_mdio_probe(struct udevice * dev)121 static int fsl_ls_mdio_probe(struct udevice *dev)
122 {
123 struct fsl_ls_mdio_priv *priv = dev_get_priv(dev);
124 struct memac_mdio_controller *regs;
125
126 priv->regs_base = dev_read_addr_ptr(dev);
127 regs = (struct memac_mdio_controller *)(priv->regs_base);
128
129 memac_setbits_32(®s->mdio_stat,
130 MDIO_STAT_CLKDIV(258) | MDIO_STAT_NEG);
131
132 return 0;
133 }
134
135 static const struct udevice_id fsl_ls_mdio_of_ids[] = {
136 { .compatible = "fsl,ls-mdio" },
137 };
138
139 U_BOOT_DRIVER(fsl_ls_mdio) = {
140 .name = "fsl_ls_mdio",
141 .id = UCLASS_MDIO,
142 .of_match = fsl_ls_mdio_of_ids,
143 .probe = fsl_ls_mdio_probe,
144 .ops = &fsl_ls_mdio_ops,
145 .priv_auto = sizeof(struct fsl_ls_mdio_priv),
146 };
147