1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
4 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
5 */
6
7 #include <common.h>
8 #include <config.h>
9 #include <net.h>
10 #include <netdev.h>
11 #include <asm/global_data.h>
12 #include <linux/delay.h>
13
14 #ifdef CONFIG_MCF547x_8x
15 #include <asm/fsl_mcdmafec.h>
16 #else
17 #include <asm/fec.h>
18 #endif
19 #include <asm/immap.h>
20 #include <linux/mii.h>
21
22 DECLARE_GLOBAL_DATA_PTR;
23
24 #if defined(CONFIG_CMD_NET)
25 #undef MII_DEBUG
26 #undef ET_DEBUG
27
28 /*extern int fecpin_setclear(struct eth_device *dev, int setclear);*/
29
30 #if defined(CONFIG_SYS_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
31 #include <miiphy.h>
32
33 /* Make MII read/write commands for the FEC. */
34 #define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | \
35 (REG & 0x1f) << 18))
36 #define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | \
37 (REG & 0x1f) << 18) | (VAL & 0xffff))
38
39 #ifndef CONFIG_SYS_UNSPEC_PHYID
40 # define CONFIG_SYS_UNSPEC_PHYID 0
41 #endif
42 #ifndef CONFIG_SYS_UNSPEC_STRID
43 # define CONFIG_SYS_UNSPEC_STRID 0
44 #endif
45
46 typedef struct phy_info_struct {
47 u32 phyid;
48 char *strid;
49 } phy_info_t;
50
51 phy_info_t phyinfo[] = {
52 {0x0022561B, "AMD79C784VC"}, /* AMD 79C784VC */
53 {0x00406322, "BCM5222"}, /* Broadcom 5222 */
54 {0x02a80150, "Intel82555"}, /* Intel 82555 */
55 {0x0016f870, "LSI80225"}, /* LSI 80225 */
56 {0x0016f880, "LSI80225/B"}, /* LSI 80225/B */
57 {0x78100000, "LXT970"}, /* LXT970 */
58 {0x001378e0, "LXT971"}, /* LXT971 and 972 */
59 {0x00221619, "KS8721BL"}, /* Micrel KS8721BL/SL */
60 {0x00221512, "KSZ8041NL"}, /* Micrel KSZ8041NL */
61 {0x20005CE1, "N83640"}, /* National 83640 */
62 {0x20005C90, "N83848"}, /* National 83848 */
63 {0x20005CA2, "N83849"}, /* National 83849 */
64 {0x01814400, "QS6612"}, /* QS6612 */
65 #if defined(CONFIG_SYS_UNSPEC_PHYID) && defined(CONFIG_SYS_UNSPEC_STRID)
66 {CONFIG_SYS_UNSPEC_PHYID, CONFIG_SYS_UNSPEC_STRID},
67 #endif
68 {0, 0}
69 };
70
71 /*
72 * mii_init -- Initialize the MII for MII command without ethernet
73 * This function is a subset of eth_init
74 */
mii_reset(fec_info_t * info)75 void mii_reset(fec_info_t *info)
76 {
77 volatile FEC_T *fecp = (FEC_T *) (info->miibase);
78 int i;
79
80 fecp->ecr = FEC_ECR_RESET;
81
82 for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) {
83 udelay(1);
84 }
85 if (i == FEC_RESET_DELAY)
86 printf("FEC_RESET_DELAY timeout\n");
87 }
88
89 /* send command to phy using mii, wait for result */
mii_send(uint mii_cmd)90 uint mii_send(uint mii_cmd)
91 {
92 #ifdef CONFIG_DM_ETH
93 struct udevice *dev;
94 #else
95 struct eth_device *dev;
96 #endif
97 fec_info_t *info;
98 volatile FEC_T *ep;
99 uint mii_reply;
100 int j = 0;
101
102 /* retrieve from register structure */
103 dev = eth_get_dev();
104 #ifdef CONFIG_DM_ETH
105 info = dev_get_priv(dev);
106 #else
107 info = dev->priv;
108 #endif
109
110 ep = (FEC_T *) info->miibase;
111
112 ep->mmfr = mii_cmd; /* command to phy */
113
114 /* wait for mii complete */
115 while (!(ep->eir & FEC_EIR_MII) && (j < info->to_loop)) {
116 udelay(1);
117 j++;
118 }
119 if (j >= info->to_loop) {
120 printf("MII not complete\n");
121 return -1;
122 }
123
124 mii_reply = ep->mmfr; /* result from phy */
125 ep->eir = FEC_EIR_MII; /* clear MII complete */
126 #ifdef ET_DEBUG
127 printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
128 __FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply);
129 #endif
130
131 return (mii_reply & 0xffff); /* data read from phy */
132 }
133 #endif /* CONFIG_SYS_DISCOVER_PHY || (CONFIG_MII) */
134
135 #if defined(CONFIG_SYS_DISCOVER_PHY)
mii_discover_phy(fec_info_t * info)136 int mii_discover_phy(fec_info_t *info)
137 {
138 #define MAX_PHY_PASSES 11
139 int phyaddr, pass;
140 uint phyno, phytype;
141 int i, found = 0;
142
143 if (info->phyname_init)
144 return info->phy_addr;
145
146 phyaddr = -1; /* didn't find a PHY yet */
147 for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) {
148 if (pass > 1) {
149 /* PHY may need more time to recover from reset.
150 * The LXT970 needs 50ms typical, no maximum is
151 * specified, so wait 10ms before try again.
152 * With 11 passes this gives it 100ms to wake up.
153 */
154 udelay(10000); /* wait 10ms */
155 }
156
157 for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
158
159 phytype = mii_send(mk_mii_read(phyno, MII_PHYSID1));
160 #ifdef ET_DEBUG
161 printf("PHY type 0x%x pass %d\n", phytype, pass);
162 #endif
163 if (phytype == 0xffff)
164 continue;
165 phyaddr = phyno;
166 phytype <<= 16;
167 phytype |=
168 mii_send(mk_mii_read(phyno, MII_PHYSID2));
169
170 #ifdef ET_DEBUG
171 printf("PHY @ 0x%x pass %d\n", phyno, pass);
172 #endif
173
174 for (i = 0; (i < ARRAY_SIZE(phyinfo))
175 && (phyinfo[i].phyid != 0); i++) {
176 if (phyinfo[i].phyid == phytype) {
177 #ifdef ET_DEBUG
178 printf("phyid %x - %s\n",
179 phyinfo[i].phyid,
180 phyinfo[i].strid);
181 #endif
182 strcpy(info->phy_name, phyinfo[i].strid);
183 info->phyname_init = 1;
184 found = 1;
185 break;
186 }
187 }
188
189 if (!found) {
190 #ifdef ET_DEBUG
191 printf("0x%08x\n", phytype);
192 #endif
193 strcpy(info->phy_name, "unknown");
194 info->phyname_init = 1;
195 break;
196 }
197 }
198 }
199
200 if (phyaddr < 0)
201 printf("No PHY device found.\n");
202
203 return phyaddr;
204 }
205 #endif /* CONFIG_SYS_DISCOVER_PHY */
206
207 void mii_init(void) __attribute__((weak,alias("__mii_init")));
208
__mii_init(void)209 void __mii_init(void)
210 {
211 #ifdef CONFIG_DM_ETH
212 struct udevice *dev;
213 #else
214 struct eth_device *dev;
215 #endif
216 fec_info_t *info;
217 volatile FEC_T *fecp;
218 int miispd = 0, i = 0;
219 u16 status = 0;
220 u16 linkgood = 0;
221
222 /* retrieve from register structure */
223 dev = eth_get_dev();
224 #ifdef CONFIG_DM_ETH
225 info = dev_get_priv(dev);
226 #else
227 info = dev->priv;
228 #endif
229
230 fecp = (FEC_T *) info->miibase;
231
232 fecpin_setclear(info, 1);
233
234 mii_reset(info);
235
236 /* We use strictly polling mode only */
237 fecp->eimr = 0;
238
239 /* Clear any pending interrupt */
240 fecp->eir = 0xffffffff;
241
242 /* Set MII speed */
243 miispd = (gd->bus_clk / 1000000) / 5;
244 fecp->mscr = miispd << 1;
245
246 #ifdef CONFIG_SYS_DISCOVER_PHY
247 info->phy_addr = mii_discover_phy(info);
248 #endif
249 if (info->phy_addr == -1)
250 return;
251
252 while (i < info->to_loop) {
253 status = 0;
254 i++;
255 /* Read PHY control register */
256 miiphy_read(dev->name, info->phy_addr, MII_BMCR, &status);
257
258 /* If phy set to autonegotiate, wait for autonegotiation done,
259 * if phy is not autonegotiating, just wait for link up.
260 */
261 if ((status & BMCR_ANENABLE) == BMCR_ANENABLE) {
262 linkgood = (BMSR_ANEGCOMPLETE | BMSR_LSTATUS);
263 } else {
264 linkgood = BMSR_LSTATUS;
265 }
266 /* Read PHY status register */
267 miiphy_read(dev->name, info->phy_addr, MII_BMSR, &status);
268 if ((status & linkgood) == linkgood)
269 break;
270
271 udelay(1);
272 }
273 if (i >= info->to_loop)
274 printf("Link UP timeout\n");
275
276 /* adapt to the duplex and speed settings of the phy */
277 info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
278 info->dup_spd |= miiphy_speed(dev->name, info->phy_addr);
279 }
280
281 /*
282 * Read and write a MII PHY register, routines used by MII Utilities
283 *
284 * FIXME: These routines are expected to return 0 on success, but mii_send
285 * does _not_ return an error code. Maybe 0xFFFF means error, i.e.
286 * no PHY connected...
287 * For now always return 0.
288 * FIXME: These routines only work after calling eth_init() at least once!
289 * Otherwise they hang in mii_send() !!! Sorry!
290 */
291
mcffec_miiphy_read(struct mii_dev * bus,int addr,int devad,int reg)292 int mcffec_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
293 {
294 short rdreg; /* register working value */
295
296 #ifdef MII_DEBUG
297 printf("miiphy_read(0x%x) @ 0x%x = ", reg, addr);
298 #endif
299 rdreg = mii_send(mk_mii_read(addr, reg));
300
301 #ifdef MII_DEBUG
302 printf("0x%04x\n", rdreg);
303 #endif
304
305 return rdreg;
306 }
307
mcffec_miiphy_write(struct mii_dev * bus,int addr,int devad,int reg,u16 value)308 int mcffec_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
309 u16 value)
310 {
311 #ifdef MII_DEBUG
312 printf("miiphy_write(0x%x) @ 0x%x = 0x%04x\n", reg, addr, value);
313 #endif
314
315 mii_send(mk_mii_write(addr, reg, value));
316
317 return 0;
318 }
319
320 #endif /* CONFIG_CMD_NET */
321