1 /*
2 * Vitesse 7385 Switch Firmware Upload
3 *
4 * Author: Timur Tabi <timur@freescale.com>
5 *
6 * Copyright 2008 Freescale Semiconductor, Inc. This file is licensed
7 * under the terms of the GNU General Public License version 2. This
8 * program is licensed "as is" without any warranty of any kind, whether
9 * express or implied.
10 *
11 * This module uploads proprietary firmware for the Vitesse VSC7385 5-port
12 * switch.
13 */
14
15 #include <config.h>
16 #include <common.h>
17 #include <console.h>
18 #include <log.h>
19 #include <asm/io.h>
20 #include <linux/delay.h>
21 #include <linux/errno.h>
22 #include "vsc7385.h"
23
24 /*
25 * Upload a Vitesse VSC7385 firmware image to the hardware
26 *
27 * This function takes a pointer to a VSC7385 firmware image and a size, and
28 * uploads that firmware to the VSC7385.
29 *
30 * This firmware is typically located at a board-specific flash address,
31 * and the size is typically 8KB.
32 *
33 * The firmware is Vitesse proprietary.
34 *
35 * Further details on the register information can be obtained from Vitesse.
36 */
vsc7385_upload_firmware(void * firmware,unsigned int size)37 int vsc7385_upload_firmware(void *firmware, unsigned int size)
38 {
39 u8 *fw = firmware;
40 unsigned int i;
41
42 u32 *gloreset = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c050);
43 u32 *icpu_ctrl = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c040);
44 u32 *icpu_addr = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c044);
45 u32 *icpu_data = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c048);
46 u32 *icpu_rom_map = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c070);
47 #ifdef DEBUG
48 u32 *chipid = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c060);
49 #endif
50
51 out_be32(gloreset, 3);
52 udelay(200);
53
54 out_be32(icpu_ctrl, 0x8E);
55 udelay(20);
56
57 out_be32(icpu_rom_map, 1);
58 udelay(20);
59
60 /* Write the firmware to I-RAM */
61 out_be32(icpu_addr, 0);
62 udelay(20);
63
64 for (i = 0; i < size; i++) {
65 out_be32(icpu_data, fw[i]);
66 udelay(20);
67 if (ctrlc())
68 return -EINTR;
69 }
70
71 /* Read back and compare */
72 out_be32(icpu_addr, 0);
73 udelay(20);
74
75 for (i = 0; i < size; i++) {
76 u8 value;
77
78 value = (u8) in_be32(icpu_data);
79 udelay(20);
80 if (value != fw[i]) {
81 debug("VSC7385: Upload mismatch: address 0x%x, "
82 "read value 0x%x, image value 0x%x\n",
83 i, value, fw[i]);
84
85 return -EIO;
86 }
87 if (ctrlc())
88 break;
89 }
90
91 out_be32(icpu_ctrl, 0x0B);
92 udelay(20);
93
94 #ifdef DEBUG
95 printf("VSC7385: Chip ID is %08x\n", in_be32(chipid));
96 udelay(20);
97 #endif
98
99 return 0;
100 }
101