1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * dts file for Xilinx ZynqMP ZCU1275
4 *
5 * (C) Copyright 2017 - 2020, Xilinx, Inc.
6 *
7 * Michal Simek <michal.simek@xilinx.com>
8 * Siva Durga Prasad Paladugu <sivadur@xilinx.com>
9 */
10
11/dts-v1/;
12
13#include "zynqmp.dtsi"
14#include "zynqmp-clk-ccf.dtsi"
15
16/ {
17	model = "ZynqMP ZCU1275 RevA";
18	compatible = "xlnx,zynqmp-zcu1275-revA", "xlnx,zynqmp-zcu1275",
19		     "xlnx,zynqmp";
20
21	aliases {
22		serial0 = &uart0;
23		serial1 = &dcc;
24		spi0 = &qspi;
25	};
26
27	chosen {
28		bootargs = "earlycon";
29		stdout-path = "serial0:115200n8";
30	};
31
32	memory@0 {
33		device_type = "memory";
34		reg = <0x0 0x0 0x0 0x80000000>;
35	};
36};
37
38&dcc {
39	status = "okay";
40};
41
42&qspi {
43	status = "okay";
44	flash@0 {
45		compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
46		#address-cells = <1>;
47		#size-cells = <1>;
48		reg = <0x0>;
49		spi-tx-bus-width = <1>;
50		spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
51		spi-max-frequency = <108000000>; /* Based on DC1 spec */
52		partition@0 { /* for testing purpose */
53			label = "qspi-fsbl-uboot";
54			reg = <0x0 0x100000>;
55		};
56		partition@100000 { /* for testing purpose */
57			label = "qspi-linux";
58			reg = <0x100000 0x500000>;
59		};
60		partition@600000 { /* for testing purpose */
61			label = "qspi-device-tree";
62			reg = <0x600000 0x20000>;
63		};
64		partition@620000 { /* for testing purpose */
65			label = "qspi-rootfs";
66			reg = <0x620000 0x5E0000>;
67		};
68	};
69};
70
71&uart0 {
72	status = "okay";
73};
74