1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * AM642: SoC specific initialization
4  *
5  * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
6  *	Keerthy <j-keerthy@ti.com>
7  *	Dave Gerlach <d-gerlach@ti.com>
8  */
9 
10 #include <common.h>
11 #include <spl.h>
12 #include <asm/io.h>
13 #include <asm/arch/hardware.h>
14 #include <asm/arch/sysfw-loader.h>
15 #include <asm/arch/sys_proto.h>
16 #include "common.h"
17 #include <asm/arch/sys_proto.h>
18 #include <linux/soc/ti/ti_sci_protocol.h>
19 #include <dm.h>
20 #include <dm/uclass-internal.h>
21 #include <dm/pinctrl.h>
22 #include <mmc.h>
23 #include <dm/root.h>
24 
25 #if defined(CONFIG_SPL_BUILD)
26 
ctrl_mmr_unlock(void)27 static void ctrl_mmr_unlock(void)
28 {
29 	/* Unlock all PADCFG_MMR1 module registers */
30 	mmr_unlock(PADCFG_MMR1_BASE, 1);
31 
32 	/* Unlock all CTRL_MMR0 module registers */
33 	mmr_unlock(CTRL_MMR0_BASE, 0);
34 	mmr_unlock(CTRL_MMR0_BASE, 1);
35 	mmr_unlock(CTRL_MMR0_BASE, 2);
36 	mmr_unlock(CTRL_MMR0_BASE, 3);
37 	mmr_unlock(CTRL_MMR0_BASE, 5);
38 	mmr_unlock(CTRL_MMR0_BASE, 6);
39 }
40 
41 /*
42  * This uninitialized global variable would normal end up in the .bss section,
43  * but the .bss is cleared between writing and reading this variable, so move
44  * it to the .data section.
45  */
46 u32 bootindex __section(".data");
47 static struct rom_extended_boot_data bootdata __section(".data");
48 
store_boot_info_from_rom(void)49 static void store_boot_info_from_rom(void)
50 {
51 	bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
52 	memcpy(&bootdata, (uintptr_t *)ROM_ENTENDED_BOOT_DATA_INFO,
53 	       sizeof(struct rom_extended_boot_data));
54 }
55 
56 #if defined(CONFIG_K3_LOAD_SYSFW) && CONFIG_IS_ENABLED(DM_MMC)
k3_mmc_stop_clock(void)57 void k3_mmc_stop_clock(void)
58 {
59 	if (spl_boot_device() == BOOT_DEVICE_MMC1) {
60 		struct mmc *mmc = find_mmc_device(0);
61 
62 		if (!mmc)
63 			return;
64 
65 		mmc->saved_clock = mmc->clock;
66 		mmc_set_clock(mmc, 0, true);
67 	}
68 }
69 
k3_mmc_restart_clock(void)70 void k3_mmc_restart_clock(void)
71 {
72 	if (spl_boot_device() == BOOT_DEVICE_MMC1) {
73 		struct mmc *mmc = find_mmc_device(0);
74 
75 		if (!mmc)
76 			return;
77 
78 		mmc_set_clock(mmc, mmc->saved_clock, false);
79 	}
80 }
81 #else
k3_mmc_stop_clock(void)82 void k3_mmc_stop_clock(void) {}
k3_mmc_restart_clock(void)83 void k3_mmc_restart_clock(void) {}
84 #endif
85 
86 #ifdef CONFIG_SPL_OF_LIST
do_dt_magic(void)87 void do_dt_magic(void)
88 {
89 	int ret, rescan;
90 
91 	if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT))
92 		do_board_detect();
93 
94 	/*
95 	 * Board detection has been done.
96 	 * Let us see if another dtb wouldn't be a better match
97 	 * for our board
98 	 */
99 	if (IS_ENABLED(CONFIG_CPU_V7R)) {
100 		ret = fdtdec_resetup(&rescan);
101 		if (!ret && rescan) {
102 			dm_uninit();
103 			dm_init_and_scan(true);
104 		}
105 	}
106 }
107 #endif
108 
board_init_f(ulong dummy)109 void board_init_f(ulong dummy)
110 {
111 #if defined(CONFIG_K3_LOAD_SYSFW)
112 	struct udevice *dev;
113 	int ret;
114 #endif
115 
116 #if defined(CONFIG_CPU_V7R)
117 	setup_k3_mpu_regions();
118 #endif
119 
120 	/*
121 	 * Cannot delay this further as there is a chance that
122 	 * K3_BOOT_PARAM_TABLE_INDEX can be over written by SPL MALLOC section.
123 	 */
124 	store_boot_info_from_rom();
125 
126 	ctrl_mmr_unlock();
127 
128 	/* Init DM early */
129 	spl_early_init();
130 
131 	preloader_console_init();
132 
133 	do_dt_magic();
134 
135 #if defined(CONFIG_K3_LOAD_SYSFW)
136 	/*
137 	 * Process pinctrl for serial3 a.k.a. MAIN UART1 module and continue
138 	 * regardless of the result of pinctrl. Do this without probing the
139 	 * device, but instead by searching the device that would request the
140 	 * given sequence number if probed. The UART will be used by the system
141 	 * firmware (SYSFW) image for various purposes and SYSFW depends on us
142 	 * to initialize its pin settings.
143 	 */
144 	ret = uclass_find_device_by_seq(UCLASS_SERIAL, 3, &dev);
145 	if (!ret)
146 		pinctrl_select_state(dev, "default");
147 
148 	/*
149 	 * Load, start up, and configure system controller firmware.
150 	 * This will determine whether or not ROM has already loaded
151 	 * system firmware and if so, will only perform needed config
152 	 * and not attempt to load firmware again.
153 	 */
154 	k3_sysfw_loader(is_rom_loaded_sysfw(&bootdata), k3_mmc_stop_clock,
155 			k3_mmc_restart_clock);
156 #endif
157 
158 	/* Output System Firmware version info */
159 	k3_sysfw_print_ver();
160 
161 #if defined(CONFIG_K3_AM64_DDRSS)
162 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
163 	if (ret)
164 		panic("DRAM init failed: %d\n", ret);
165 #endif
166 }
167 
spl_boot_mode(const u32 boot_device)168 u32 spl_boot_mode(const u32 boot_device)
169 {
170 	switch (boot_device) {
171 	case BOOT_DEVICE_MMC1:
172 		return MMCSD_MODE_EMMCBOOT;
173 
174 	case BOOT_DEVICE_MMC2:
175 		return MMCSD_MODE_FS;
176 
177 	default:
178 		return MMCSD_MODE_RAW;
179 	}
180 }
181 
__get_backup_bootmedia(u32 main_devstat)182 static u32 __get_backup_bootmedia(u32 main_devstat)
183 {
184 	u32 bkup_bootmode =
185 	    (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >>
186 	    MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT;
187 	u32 bkup_bootmode_cfg =
188 	    (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >>
189 	    MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT;
190 
191 	switch (bkup_bootmode) {
192 	case BACKUP_BOOT_DEVICE_UART:
193 		return BOOT_DEVICE_UART;
194 
195 	case BACKUP_BOOT_DEVICE_USB:
196 		return BOOT_DEVICE_USB;
197 
198 	case BACKUP_BOOT_DEVICE_ETHERNET:
199 		return BOOT_DEVICE_ETHERNET;
200 
201 	case BACKUP_BOOT_DEVICE_MMC:
202 		if (bkup_bootmode_cfg)
203 			return BOOT_DEVICE_MMC2;
204 		return BOOT_DEVICE_MMC1;
205 
206 	case BACKUP_BOOT_DEVICE_SPI:
207 		return BOOT_DEVICE_SPI;
208 
209 	case BACKUP_BOOT_DEVICE_I2C:
210 		return BOOT_DEVICE_I2C;
211 	};
212 
213 	return BOOT_DEVICE_RAM;
214 }
215 
__get_primary_bootmedia(u32 main_devstat)216 static u32 __get_primary_bootmedia(u32 main_devstat)
217 {
218 	u32 bootmode = (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >>
219 	    MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT;
220 	u32 bootmode_cfg =
221 	    (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >>
222 	    MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT;
223 
224 	switch (bootmode) {
225 	case BOOT_DEVICE_OSPI:
226 		fallthrough;
227 	case BOOT_DEVICE_QSPI:
228 		fallthrough;
229 	case BOOT_DEVICE_XSPI:
230 		fallthrough;
231 	case BOOT_DEVICE_SPI:
232 		return BOOT_DEVICE_SPI;
233 
234 	case BOOT_DEVICE_ETHERNET_RGMII:
235 		fallthrough;
236 	case BOOT_DEVICE_ETHERNET_RMII:
237 		return BOOT_DEVICE_ETHERNET;
238 
239 	case BOOT_DEVICE_EMMC:
240 		return BOOT_DEVICE_MMC1;
241 
242 	case BOOT_DEVICE_MMC:
243 		if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >>
244 		     MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT)
245 			return BOOT_DEVICE_MMC2;
246 		return BOOT_DEVICE_MMC1;
247 
248 	case BOOT_DEVICE_NOBOOT:
249 		return BOOT_DEVICE_RAM;
250 	}
251 
252 	return bootmode;
253 }
254 
spl_boot_device(void)255 u32 spl_boot_device(void)
256 {
257 	u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
258 
259 	if (bootindex == K3_PRIMARY_BOOTMODE)
260 		return __get_primary_bootmedia(devstat);
261 	else
262 		return __get_backup_bootmedia(devstat);
263 }
264 #endif
265 
266 #if defined(CONFIG_SYS_K3_SPL_ATF)
267 
268 #define AM64X_DEV_RTI8			127
269 #define AM64X_DEV_RTI9			128
270 #define AM64X_DEV_R5FSS0_CORE0		121
271 #define AM64X_DEV_R5FSS0_CORE1		122
272 
release_resources_for_core_shutdown(void)273 void release_resources_for_core_shutdown(void)
274 {
275 	struct ti_sci_handle *ti_sci = get_ti_sci_handle();
276 	struct ti_sci_dev_ops *dev_ops = &ti_sci->ops.dev_ops;
277 	struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;
278 	int ret;
279 	u32 i;
280 
281 	const u32 put_device_ids[] = {
282 		AM64X_DEV_RTI9,
283 		AM64X_DEV_RTI8,
284 	};
285 
286 	/* Iterate through list of devices to put (shutdown) */
287 	for (i = 0; i < ARRAY_SIZE(put_device_ids); i++) {
288 		u32 id = put_device_ids[i];
289 
290 		ret = dev_ops->put_device(ti_sci, id);
291 		if (ret)
292 			panic("Failed to put device %u (%d)\n", id, ret);
293 	}
294 
295 	const u32 put_core_ids[] = {
296 		AM64X_DEV_R5FSS0_CORE1,
297 		AM64X_DEV_R5FSS0_CORE0, /* Handle CPU0 after CPU1 */
298 	};
299 
300 	/* Iterate through list of cores to put (shutdown) */
301 	for (i = 0; i < ARRAY_SIZE(put_core_ids); i++) {
302 		u32 id = put_core_ids[i];
303 
304 		/*
305 		 * Queue up the core shutdown request. Note that this call
306 		 * needs to be followed up by an actual invocation of an WFE
307 		 * or WFI CPU instruction.
308 		 */
309 		ret = proc_ops->proc_shutdown_no_wait(ti_sci, id);
310 		if (ret)
311 			panic("Failed sending core %u shutdown message (%d)\n",
312 			      id, ret);
313 	}
314 }
315 #endif
316