1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2006-2008 4 * Texas Instruments. 5 * Richard Woodruff <r-woodruff2@ti.com> 6 * Syed Mohammed Khasim <x0khasim@ti.com> 7 * 8 * (C) Copyright 2009 9 * Frederik Kriewitz <frederik@kriewitz.eu> 10 * 11 * Configuration settings for the DevKit8000 board. 12 */ 13 14 #ifndef __CONFIG_H 15 #define __CONFIG_H 16 17 /* High Level Configuration Options */ 18 #define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT8000 19 20 /* 21 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 22 * 64 bytes before this address should be set aside for u-boot.img's 23 * header. That is 0x800FFFC0--0x80100000 should not be used for any 24 * other needs. 25 */ 26 27 #define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/ 28 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 29 30 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 31 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ 32 33 /* Physical Memory Map */ 34 35 #include <configs/ti_omap3_common.h> 36 37 #define CONFIG_REVISION_TAG 1 38 39 /* Size of malloc() pool */ 40 #undef CONFIG_SYS_MALLOC_LEN 41 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 42 43 /* Hardware drivers */ 44 /* DM9000 */ 45 #define CONFIG_NET_RETRY_COUNT 20 46 #define CONFIG_DRIVER_DM9000 1 47 #define CONFIG_DM9000_BASE 0x2c000000 48 #define DM9000_IO CONFIG_DM9000_BASE 49 #define DM9000_DATA (CONFIG_DM9000_BASE + 0x400) 50 #define CONFIG_DM9000_USE_16BIT 1 51 #define CONFIG_DM9000_NO_SROM 1 52 #undef CONFIG_DM9000_DEBUG 53 54 /* TWL4030 */ 55 56 /* Board NAND Info */ 57 #define CONFIG_JFFS2_NAND 58 /* nand device jffs2 lives on */ 59 #define CONFIG_JFFS2_DEV "nand0" 60 /* start of jffs2 partition */ 61 #define CONFIG_JFFS2_PART_OFFSET 0x680000 62 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ 63 /* partition */ 64 65 /* BOOTP/DHCP options */ 66 #define CONFIG_BOOTP_NISDOMAIN 67 #define CONFIG_BOOTP_BOOTFILESIZE 68 #define CONFIG_BOOTP_TIMEOFFSET 69 #undef CONFIG_BOOTP_VENDOREX 70 71 /* Environment information */ 72 #define CONFIG_EXTRA_ENV_SETTINGS \ 73 "loadaddr=0x82000000\0" \ 74 "console=ttyO2,115200n8\0" \ 75 "mmcdev=0\0" \ 76 "vram=12M\0" \ 77 "dvimode=1024x768MR-16@60\0" \ 78 "defaultdisplay=dvi\0" \ 79 "nfsopts=hard,tcp,rsize=65536,wsize=65536\0" \ 80 "kernelopts=rw\0" \ 81 "commonargs=" \ 82 "setenv bootargs console=${console} " \ 83 "vram=${vram} " \ 84 "omapfb.mode=dvi:${dvimode} " \ 85 "omapdss.def_disp=${defaultdisplay}\0" \ 86 "mmcargs=" \ 87 "run commonargs; " \ 88 "setenv bootargs ${bootargs} " \ 89 "root=/dev/mmcblk0p2 " \ 90 "rootwait " \ 91 "${kernelopts}\0" \ 92 "nandargs=" \ 93 "run commonargs; " \ 94 "setenv bootargs ${bootargs} " \ 95 "omapfb.mode=dvi:${dvimode} " \ 96 "omapdss.def_disp=${defaultdisplay} " \ 97 "root=/dev/mtdblock4 " \ 98 "rootfstype=jffs2 " \ 99 "${kernelopts}\0" \ 100 "netargs=" \ 101 "run commonargs; " \ 102 "setenv bootargs ${bootargs} " \ 103 "root=/dev/nfs " \ 104 "nfsroot=${serverip}:${rootpath},${nfsopts} " \ 105 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off " \ 106 "${kernelopts} " \ 107 "dnsip1=${dnsip} " \ 108 "dnsip2=${dnsip2}\0" \ 109 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 110 "bootscript=echo Running bootscript from mmc ...; " \ 111 "source ${loadaddr}\0" \ 112 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 113 "eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \ 114 "mmcboot=echo Booting from mmc ...; " \ 115 "run mmcargs; " \ 116 "bootm ${loadaddr}\0" \ 117 "nandboot=echo Booting from nand ...; " \ 118 "run nandargs; " \ 119 "nand read ${loadaddr} 280000 400000; " \ 120 "bootm ${loadaddr}\0" \ 121 "netboot=echo Booting from network ...; " \ 122 "dhcp ${loadaddr}; " \ 123 "run netargs; " \ 124 "bootm ${loadaddr}\0" \ 125 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ 126 "if run loadbootscript; then " \ 127 "run bootscript; " \ 128 "else " \ 129 "if run loaduimage; then " \ 130 "run mmcboot; " \ 131 "else run nandboot; " \ 132 "fi; " \ 133 "fi; " \ 134 "else run nandboot; fi\0" 135 136 #define CONFIG_BOOTCOMMAND "run autoboot" 137 138 /* Boot Argument Buffer Size */ 139 140 /* Defines for SPL */ 141 142 /* NAND boot config */ 143 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 144 #define CONFIG_SYS_NAND_PAGE_COUNT 64 145 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 146 #define CONFIG_SYS_NAND_OOBSIZE 64 147 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 148 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 149 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 150 10, 11, 12, 13} 151 152 #define CONFIG_SYS_NAND_ECCSIZE 512 153 #define CONFIG_SYS_NAND_ECCBYTES 3 154 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 155 156 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 157 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000 158 159 /* SPL OS boot options */ 160 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 161 162 #undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 163 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 164 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 165 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x500 /* address 0xa0000 */ 166 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x8 /* address 0x1000 */ 167 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 8 /* 4KB */ 168 169 #undef CONFIG_SYS_SPL_ARGS_ADDR 170 #define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100) 171 172 #endif /* __CONFIG_H */ 173