1 // SPDX-License-Identifier: Intel
2 /*
3  * Copyright (C) 2015-2016 Intel Corp.
4  * (Written by Andrey Petrov <andrey.petrov@intel.com> for Intel Corp.)
5  * (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.)
6  * Mostly taken from coreboot fsp2_0/memory_init.c
7  */
8 
9 #include <common.h>
10 #include <binman.h>
11 #include <bootstage.h>
12 #include <log.h>
13 #include <asm/mrccache.h>
14 #include <asm/fsp/fsp_infoheader.h>
15 #include <asm/fsp2/fsp_api.h>
16 #include <asm/fsp2/fsp_internal.h>
17 #include <asm/arch/fsp/fsp_configs.h>
18 #include <asm/arch/fsp/fsp_m_upd.h>
19 
prepare_mrc_cache_type(enum mrc_type_t type,struct mrc_data_container ** cachep)20 static int prepare_mrc_cache_type(enum mrc_type_t type,
21 				  struct mrc_data_container **cachep)
22 {
23 	struct mrc_data_container *cache;
24 	struct mrc_region entry;
25 	int ret;
26 
27 	ret = mrccache_get_region(type, NULL, &entry);
28 	if (ret)
29 		return ret;
30 	cache = mrccache_find_current(&entry);
31 	if (!cache)
32 		return -ENOENT;
33 
34 	log_debug("MRC at %x, size %x\n", (uint)cache->data, cache->data_size);
35 	*cachep = cache;
36 
37 	return 0;
38 }
39 
prepare_mrc_cache(struct fspm_upd * upd)40 int prepare_mrc_cache(struct fspm_upd *upd)
41 {
42 	struct mrc_data_container *cache;
43 	int ret;
44 
45 	ret = prepare_mrc_cache_type(MRC_TYPE_NORMAL, &cache);
46 	if (ret)
47 		return log_msg_ret("Cannot get normal cache", ret);
48 	upd->arch.nvs_buffer_ptr = cache->data;
49 
50 	ret = prepare_mrc_cache_type(MRC_TYPE_VAR, &cache);
51 	if (ret)
52 		return log_msg_ret("Cannot get var cache", ret);
53 	upd->config.variable_nvs_buffer_ptr = cache->data;
54 
55 	return 0;
56 }
57 
fsp_memory_init(bool s3wake,bool use_spi_flash)58 int fsp_memory_init(bool s3wake, bool use_spi_flash)
59 {
60 	struct fspm_upd upd, *fsp_upd;
61 	fsp_memory_init_func func;
62 	struct binman_entry entry;
63 	struct fsp_header *hdr;
64 	struct hob_header *hob;
65 	struct udevice *dev;
66 	int ret;
67 
68 	ret = fsp_locate_fsp(FSP_M, &entry, use_spi_flash, &dev, &hdr, NULL);
69 	if (ret)
70 		return log_msg_ret("locate FSP", ret);
71 	debug("Found FSP_M at %x, size %x\n", hdr->img_base, hdr->img_size);
72 
73 	/* Copy over the default config */
74 	fsp_upd = (struct fspm_upd *)(hdr->img_base + hdr->cfg_region_off);
75 	if (fsp_upd->header.signature != FSPM_UPD_SIGNATURE)
76 		return log_msg_ret("Bad UPD signature", -EPERM);
77 	memcpy(&upd, fsp_upd, sizeof(upd));
78 
79 	ret = fspm_update_config(dev, &upd);
80 	if (ret)
81 		return log_msg_ret("Could not setup config", ret);
82 
83 	debug("SDRAM init...");
84 	bootstage_start(BOOTSTAGE_ID_ACCUM_FSP_M, "fsp-m");
85 	func = (fsp_memory_init_func)(hdr->img_base + hdr->fsp_mem_init);
86 	ret = func(&upd, &hob);
87 	bootstage_accum(BOOTSTAGE_ID_ACCUM_FSP_M);
88 	if (ret)
89 		return log_msg_ret("SDRAM init fail\n", ret);
90 
91 	gd->arch.hob_list = hob;
92 	debug("done\n");
93 
94 	ret = fspm_done(dev);
95 	if (ret)
96 		return log_msg_ret("fsm_done\n", ret);
97 
98 	return 0;
99 }
100