1 /* 2 * U-boot - Configuration file for BF548 STAMP board 3 */ 4 5 #ifndef __CONFIG_BF548_EZKIT_H__ 6 #define __CONFIG_BF548_EZKIT_H__ 7 8 #include <asm/config-pre.h> 9 10 11 /* 12 * Processor Settings 13 */ 14 #define CONFIG_BFIN_CPU bf548-0.0 15 #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA 16 17 18 /* 19 * Clock Settings 20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV 21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV 22 */ 23 /* CONFIG_CLKIN_HZ is any value in Hz */ 24 #define CONFIG_CLKIN_HZ 25000000 25 /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ 26 /* 1 = CLKIN / 2 */ 27 #define CONFIG_CLKIN_HALF 0 28 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ 29 /* 1 = bypass PLL */ 30 #define CONFIG_PLL_BYPASS 0 31 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ 32 /* Values can range from 0-63 (where 0 means 64) */ 33 #define CONFIG_VCO_MULT 21 34 /* CCLK_DIV controls the core clock divider */ 35 /* Values can be 1, 2, 4, or 8 ONLY */ 36 #define CONFIG_CCLK_DIV 1 37 /* SCLK_DIV controls the system clock divider */ 38 /* Values can range from 1-15 */ 39 #define CONFIG_SCLK_DIV 4 40 41 42 /* 43 * Memory Settings 44 */ 45 #define CONFIG_MEM_ADD_WDTH 10 46 #define CONFIG_MEM_SIZE 64 47 48 #define CONFIG_EBIU_DDRCTL0_VAL 0x218A83FE 49 #define CONFIG_EBIU_DDRCTL1_VAL 0x20022222 50 #define CONFIG_EBIU_DDRCTL2_VAL 0x00000021 51 52 /* Default EZ-Kit bank mapping: 53 * Async Bank 0 - 32MB Burst Flash 54 * Async Bank 1 - Ethernet 55 * Async Bank 2 - Nothing 56 * Async Bank 3 - Nothing 57 */ 58 #define CONFIG_EBIU_AMGCTL_VAL 0xFF 59 #define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0 60 #define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0 61 #define CONFIG_EBIU_FCTL_VAL (BCLK_4) 62 #define CONFIG_EBIU_MODE_VAL (B0MODE_FLASH) 63 64 #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) 65 #define CONFIG_SYS_MALLOC_LEN (768 * 1024) 66 67 68 /* 69 * Network Settings 70 */ 71 #define ADI_CMDS_NETWORK 1 72 #define CONFIG_SMC911X 1 73 #define CONFIG_SMC911X_BASE 0x24000000 74 #define CONFIG_SMC911X_16_BIT 75 #define CONFIG_HOSTNAME bf548-ezkit 76 77 78 /* 79 * Flash Settings 80 */ 81 #define CONFIG_FLASH_CFI_DRIVER 82 #define CONFIG_SYS_FLASH_BASE 0x20000000 83 #define CONFIG_SYS_FLASH_CFI 84 #define CONFIG_SYS_FLASH_PROTECTION 85 #define CONFIG_SYS_MAX_FLASH_BANKS 1 86 #define CONFIG_SYS_MAX_FLASH_SECT 259 87 88 89 /* 90 * SPI Settings 91 */ 92 #define CONFIG_BFIN_SPI 93 #define CONFIG_ENV_SPI_MAX_HZ 30000000 94 #define CONFIG_SF_DEFAULT_SPEED 30000000 95 #define CONFIG_SPI_FLASH_STMICRO 96 97 98 /* 99 * Env Storage Settings 100 */ 101 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) 102 #define CONFIG_ENV_IS_IN_SPI_FLASH 103 #define CONFIG_ENV_OFFSET 0x10000 104 #define CONFIG_ENV_SIZE 0x2000 105 #define CONFIG_ENV_SECT_SIZE 0x10000 106 #define CONFIG_ENV_IS_EMBEDDED_IN_LDR 107 #elif (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND) 108 #define CONFIG_ENV_IS_IN_NAND 109 #define CONFIG_ENV_OFFSET 0x60000 110 #define CONFIG_ENV_SIZE 0x20000 111 #else 112 /* The BF548-EZKIT uses a top boot flash */ 113 #define CONFIG_ENV_IS_IN_FLASH 1 114 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) 115 #define CONFIG_ENV_OFFSET (0x1000000 - CONFIG_ENV_SECT_SIZE) 116 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 117 #define CONFIG_ENV_SECT_SIZE 0x8000 118 #endif 119 120 /* 121 * NAND Settings 122 */ 123 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND) 124 #define CONFIG_BFIN_NFC_CTL_VAL 0x0033 125 #define CONFIG_BFIN_NFC_BOOTROM_ECC 126 #define CONFIG_DRIVER_NAND_BFIN 127 #define CONFIG_SYS_NAND_BASE 0 /* not actually used */ 128 #define CONFIG_SYS_MAX_NAND_DEVICE 1 129 #endif 130 131 /* 132 * I2C Settings 133 */ 134 #define CONFIG_SYS_I2C 135 #define CONFIG_SYS_I2C_ADI 136 137 138 /* 139 * SATA 140 */ 141 #if !defined(__ADSPBF544__) 142 #define CONFIG_LIBATA 143 #define CONFIG_SYS_SATA_MAX_DEVICE 1 144 #define CONFIG_LBA48 145 #define CONFIG_PATA_BFIN 146 #define CONFIG_BFIN_ATAPI_BASE_ADDR 0xFFC03800 147 #define CONFIG_BFIN_ATA_MODE XFER_PIO_4 148 #endif 149 150 151 /* 152 * SDH Settings 153 */ 154 #if !defined(__ADSPBF544__) 155 #define CONFIG_GENERIC_MMC 156 #define CONFIG_MMC 157 #define CONFIG_BFIN_SDH 158 #endif 159 160 161 /* 162 * USB Settings 163 */ 164 #if !defined(__ADSPBF544__) 165 #define CONFIG_USB 166 #define CONFIG_MUSB_HCD 167 #define CONFIG_USB_BLACKFIN 168 #define CONFIG_USB_STORAGE 169 #define CONFIG_MUSB_TIMEOUT 100000 170 #endif 171 172 173 /* 174 * Misc Settings 175 */ 176 #define CONFIG_BOARD_EARLY_INIT_F 177 #define CONFIG_BOARD_SIZE_LIMIT $$(( 512 * 1024 )) 178 #define CONFIG_RTC_BFIN 179 #define CONFIG_UART_CONSOLE 1 180 #define CONFIG_BFIN_SPI_IMG_SIZE 0x50000 181 182 #define CONFIG_ADI_GPIO2 183 184 #undef CONFIG_VIDEO 185 #ifdef CONFIG_VIDEO 186 #define EASYLOGO_HEADER < asm/bfin_logo_230x230_gzip.h > 187 #define CONFIG_DEB_DMA_URGENT 188 #endif 189 190 /* Define if want to do post memory test */ 191 #undef CONFIG_POST 192 #ifdef CONFIG_POST 193 #define CONFIG_POST_BSPEC1_GPIO_LEDS \ 194 GPIO_PG6, GPIO_PG7, GPIO_PG8, GPIO_PG9, GPIO_PG10, GPIO_PG11, 195 #define CONFIG_POST_BSPEC2_GPIO_BUTTONS \ 196 GPIO_PB8, GPIO_PB9, GPIO_PB10, GPIO_PB11 197 #define CONFIG_POST_BSPEC2_GPIO_NAMES \ 198 13, 12, 11, 10, 199 #define CONFIG_SYS_POST_FLASH_START 10 200 #define CONFIG_SYS_POST_FLASH_END 127 201 #endif 202 203 204 /* 205 * Pull in common ADI header for remaining command/environment setup 206 */ 207 #include <configs/bfin_adi_common.h> 208 209 #endif 210