1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
3 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
4
5 #include <arm_mve.h>
6
7 // CHECK-LABEL: @test_vbicq_n_s16(
8 // CHECK-NEXT: entry:
9 // CHECK-NEXT: [[TMP0:%.*]] = and <8 x i16> [[A:%.*]], <i16 11007, i16 11007, i16 11007, i16 11007, i16 11007, i16 11007, i16 11007, i16 11007>
10 // CHECK-NEXT: ret <8 x i16> [[TMP0]]
11 //
test_vbicq_n_s16(int16x8_t a)12 int16x8_t test_vbicq_n_s16(int16x8_t a)
13 {
14 #ifdef POLYMORPHIC
15 return vbicq(a, 0xd500);
16 #else /* POLYMORPHIC */
17 return vbicq_n_s16(a, 0xd500);
18 #endif /* POLYMORPHIC */
19 }
20
21 // CHECK-LABEL: @test_vbicq_n_s32(
22 // CHECK-NEXT: entry:
23 // CHECK-NEXT: [[TMP0:%.*]] = and <4 x i32> [[A:%.*]], <i32 -252, i32 -252, i32 -252, i32 -252>
24 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
25 //
test_vbicq_n_s32(int32x4_t a)26 int32x4_t test_vbicq_n_s32(int32x4_t a)
27 {
28 #ifdef POLYMORPHIC
29 return vbicq(a, 0xfb);
30 #else /* POLYMORPHIC */
31 return vbicq_n_s32(a, 0xfb);
32 #endif /* POLYMORPHIC */
33 }
34
35 // CHECK-LABEL: @test_vbicq_n_u16(
36 // CHECK-NEXT: entry:
37 // CHECK-NEXT: [[TMP0:%.*]] = and <8 x i16> [[A:%.*]], <i16 -243, i16 -243, i16 -243, i16 -243, i16 -243, i16 -243, i16 -243, i16 -243>
38 // CHECK-NEXT: ret <8 x i16> [[TMP0]]
39 //
test_vbicq_n_u16(uint16x8_t a)40 uint16x8_t test_vbicq_n_u16(uint16x8_t a)
41 {
42 #ifdef POLYMORPHIC
43 return vbicq(a, 0xf2);
44 #else /* POLYMORPHIC */
45 return vbicq_n_u16(a, 0xf2);
46 #endif /* POLYMORPHIC */
47 }
48
49 // CHECK-LABEL: @test_vbicq_n_u32(
50 // CHECK-NEXT: entry:
51 // CHECK-NEXT: [[TMP0:%.*]] = and <4 x i32> [[A:%.*]], <i32 -8193, i32 -8193, i32 -8193, i32 -8193>
52 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
53 //
test_vbicq_n_u32(uint32x4_t a)54 uint32x4_t test_vbicq_n_u32(uint32x4_t a)
55 {
56 #ifdef POLYMORPHIC
57 return vbicq(a, 0x2000);
58 #else /* POLYMORPHIC */
59 return vbicq_n_u32(a, 0x2000);
60 #endif /* POLYMORPHIC */
61 }
62
63 // CHECK-LABEL: @test_vorrq_n_s16(
64 // CHECK-NEXT: entry:
65 // CHECK-NEXT: [[TMP0:%.*]] = or <8 x i16> [[A:%.*]], <i16 195, i16 195, i16 195, i16 195, i16 195, i16 195, i16 195, i16 195>
66 // CHECK-NEXT: ret <8 x i16> [[TMP0]]
67 //
test_vorrq_n_s16(int16x8_t a)68 int16x8_t test_vorrq_n_s16(int16x8_t a)
69 {
70 #ifdef POLYMORPHIC
71 return vorrq(a, 0xc3);
72 #else /* POLYMORPHIC */
73 return vorrq_n_s16(a, 0xc3);
74 #endif /* POLYMORPHIC */
75 }
76
77 // CHECK-LABEL: @test_vorrq_n_s32(
78 // CHECK-NEXT: entry:
79 // CHECK-NEXT: [[TMP0:%.*]] = or <4 x i32> [[A:%.*]], <i32 65536, i32 65536, i32 65536, i32 65536>
80 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
81 //
test_vorrq_n_s32(int32x4_t a)82 int32x4_t test_vorrq_n_s32(int32x4_t a)
83 {
84 #ifdef POLYMORPHIC
85 return vorrq(a, 0x10000);
86 #else /* POLYMORPHIC */
87 return vorrq_n_s32(a, 0x10000);
88 #endif /* POLYMORPHIC */
89 }
90
91 // CHECK-LABEL: @test_vorrq_n_u16(
92 // CHECK-NEXT: entry:
93 // CHECK-NEXT: [[TMP0:%.*]] = or <8 x i16> [[A:%.*]], <i16 -4096, i16 -4096, i16 -4096, i16 -4096, i16 -4096, i16 -4096, i16 -4096, i16 -4096>
94 // CHECK-NEXT: ret <8 x i16> [[TMP0]]
95 //
test_vorrq_n_u16(uint16x8_t a)96 uint16x8_t test_vorrq_n_u16(uint16x8_t a)
97 {
98 #ifdef POLYMORPHIC
99 return vorrq(a, 0xf000);
100 #else /* POLYMORPHIC */
101 return vorrq_n_u16(a, 0xf000);
102 #endif /* POLYMORPHIC */
103 }
104
105 // CHECK-LABEL: @test_vorrq_n_u32(
106 // CHECK-NEXT: entry:
107 // CHECK-NEXT: [[TMP0:%.*]] = or <4 x i32> [[A:%.*]], <i32 8978432, i32 8978432, i32 8978432, i32 8978432>
108 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
109 //
test_vorrq_n_u32(uint32x4_t a)110 uint32x4_t test_vorrq_n_u32(uint32x4_t a)
111 {
112 #ifdef POLYMORPHIC
113 return vorrq(a, 0x890000);
114 #else /* POLYMORPHIC */
115 return vorrq_n_u32(a, 0x890000);
116 #endif /* POLYMORPHIC */
117 }
118
119 // CHECK-LABEL: @test_vmvnq_n_s16(
120 // CHECK-NEXT: entry:
121 // CHECK-NEXT: ret <8 x i16> <i16 27391, i16 27391, i16 27391, i16 27391, i16 27391, i16 27391, i16 27391, i16 27391>
122 //
test_vmvnq_n_s16()123 int16x8_t test_vmvnq_n_s16()
124 {
125 return vmvnq_n_s16(0x9500);
126 }
127
128 // CHECK-LABEL: @test_vmvnq_n_s32(
129 // CHECK-NEXT: entry:
130 // CHECK-NEXT: ret <4 x i32> <i32 -5570561, i32 -5570561, i32 -5570561, i32 -5570561>
131 //
test_vmvnq_n_s32()132 int32x4_t test_vmvnq_n_s32()
133 {
134 return vmvnq_n_s32(0x550000);
135 }
136
137 // CHECK-LABEL: @test_vmvnq_n_u16(
138 // CHECK-NEXT: entry:
139 // CHECK-NEXT: ret <8 x i16> <i16 -18689, i16 -18689, i16 -18689, i16 -18689, i16 -18689, i16 -18689, i16 -18689, i16 -18689>
140 //
test_vmvnq_n_u16()141 uint16x8_t test_vmvnq_n_u16()
142 {
143 return vmvnq_n_u16(0x4900);
144 }
145
146 // CHECK-LABEL: @test_vmvnq_n_u32(
147 // CHECK-NEXT: entry:
148 // CHECK-NEXT: ret <4 x i32> <i32 1023410175, i32 1023410175, i32 1023410175, i32 1023410175>
149 //
test_vmvnq_n_u32()150 uint32x4_t test_vmvnq_n_u32()
151 {
152 return vmvnq_n_u32(0xc3000000);
153 }
154
155 // CHECK-LABEL: @test_vbicq_m_n_s16(
156 // CHECK-NEXT: entry:
157 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
158 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
159 // CHECK-NEXT: [[TMP2:%.*]] = and <8 x i16> [[A:%.*]], <i16 -11265, i16 -11265, i16 -11265, i16 -11265, i16 -11265, i16 -11265, i16 -11265, i16 -11265>
160 // CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> [[TMP2]], <8 x i16> [[A]]
161 // CHECK-NEXT: ret <8 x i16> [[TMP3]]
162 //
test_vbicq_m_n_s16(int16x8_t a,mve_pred16_t p)163 int16x8_t test_vbicq_m_n_s16(int16x8_t a, mve_pred16_t p)
164 {
165 #ifdef POLYMORPHIC
166 return vbicq_m_n(a, 0x2c00, p);
167 #else /* POLYMORPHIC */
168 return vbicq_m_n_s16(a, 0x2c00, p);
169 #endif /* POLYMORPHIC */
170 }
171
172 // CHECK-LABEL: @test_vbicq_m_n_s32(
173 // CHECK-NEXT: entry:
174 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
175 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
176 // CHECK-NEXT: [[TMP2:%.*]] = and <4 x i32> [[A:%.*]], <i32 -13893633, i32 -13893633, i32 -13893633, i32 -13893633>
177 // CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[TMP2]], <4 x i32> [[A]]
178 // CHECK-NEXT: ret <4 x i32> [[TMP3]]
179 //
test_vbicq_m_n_s32(int32x4_t a,mve_pred16_t p)180 int32x4_t test_vbicq_m_n_s32(int32x4_t a, mve_pred16_t p)
181 {
182 #ifdef POLYMORPHIC
183 return vbicq_m_n(a, 0xd40000, p);
184 #else /* POLYMORPHIC */
185 return vbicq_m_n_s32(a, 0xd40000, p);
186 #endif /* POLYMORPHIC */
187 }
188
189 // CHECK-LABEL: @test_vbicq_m_n_u16(
190 // CHECK-NEXT: entry:
191 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
192 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
193 // CHECK-NEXT: [[TMP2:%.*]] = and <8 x i16> [[A:%.*]], <i16 -37, i16 -37, i16 -37, i16 -37, i16 -37, i16 -37, i16 -37, i16 -37>
194 // CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> [[TMP2]], <8 x i16> [[A]]
195 // CHECK-NEXT: ret <8 x i16> [[TMP3]]
196 //
test_vbicq_m_n_u16(uint16x8_t a,mve_pred16_t p)197 uint16x8_t test_vbicq_m_n_u16(uint16x8_t a, mve_pred16_t p)
198 {
199 #ifdef POLYMORPHIC
200 return vbicq_m_n(a, 0x24, p);
201 #else /* POLYMORPHIC */
202 return vbicq_m_n_u16(a, 0x24, p);
203 #endif /* POLYMORPHIC */
204 }
205
206 // CHECK-LABEL: @test_vbicq_m_n_u32(
207 // CHECK-NEXT: entry:
208 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
209 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
210 // CHECK-NEXT: [[TMP2:%.*]] = and <4 x i32> [[A:%.*]], <i32 -1644167169, i32 -1644167169, i32 -1644167169, i32 -1644167169>
211 // CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[TMP2]], <4 x i32> [[A]]
212 // CHECK-NEXT: ret <4 x i32> [[TMP3]]
213 //
test_vbicq_m_n_u32(uint32x4_t a,mve_pred16_t p)214 uint32x4_t test_vbicq_m_n_u32(uint32x4_t a, mve_pred16_t p)
215 {
216 #ifdef POLYMORPHIC
217 return vbicq_m_n(a, 0x62000000, p);
218 #else /* POLYMORPHIC */
219 return vbicq_m_n_u32(a, 0x62000000, p);
220 #endif /* POLYMORPHIC */
221 }
222
223 // CHECK-LABEL: @test_vorrq_m_n_s16(
224 // CHECK-NEXT: entry:
225 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
226 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
227 // CHECK-NEXT: [[TMP2:%.*]] = or <8 x i16> [[A:%.*]], <i16 13568, i16 13568, i16 13568, i16 13568, i16 13568, i16 13568, i16 13568, i16 13568>
228 // CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> [[TMP2]], <8 x i16> [[A]]
229 // CHECK-NEXT: ret <8 x i16> [[TMP3]]
230 //
test_vorrq_m_n_s16(int16x8_t a,mve_pred16_t p)231 int16x8_t test_vorrq_m_n_s16(int16x8_t a, mve_pred16_t p)
232 {
233 #ifdef POLYMORPHIC
234 return vorrq_m_n(a, 0x3500, p);
235 #else /* POLYMORPHIC */
236 return vorrq_m_n_s16(a, 0x3500, p);
237 #endif /* POLYMORPHIC */
238 }
239
240 // CHECK-LABEL: @test_vorrq_m_n_s32(
241 // CHECK-NEXT: entry:
242 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
243 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
244 // CHECK-NEXT: [[TMP2:%.*]] = or <4 x i32> [[A:%.*]], <i32 654311424, i32 654311424, i32 654311424, i32 654311424>
245 // CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[TMP2]], <4 x i32> [[A]]
246 // CHECK-NEXT: ret <4 x i32> [[TMP3]]
247 //
test_vorrq_m_n_s32(int32x4_t a,mve_pred16_t p)248 int32x4_t test_vorrq_m_n_s32(int32x4_t a, mve_pred16_t p)
249 {
250 #ifdef POLYMORPHIC
251 return vorrq_m_n(a, 0x27000000, p);
252 #else /* POLYMORPHIC */
253 return vorrq_m_n_s32(a, 0x27000000, p);
254 #endif /* POLYMORPHIC */
255 }
256
257 // CHECK-LABEL: @test_vorrq_m_n_u16(
258 // CHECK-NEXT: entry:
259 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
260 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
261 // CHECK-NEXT: [[TMP2:%.*]] = or <8 x i16> [[A:%.*]], <i16 175, i16 175, i16 175, i16 175, i16 175, i16 175, i16 175, i16 175>
262 // CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> [[TMP2]], <8 x i16> [[A]]
263 // CHECK-NEXT: ret <8 x i16> [[TMP3]]
264 //
test_vorrq_m_n_u16(uint16x8_t a,mve_pred16_t p)265 uint16x8_t test_vorrq_m_n_u16(uint16x8_t a, mve_pred16_t p)
266 {
267 #ifdef POLYMORPHIC
268 return vorrq_m_n(a, 0xaf, p);
269 #else /* POLYMORPHIC */
270 return vorrq_m_n_u16(a, 0xaf, p);
271 #endif /* POLYMORPHIC */
272 }
273
274 // CHECK-LABEL: @test_vorrq_m_n_u32(
275 // CHECK-NEXT: entry:
276 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
277 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
278 // CHECK-NEXT: [[TMP2:%.*]] = or <4 x i32> [[A:%.*]], <i32 89, i32 89, i32 89, i32 89>
279 // CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[TMP2]], <4 x i32> [[A]]
280 // CHECK-NEXT: ret <4 x i32> [[TMP3]]
281 //
test_vorrq_m_n_u32(uint32x4_t a,mve_pred16_t p)282 uint32x4_t test_vorrq_m_n_u32(uint32x4_t a, mve_pred16_t p)
283 {
284 #ifdef POLYMORPHIC
285 return vorrq_m_n(a, 0x59, p);
286 #else /* POLYMORPHIC */
287 return vorrq_m_n_u32(a, 0x59, p);
288 #endif /* POLYMORPHIC */
289 }
290
291 // CHECK-LABEL: @test_vmvnq_m_n_s16(
292 // CHECK-NEXT: entry:
293 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
294 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
295 // CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> <i16 -3841, i16 -3841, i16 -3841, i16 -3841, i16 -3841, i16 -3841, i16 -3841, i16 -3841>, <8 x i16> [[INACTIVE:%.*]]
296 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
297 //
test_vmvnq_m_n_s16(int16x8_t inactive,mve_pred16_t p)298 int16x8_t test_vmvnq_m_n_s16(int16x8_t inactive, mve_pred16_t p)
299 {
300 #ifdef POLYMORPHIC
301 return vmvnq_m(inactive, 0xf00, p);
302 #else /* POLYMORPHIC */
303 return vmvnq_m_n_s16(inactive, 0xf00, p);
304 #endif /* POLYMORPHIC */
305 }
306
307 // CHECK-LABEL: @test_vmvnq_m_n_s32(
308 // CHECK-NEXT: entry:
309 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
310 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
311 // CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> <i32 -18945, i32 -18945, i32 -18945, i32 -18945>, <4 x i32> [[INACTIVE:%.*]]
312 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
313 //
test_vmvnq_m_n_s32(int32x4_t inactive,mve_pred16_t p)314 int32x4_t test_vmvnq_m_n_s32(int32x4_t inactive, mve_pred16_t p)
315 {
316 #ifdef POLYMORPHIC
317 return vmvnq_m(inactive, 0x4a00, p);
318 #else /* POLYMORPHIC */
319 return vmvnq_m_n_s32(inactive, 0x4a00, p);
320 #endif /* POLYMORPHIC */
321 }
322
323 // CHECK-LABEL: @test_vmvnq_m_n_u16(
324 // CHECK-NEXT: entry:
325 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
326 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
327 // CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> <i16 23295, i16 23295, i16 23295, i16 23295, i16 23295, i16 23295, i16 23295, i16 23295>, <8 x i16> [[INACTIVE:%.*]]
328 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
329 //
test_vmvnq_m_n_u16(uint16x8_t inactive,mve_pred16_t p)330 uint16x8_t test_vmvnq_m_n_u16(uint16x8_t inactive, mve_pred16_t p)
331 {
332 #ifdef POLYMORPHIC
333 return vmvnq_m(inactive, 0xa500, p);
334 #else /* POLYMORPHIC */
335 return vmvnq_m_n_u16(inactive, 0xa500, p);
336 #endif /* POLYMORPHIC */
337 }
338
339 // CHECK-LABEL: @test_vmvnq_m_n_u32(
340 // CHECK-NEXT: entry:
341 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
342 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
343 // CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> <i32 -63489, i32 -63489, i32 -63489, i32 -63489>, <4 x i32> [[INACTIVE:%.*]]
344 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
345 //
test_vmvnq_m_n_u32(uint32x4_t inactive,mve_pred16_t p)346 uint32x4_t test_vmvnq_m_n_u32(uint32x4_t inactive, mve_pred16_t p)
347 {
348 #ifdef POLYMORPHIC
349 return vmvnq_m(inactive, 0xf800, p);
350 #else /* POLYMORPHIC */
351 return vmvnq_m_n_u32(inactive, 0xf800, p);
352 #endif /* POLYMORPHIC */
353 }
354
355 // CHECK-LABEL: @test_vmvnq_x_n_s16(
356 // CHECK-NEXT: entry:
357 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
358 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
359 // CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> <i16 767, i16 767, i16 767, i16 767, i16 767, i16 767, i16 767, i16 767>, <8 x i16> undef
360 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
361 //
test_vmvnq_x_n_s16(mve_pred16_t p)362 int16x8_t test_vmvnq_x_n_s16(mve_pred16_t p)
363 {
364 return vmvnq_x_n_s16(0xfd00, p);
365 }
366
367 // CHECK-LABEL: @test_vmvnq_x_n_s32(
368 // CHECK-NEXT: entry:
369 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
370 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
371 // CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> <i32 -12189697, i32 -12189697, i32 -12189697, i32 -12189697>, <4 x i32> undef
372 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
373 //
test_vmvnq_x_n_s32(mve_pred16_t p)374 int32x4_t test_vmvnq_x_n_s32(mve_pred16_t p)
375 {
376 return vmvnq_x_n_s32(0xba0000, p);
377 }
378
379 // CHECK-LABEL: @test_vmvnq_x_n_u16(
380 // CHECK-NEXT: entry:
381 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
382 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
383 // CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> <i16 -21505, i16 -21505, i16 -21505, i16 -21505, i16 -21505, i16 -21505, i16 -21505, i16 -21505>, <8 x i16> undef
384 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
385 //
test_vmvnq_x_n_u16(mve_pred16_t p)386 uint16x8_t test_vmvnq_x_n_u16(mve_pred16_t p)
387 {
388 return vmvnq_x_n_u16(0x5400, p);
389 }
390
391 // CHECK-LABEL: @test_vmvnq_x_n_u32(
392 // CHECK-NEXT: entry:
393 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
394 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
395 // CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> <i32 -4865, i32 -4865, i32 -4865, i32 -4865>, <4 x i32> undef
396 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
397 //
test_vmvnq_x_n_u32(mve_pred16_t p)398 uint32x4_t test_vmvnq_x_n_u32(mve_pred16_t p)
399 {
400 return vmvnq_x_n_u32(0x1300, p);
401 }
402
403