1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
3 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
4
5 #include <arm_mve.h>
6
7 // CHECK-LABEL: @test_vldrbq_gather_offset_s16(
8 // CHECK-NEXT: entry:
9 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x i16> @llvm.arm.mve.vldr.gather.offset.v8i16.p0i8.v8i16(i8* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], i32 8, i32 0, i32 0)
10 // CHECK-NEXT: ret <8 x i16> [[TMP0]]
11 //
test_vldrbq_gather_offset_s16(const int8_t * base,uint16x8_t offset)12 int16x8_t test_vldrbq_gather_offset_s16(const int8_t *base, uint16x8_t offset)
13 {
14 #ifdef POLYMORPHIC
15 return vldrbq_gather_offset(base, offset);
16 #else /* POLYMORPHIC */
17 return vldrbq_gather_offset_s16(base, offset);
18 #endif /* POLYMORPHIC */
19 }
20
21 // CHECK-LABEL: @test_vldrbq_gather_offset_s32(
22 // CHECK-NEXT: entry:
23 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.v4i32.p0i8.v4i32(i8* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 8, i32 0, i32 0)
24 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
25 //
test_vldrbq_gather_offset_s32(const int8_t * base,uint32x4_t offset)26 int32x4_t test_vldrbq_gather_offset_s32(const int8_t *base, uint32x4_t offset)
27 {
28 #ifdef POLYMORPHIC
29 return vldrbq_gather_offset(base, offset);
30 #else /* POLYMORPHIC */
31 return vldrbq_gather_offset_s32(base, offset);
32 #endif /* POLYMORPHIC */
33 }
34
35 // CHECK-LABEL: @test_vldrbq_gather_offset_s8(
36 // CHECK-NEXT: entry:
37 // CHECK-NEXT: [[TMP0:%.*]] = call <16 x i8> @llvm.arm.mve.vldr.gather.offset.v16i8.p0i8.v16i8(i8* [[BASE:%.*]], <16 x i8> [[OFFSET:%.*]], i32 8, i32 0, i32 0)
38 // CHECK-NEXT: ret <16 x i8> [[TMP0]]
39 //
test_vldrbq_gather_offset_s8(const int8_t * base,uint8x16_t offset)40 int8x16_t test_vldrbq_gather_offset_s8(const int8_t *base, uint8x16_t offset)
41 {
42 #ifdef POLYMORPHIC
43 return vldrbq_gather_offset(base, offset);
44 #else /* POLYMORPHIC */
45 return vldrbq_gather_offset_s8(base, offset);
46 #endif /* POLYMORPHIC */
47 }
48
49 // CHECK-LABEL: @test_vldrbq_gather_offset_u16(
50 // CHECK-NEXT: entry:
51 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x i16> @llvm.arm.mve.vldr.gather.offset.v8i16.p0i8.v8i16(i8* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], i32 8, i32 0, i32 1)
52 // CHECK-NEXT: ret <8 x i16> [[TMP0]]
53 //
test_vldrbq_gather_offset_u16(const uint8_t * base,uint16x8_t offset)54 uint16x8_t test_vldrbq_gather_offset_u16(const uint8_t *base, uint16x8_t offset)
55 {
56 #ifdef POLYMORPHIC
57 return vldrbq_gather_offset(base, offset);
58 #else /* POLYMORPHIC */
59 return vldrbq_gather_offset_u16(base, offset);
60 #endif /* POLYMORPHIC */
61 }
62
63 // CHECK-LABEL: @test_vldrbq_gather_offset_u32(
64 // CHECK-NEXT: entry:
65 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.v4i32.p0i8.v4i32(i8* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 8, i32 0, i32 1)
66 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
67 //
test_vldrbq_gather_offset_u32(const uint8_t * base,uint32x4_t offset)68 uint32x4_t test_vldrbq_gather_offset_u32(const uint8_t *base, uint32x4_t offset)
69 {
70 #ifdef POLYMORPHIC
71 return vldrbq_gather_offset(base, offset);
72 #else /* POLYMORPHIC */
73 return vldrbq_gather_offset_u32(base, offset);
74 #endif /* POLYMORPHIC */
75 }
76
77 // CHECK-LABEL: @test_vldrbq_gather_offset_u8(
78 // CHECK-NEXT: entry:
79 // CHECK-NEXT: [[TMP0:%.*]] = call <16 x i8> @llvm.arm.mve.vldr.gather.offset.v16i8.p0i8.v16i8(i8* [[BASE:%.*]], <16 x i8> [[OFFSET:%.*]], i32 8, i32 0, i32 1)
80 // CHECK-NEXT: ret <16 x i8> [[TMP0]]
81 //
test_vldrbq_gather_offset_u8(const uint8_t * base,uint8x16_t offset)82 uint8x16_t test_vldrbq_gather_offset_u8(const uint8_t *base, uint8x16_t offset)
83 {
84 #ifdef POLYMORPHIC
85 return vldrbq_gather_offset(base, offset);
86 #else /* POLYMORPHIC */
87 return vldrbq_gather_offset_u8(base, offset);
88 #endif /* POLYMORPHIC */
89 }
90
91 // CHECK-LABEL: @test_vldrbq_gather_offset_z_s16(
92 // CHECK-NEXT: entry:
93 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
94 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
95 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.vldr.gather.offset.predicated.v8i16.p0i8.v8i16.v8i1(i8* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], i32 8, i32 0, i32 0, <8 x i1> [[TMP1]])
96 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
97 //
test_vldrbq_gather_offset_z_s16(const int8_t * base,uint16x8_t offset,mve_pred16_t p)98 int16x8_t test_vldrbq_gather_offset_z_s16(const int8_t *base, uint16x8_t offset, mve_pred16_t p)
99 {
100 #ifdef POLYMORPHIC
101 return vldrbq_gather_offset_z(base, offset, p);
102 #else /* POLYMORPHIC */
103 return vldrbq_gather_offset_z_s16(base, offset, p);
104 #endif /* POLYMORPHIC */
105 }
106
107 // CHECK-LABEL: @test_vldrbq_gather_offset_z_s32(
108 // CHECK-NEXT: entry:
109 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
110 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
111 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.predicated.v4i32.p0i8.v4i32.v4i1(i8* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 8, i32 0, i32 0, <4 x i1> [[TMP1]])
112 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
113 //
test_vldrbq_gather_offset_z_s32(const int8_t * base,uint32x4_t offset,mve_pred16_t p)114 int32x4_t test_vldrbq_gather_offset_z_s32(const int8_t *base, uint32x4_t offset, mve_pred16_t p)
115 {
116 #ifdef POLYMORPHIC
117 return vldrbq_gather_offset_z(base, offset, p);
118 #else /* POLYMORPHIC */
119 return vldrbq_gather_offset_z_s32(base, offset, p);
120 #endif /* POLYMORPHIC */
121 }
122
123 // CHECK-LABEL: @test_vldrbq_gather_offset_z_s8(
124 // CHECK-NEXT: entry:
125 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
126 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
127 // CHECK-NEXT: [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.vldr.gather.offset.predicated.v16i8.p0i8.v16i8.v16i1(i8* [[BASE:%.*]], <16 x i8> [[OFFSET:%.*]], i32 8, i32 0, i32 0, <16 x i1> [[TMP1]])
128 // CHECK-NEXT: ret <16 x i8> [[TMP2]]
129 //
test_vldrbq_gather_offset_z_s8(const int8_t * base,uint8x16_t offset,mve_pred16_t p)130 int8x16_t test_vldrbq_gather_offset_z_s8(const int8_t *base, uint8x16_t offset, mve_pred16_t p)
131 {
132 #ifdef POLYMORPHIC
133 return vldrbq_gather_offset_z(base, offset, p);
134 #else /* POLYMORPHIC */
135 return vldrbq_gather_offset_z_s8(base, offset, p);
136 #endif /* POLYMORPHIC */
137 }
138
139 // CHECK-LABEL: @test_vldrbq_gather_offset_z_u16(
140 // CHECK-NEXT: entry:
141 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
142 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
143 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.vldr.gather.offset.predicated.v8i16.p0i8.v8i16.v8i1(i8* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], i32 8, i32 0, i32 1, <8 x i1> [[TMP1]])
144 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
145 //
test_vldrbq_gather_offset_z_u16(const uint8_t * base,uint16x8_t offset,mve_pred16_t p)146 uint16x8_t test_vldrbq_gather_offset_z_u16(const uint8_t *base, uint16x8_t offset, mve_pred16_t p)
147 {
148 #ifdef POLYMORPHIC
149 return vldrbq_gather_offset_z(base, offset, p);
150 #else /* POLYMORPHIC */
151 return vldrbq_gather_offset_z_u16(base, offset, p);
152 #endif /* POLYMORPHIC */
153 }
154
155 // CHECK-LABEL: @test_vldrbq_gather_offset_z_u32(
156 // CHECK-NEXT: entry:
157 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
158 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
159 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.predicated.v4i32.p0i8.v4i32.v4i1(i8* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 8, i32 0, i32 1, <4 x i1> [[TMP1]])
160 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
161 //
test_vldrbq_gather_offset_z_u32(const uint8_t * base,uint32x4_t offset,mve_pred16_t p)162 uint32x4_t test_vldrbq_gather_offset_z_u32(const uint8_t *base, uint32x4_t offset, mve_pred16_t p)
163 {
164 #ifdef POLYMORPHIC
165 return vldrbq_gather_offset_z(base, offset, p);
166 #else /* POLYMORPHIC */
167 return vldrbq_gather_offset_z_u32(base, offset, p);
168 #endif /* POLYMORPHIC */
169 }
170
171 // CHECK-LABEL: @test_vldrbq_gather_offset_z_u8(
172 // CHECK-NEXT: entry:
173 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
174 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
175 // CHECK-NEXT: [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.vldr.gather.offset.predicated.v16i8.p0i8.v16i8.v16i1(i8* [[BASE:%.*]], <16 x i8> [[OFFSET:%.*]], i32 8, i32 0, i32 1, <16 x i1> [[TMP1]])
176 // CHECK-NEXT: ret <16 x i8> [[TMP2]]
177 //
test_vldrbq_gather_offset_z_u8(const uint8_t * base,uint8x16_t offset,mve_pred16_t p)178 uint8x16_t test_vldrbq_gather_offset_z_u8(const uint8_t *base, uint8x16_t offset, mve_pred16_t p)
179 {
180 #ifdef POLYMORPHIC
181 return vldrbq_gather_offset_z(base, offset, p);
182 #else /* POLYMORPHIC */
183 return vldrbq_gather_offset_z_u8(base, offset, p);
184 #endif /* POLYMORPHIC */
185 }
186
187 // CHECK-LABEL: @test_vldrdq_gather_base_s64(
188 // CHECK-NEXT: entry:
189 // CHECK-NEXT: [[TMP0:%.*]] = call <2 x i64> @llvm.arm.mve.vldr.gather.base.v2i64.v2i64(<2 x i64> [[ADDR:%.*]], i32 616)
190 // CHECK-NEXT: ret <2 x i64> [[TMP0]]
191 //
test_vldrdq_gather_base_s64(uint64x2_t addr)192 int64x2_t test_vldrdq_gather_base_s64(uint64x2_t addr)
193 {
194 return vldrdq_gather_base_s64(addr, 0x268);
195 }
196
197 // CHECK-LABEL: @test_vldrdq_gather_base_u64(
198 // CHECK-NEXT: entry:
199 // CHECK-NEXT: [[TMP0:%.*]] = call <2 x i64> @llvm.arm.mve.vldr.gather.base.v2i64.v2i64(<2 x i64> [[ADDR:%.*]], i32 -336)
200 // CHECK-NEXT: ret <2 x i64> [[TMP0]]
201 //
test_vldrdq_gather_base_u64(uint64x2_t addr)202 uint64x2_t test_vldrdq_gather_base_u64(uint64x2_t addr)
203 {
204 return vldrdq_gather_base_u64(addr, -0x150);
205 }
206
207 // CHECK-LABEL: @test_vldrdq_gather_base_wb_s64(
208 // CHECK-NEXT: entry:
209 // CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* [[ADDR:%.*]], align 8
210 // CHECK-NEXT: [[TMP1:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.arm.mve.vldr.gather.base.wb.v2i64.v2i64(<2 x i64> [[TMP0]], i32 576)
211 // CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[TMP1]], 1
212 // CHECK-NEXT: store <2 x i64> [[TMP2]], <2 x i64>* [[ADDR]], align 8
213 // CHECK-NEXT: [[TMP3:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[TMP1]], 0
214 // CHECK-NEXT: ret <2 x i64> [[TMP3]]
215 //
test_vldrdq_gather_base_wb_s64(uint64x2_t * addr)216 int64x2_t test_vldrdq_gather_base_wb_s64(uint64x2_t *addr)
217 {
218 return vldrdq_gather_base_wb_s64(addr, 0x240);
219 }
220
221 // CHECK-LABEL: @test_vldrdq_gather_base_wb_u64(
222 // CHECK-NEXT: entry:
223 // CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* [[ADDR:%.*]], align 8
224 // CHECK-NEXT: [[TMP1:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.arm.mve.vldr.gather.base.wb.v2i64.v2i64(<2 x i64> [[TMP0]], i32 -328)
225 // CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[TMP1]], 1
226 // CHECK-NEXT: store <2 x i64> [[TMP2]], <2 x i64>* [[ADDR]], align 8
227 // CHECK-NEXT: [[TMP3:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[TMP1]], 0
228 // CHECK-NEXT: ret <2 x i64> [[TMP3]]
229 //
test_vldrdq_gather_base_wb_u64(uint64x2_t * addr)230 uint64x2_t test_vldrdq_gather_base_wb_u64(uint64x2_t *addr)
231 {
232 return vldrdq_gather_base_wb_u64(addr, -0x148);
233 }
234
235 // CHECK-LABEL: @test_vldrdq_gather_base_wb_z_s64(
236 // CHECK-NEXT: entry:
237 // CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* [[ADDR:%.*]], align 8
238 // CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[P:%.*]] to i32
239 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP1]])
240 // CHECK-NEXT: [[TMP3:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.arm.mve.vldr.gather.base.wb.predicated.v2i64.v2i64.v4i1(<2 x i64> [[TMP0]], i32 664, <4 x i1> [[TMP2]])
241 // CHECK-NEXT: [[TMP4:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[TMP3]], 1
242 // CHECK-NEXT: store <2 x i64> [[TMP4]], <2 x i64>* [[ADDR]], align 8
243 // CHECK-NEXT: [[TMP5:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[TMP3]], 0
244 // CHECK-NEXT: ret <2 x i64> [[TMP5]]
245 //
test_vldrdq_gather_base_wb_z_s64(uint64x2_t * addr,mve_pred16_t p)246 int64x2_t test_vldrdq_gather_base_wb_z_s64(uint64x2_t *addr, mve_pred16_t p)
247 {
248 return vldrdq_gather_base_wb_z_s64(addr, 0x298, p);
249 }
250
251 // CHECK-LABEL: @test_vldrdq_gather_base_wb_z_u64(
252 // CHECK-NEXT: entry:
253 // CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* [[ADDR:%.*]], align 8
254 // CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[P:%.*]] to i32
255 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP1]])
256 // CHECK-NEXT: [[TMP3:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.arm.mve.vldr.gather.base.wb.predicated.v2i64.v2i64.v4i1(<2 x i64> [[TMP0]], i32 656, <4 x i1> [[TMP2]])
257 // CHECK-NEXT: [[TMP4:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[TMP3]], 1
258 // CHECK-NEXT: store <2 x i64> [[TMP4]], <2 x i64>* [[ADDR]], align 8
259 // CHECK-NEXT: [[TMP5:%.*]] = extractvalue { <2 x i64>, <2 x i64> } [[TMP3]], 0
260 // CHECK-NEXT: ret <2 x i64> [[TMP5]]
261 //
test_vldrdq_gather_base_wb_z_u64(uint64x2_t * addr,mve_pred16_t p)262 uint64x2_t test_vldrdq_gather_base_wb_z_u64(uint64x2_t *addr, mve_pred16_t p)
263 {
264 return vldrdq_gather_base_wb_z_u64(addr, 0x290, p);
265 }
266
267 // CHECK-LABEL: @test_vldrdq_gather_base_z_s64(
268 // CHECK-NEXT: entry:
269 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
270 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
271 // CHECK-NEXT: [[TMP2:%.*]] = call <2 x i64> @llvm.arm.mve.vldr.gather.base.predicated.v2i64.v2i64.v4i1(<2 x i64> [[ADDR:%.*]], i32 888, <4 x i1> [[TMP1]])
272 // CHECK-NEXT: ret <2 x i64> [[TMP2]]
273 //
test_vldrdq_gather_base_z_s64(uint64x2_t addr,mve_pred16_t p)274 int64x2_t test_vldrdq_gather_base_z_s64(uint64x2_t addr, mve_pred16_t p)
275 {
276 return vldrdq_gather_base_z_s64(addr, 0x378, p);
277 }
278
279 // CHECK-LABEL: @test_vldrdq_gather_base_z_u64(
280 // CHECK-NEXT: entry:
281 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
282 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
283 // CHECK-NEXT: [[TMP2:%.*]] = call <2 x i64> @llvm.arm.mve.vldr.gather.base.predicated.v2i64.v2i64.v4i1(<2 x i64> [[ADDR:%.*]], i32 -1000, <4 x i1> [[TMP1]])
284 // CHECK-NEXT: ret <2 x i64> [[TMP2]]
285 //
test_vldrdq_gather_base_z_u64(uint64x2_t addr,mve_pred16_t p)286 uint64x2_t test_vldrdq_gather_base_z_u64(uint64x2_t addr, mve_pred16_t p)
287 {
288 return vldrdq_gather_base_z_u64(addr, -0x3e8, p);
289 }
290
291 // CHECK-LABEL: @test_vldrdq_gather_offset_s64(
292 // CHECK-NEXT: entry:
293 // CHECK-NEXT: [[TMP0:%.*]] = call <2 x i64> @llvm.arm.mve.vldr.gather.offset.v2i64.p0i64.v2i64(i64* [[BASE:%.*]], <2 x i64> [[OFFSET:%.*]], i32 64, i32 0, i32 0)
294 // CHECK-NEXT: ret <2 x i64> [[TMP0]]
295 //
test_vldrdq_gather_offset_s64(const int64_t * base,uint64x2_t offset)296 int64x2_t test_vldrdq_gather_offset_s64(const int64_t *base, uint64x2_t offset)
297 {
298 #ifdef POLYMORPHIC
299 return vldrdq_gather_offset(base, offset);
300 #else /* POLYMORPHIC */
301 return vldrdq_gather_offset_s64(base, offset);
302 #endif /* POLYMORPHIC */
303 }
304
305 // CHECK-LABEL: @test_vldrdq_gather_offset_u64(
306 // CHECK-NEXT: entry:
307 // CHECK-NEXT: [[TMP0:%.*]] = call <2 x i64> @llvm.arm.mve.vldr.gather.offset.v2i64.p0i64.v2i64(i64* [[BASE:%.*]], <2 x i64> [[OFFSET:%.*]], i32 64, i32 0, i32 1)
308 // CHECK-NEXT: ret <2 x i64> [[TMP0]]
309 //
test_vldrdq_gather_offset_u64(const uint64_t * base,uint64x2_t offset)310 uint64x2_t test_vldrdq_gather_offset_u64(const uint64_t *base, uint64x2_t offset)
311 {
312 #ifdef POLYMORPHIC
313 return vldrdq_gather_offset(base, offset);
314 #else /* POLYMORPHIC */
315 return vldrdq_gather_offset_u64(base, offset);
316 #endif /* POLYMORPHIC */
317 }
318
319 // CHECK-LABEL: @test_vldrdq_gather_offset_z_s64(
320 // CHECK-NEXT: entry:
321 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
322 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
323 // CHECK-NEXT: [[TMP2:%.*]] = call <2 x i64> @llvm.arm.mve.vldr.gather.offset.predicated.v2i64.p0i64.v2i64.v4i1(i64* [[BASE:%.*]], <2 x i64> [[OFFSET:%.*]], i32 64, i32 0, i32 0, <4 x i1> [[TMP1]])
324 // CHECK-NEXT: ret <2 x i64> [[TMP2]]
325 //
test_vldrdq_gather_offset_z_s64(const int64_t * base,uint64x2_t offset,mve_pred16_t p)326 int64x2_t test_vldrdq_gather_offset_z_s64(const int64_t *base, uint64x2_t offset, mve_pred16_t p)
327 {
328 #ifdef POLYMORPHIC
329 return vldrdq_gather_offset_z(base, offset, p);
330 #else /* POLYMORPHIC */
331 return vldrdq_gather_offset_z_s64(base, offset, p);
332 #endif /* POLYMORPHIC */
333 }
334
335 // CHECK-LABEL: @test_vldrdq_gather_offset_z_u64(
336 // CHECK-NEXT: entry:
337 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
338 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
339 // CHECK-NEXT: [[TMP2:%.*]] = call <2 x i64> @llvm.arm.mve.vldr.gather.offset.predicated.v2i64.p0i64.v2i64.v4i1(i64* [[BASE:%.*]], <2 x i64> [[OFFSET:%.*]], i32 64, i32 0, i32 1, <4 x i1> [[TMP1]])
340 // CHECK-NEXT: ret <2 x i64> [[TMP2]]
341 //
test_vldrdq_gather_offset_z_u64(const uint64_t * base,uint64x2_t offset,mve_pred16_t p)342 uint64x2_t test_vldrdq_gather_offset_z_u64(const uint64_t *base, uint64x2_t offset, mve_pred16_t p)
343 {
344 #ifdef POLYMORPHIC
345 return vldrdq_gather_offset_z(base, offset, p);
346 #else /* POLYMORPHIC */
347 return vldrdq_gather_offset_z_u64(base, offset, p);
348 #endif /* POLYMORPHIC */
349 }
350
351 // CHECK-LABEL: @test_vldrdq_gather_shifted_offset_s64(
352 // CHECK-NEXT: entry:
353 // CHECK-NEXT: [[TMP0:%.*]] = call <2 x i64> @llvm.arm.mve.vldr.gather.offset.v2i64.p0i64.v2i64(i64* [[BASE:%.*]], <2 x i64> [[OFFSET:%.*]], i32 64, i32 3, i32 0)
354 // CHECK-NEXT: ret <2 x i64> [[TMP0]]
355 //
test_vldrdq_gather_shifted_offset_s64(const int64_t * base,uint64x2_t offset)356 int64x2_t test_vldrdq_gather_shifted_offset_s64(const int64_t *base, uint64x2_t offset)
357 {
358 #ifdef POLYMORPHIC
359 return vldrdq_gather_shifted_offset(base, offset);
360 #else /* POLYMORPHIC */
361 return vldrdq_gather_shifted_offset_s64(base, offset);
362 #endif /* POLYMORPHIC */
363 }
364
365 // CHECK-LABEL: @test_vldrdq_gather_shifted_offset_u64(
366 // CHECK-NEXT: entry:
367 // CHECK-NEXT: [[TMP0:%.*]] = call <2 x i64> @llvm.arm.mve.vldr.gather.offset.v2i64.p0i64.v2i64(i64* [[BASE:%.*]], <2 x i64> [[OFFSET:%.*]], i32 64, i32 3, i32 1)
368 // CHECK-NEXT: ret <2 x i64> [[TMP0]]
369 //
test_vldrdq_gather_shifted_offset_u64(const uint64_t * base,uint64x2_t offset)370 uint64x2_t test_vldrdq_gather_shifted_offset_u64(const uint64_t *base, uint64x2_t offset)
371 {
372 #ifdef POLYMORPHIC
373 return vldrdq_gather_shifted_offset(base, offset);
374 #else /* POLYMORPHIC */
375 return vldrdq_gather_shifted_offset_u64(base, offset);
376 #endif /* POLYMORPHIC */
377 }
378
379 // CHECK-LABEL: @test_vldrdq_gather_shifted_offset_z_s64(
380 // CHECK-NEXT: entry:
381 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
382 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
383 // CHECK-NEXT: [[TMP2:%.*]] = call <2 x i64> @llvm.arm.mve.vldr.gather.offset.predicated.v2i64.p0i64.v2i64.v4i1(i64* [[BASE:%.*]], <2 x i64> [[OFFSET:%.*]], i32 64, i32 3, i32 0, <4 x i1> [[TMP1]])
384 // CHECK-NEXT: ret <2 x i64> [[TMP2]]
385 //
test_vldrdq_gather_shifted_offset_z_s64(const int64_t * base,uint64x2_t offset,mve_pred16_t p)386 int64x2_t test_vldrdq_gather_shifted_offset_z_s64(const int64_t *base, uint64x2_t offset, mve_pred16_t p)
387 {
388 #ifdef POLYMORPHIC
389 return vldrdq_gather_shifted_offset_z(base, offset, p);
390 #else /* POLYMORPHIC */
391 return vldrdq_gather_shifted_offset_z_s64(base, offset, p);
392 #endif /* POLYMORPHIC */
393 }
394
395 // CHECK-LABEL: @test_vldrdq_gather_shifted_offset_z_u64(
396 // CHECK-NEXT: entry:
397 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
398 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
399 // CHECK-NEXT: [[TMP2:%.*]] = call <2 x i64> @llvm.arm.mve.vldr.gather.offset.predicated.v2i64.p0i64.v2i64.v4i1(i64* [[BASE:%.*]], <2 x i64> [[OFFSET:%.*]], i32 64, i32 3, i32 1, <4 x i1> [[TMP1]])
400 // CHECK-NEXT: ret <2 x i64> [[TMP2]]
401 //
test_vldrdq_gather_shifted_offset_z_u64(const uint64_t * base,uint64x2_t offset,mve_pred16_t p)402 uint64x2_t test_vldrdq_gather_shifted_offset_z_u64(const uint64_t *base, uint64x2_t offset, mve_pred16_t p)
403 {
404 #ifdef POLYMORPHIC
405 return vldrdq_gather_shifted_offset_z(base, offset, p);
406 #else /* POLYMORPHIC */
407 return vldrdq_gather_shifted_offset_z_u64(base, offset, p);
408 #endif /* POLYMORPHIC */
409 }
410
411 // CHECK-LABEL: @test_vldrhq_gather_offset_f16(
412 // CHECK-NEXT: entry:
413 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vldr.gather.offset.v8f16.p0f16.v8i16(half* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], i32 16, i32 0, i32 0)
414 // CHECK-NEXT: ret <8 x half> [[TMP0]]
415 //
test_vldrhq_gather_offset_f16(const float16_t * base,uint16x8_t offset)416 float16x8_t test_vldrhq_gather_offset_f16(const float16_t *base, uint16x8_t offset)
417 {
418 #ifdef POLYMORPHIC
419 return vldrhq_gather_offset(base, offset);
420 #else /* POLYMORPHIC */
421 return vldrhq_gather_offset_f16(base, offset);
422 #endif /* POLYMORPHIC */
423 }
424
425 // CHECK-LABEL: @test_vldrhq_gather_offset_s16(
426 // CHECK-NEXT: entry:
427 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x i16> @llvm.arm.mve.vldr.gather.offset.v8i16.p0i16.v8i16(i16* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], i32 16, i32 0, i32 0)
428 // CHECK-NEXT: ret <8 x i16> [[TMP0]]
429 //
test_vldrhq_gather_offset_s16(const int16_t * base,uint16x8_t offset)430 int16x8_t test_vldrhq_gather_offset_s16(const int16_t *base, uint16x8_t offset)
431 {
432 #ifdef POLYMORPHIC
433 return vldrhq_gather_offset(base, offset);
434 #else /* POLYMORPHIC */
435 return vldrhq_gather_offset_s16(base, offset);
436 #endif /* POLYMORPHIC */
437 }
438
439 // CHECK-LABEL: @test_vldrhq_gather_offset_s32(
440 // CHECK-NEXT: entry:
441 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.v4i32.p0i16.v4i32(i16* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 16, i32 0, i32 0)
442 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
443 //
test_vldrhq_gather_offset_s32(const int16_t * base,uint32x4_t offset)444 int32x4_t test_vldrhq_gather_offset_s32(const int16_t *base, uint32x4_t offset)
445 {
446 #ifdef POLYMORPHIC
447 return vldrhq_gather_offset(base, offset);
448 #else /* POLYMORPHIC */
449 return vldrhq_gather_offset_s32(base, offset);
450 #endif /* POLYMORPHIC */
451 }
452
453 // CHECK-LABEL: @test_vldrhq_gather_offset_u16(
454 // CHECK-NEXT: entry:
455 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x i16> @llvm.arm.mve.vldr.gather.offset.v8i16.p0i16.v8i16(i16* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], i32 16, i32 0, i32 1)
456 // CHECK-NEXT: ret <8 x i16> [[TMP0]]
457 //
test_vldrhq_gather_offset_u16(const uint16_t * base,uint16x8_t offset)458 uint16x8_t test_vldrhq_gather_offset_u16(const uint16_t *base, uint16x8_t offset)
459 {
460 #ifdef POLYMORPHIC
461 return vldrhq_gather_offset(base, offset);
462 #else /* POLYMORPHIC */
463 return vldrhq_gather_offset_u16(base, offset);
464 #endif /* POLYMORPHIC */
465 }
466
467 // CHECK-LABEL: @test_vldrhq_gather_offset_u32(
468 // CHECK-NEXT: entry:
469 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.v4i32.p0i16.v4i32(i16* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 16, i32 0, i32 1)
470 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
471 //
test_vldrhq_gather_offset_u32(const uint16_t * base,uint32x4_t offset)472 uint32x4_t test_vldrhq_gather_offset_u32(const uint16_t *base, uint32x4_t offset)
473 {
474 #ifdef POLYMORPHIC
475 return vldrhq_gather_offset(base, offset);
476 #else /* POLYMORPHIC */
477 return vldrhq_gather_offset_u32(base, offset);
478 #endif /* POLYMORPHIC */
479 }
480
481 // CHECK-LABEL: @test_vldrhq_gather_offset_z_f16(
482 // CHECK-NEXT: entry:
483 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
484 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
485 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vldr.gather.offset.predicated.v8f16.p0f16.v8i16.v8i1(half* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], i32 16, i32 0, i32 0, <8 x i1> [[TMP1]])
486 // CHECK-NEXT: ret <8 x half> [[TMP2]]
487 //
test_vldrhq_gather_offset_z_f16(const float16_t * base,uint16x8_t offset,mve_pred16_t p)488 float16x8_t test_vldrhq_gather_offset_z_f16(const float16_t *base, uint16x8_t offset, mve_pred16_t p)
489 {
490 #ifdef POLYMORPHIC
491 return vldrhq_gather_offset_z(base, offset, p);
492 #else /* POLYMORPHIC */
493 return vldrhq_gather_offset_z_f16(base, offset, p);
494 #endif /* POLYMORPHIC */
495 }
496
497 // CHECK-LABEL: @test_vldrhq_gather_offset_z_s16(
498 // CHECK-NEXT: entry:
499 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
500 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
501 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.vldr.gather.offset.predicated.v8i16.p0i16.v8i16.v8i1(i16* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], i32 16, i32 0, i32 0, <8 x i1> [[TMP1]])
502 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
503 //
test_vldrhq_gather_offset_z_s16(const int16_t * base,uint16x8_t offset,mve_pred16_t p)504 int16x8_t test_vldrhq_gather_offset_z_s16(const int16_t *base, uint16x8_t offset, mve_pred16_t p)
505 {
506 #ifdef POLYMORPHIC
507 return vldrhq_gather_offset_z(base, offset, p);
508 #else /* POLYMORPHIC */
509 return vldrhq_gather_offset_z_s16(base, offset, p);
510 #endif /* POLYMORPHIC */
511 }
512
513 // CHECK-LABEL: @test_vldrhq_gather_offset_z_s32(
514 // CHECK-NEXT: entry:
515 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
516 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
517 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.predicated.v4i32.p0i16.v4i32.v4i1(i16* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 16, i32 0, i32 0, <4 x i1> [[TMP1]])
518 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
519 //
test_vldrhq_gather_offset_z_s32(const int16_t * base,uint32x4_t offset,mve_pred16_t p)520 int32x4_t test_vldrhq_gather_offset_z_s32(const int16_t *base, uint32x4_t offset, mve_pred16_t p)
521 {
522 #ifdef POLYMORPHIC
523 return vldrhq_gather_offset_z(base, offset, p);
524 #else /* POLYMORPHIC */
525 return vldrhq_gather_offset_z_s32(base, offset, p);
526 #endif /* POLYMORPHIC */
527 }
528
529 // CHECK-LABEL: @test_vldrhq_gather_offset_z_u16(
530 // CHECK-NEXT: entry:
531 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
532 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
533 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.vldr.gather.offset.predicated.v8i16.p0i16.v8i16.v8i1(i16* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], i32 16, i32 0, i32 1, <8 x i1> [[TMP1]])
534 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
535 //
test_vldrhq_gather_offset_z_u16(const uint16_t * base,uint16x8_t offset,mve_pred16_t p)536 uint16x8_t test_vldrhq_gather_offset_z_u16(const uint16_t *base, uint16x8_t offset, mve_pred16_t p)
537 {
538 #ifdef POLYMORPHIC
539 return vldrhq_gather_offset_z(base, offset, p);
540 #else /* POLYMORPHIC */
541 return vldrhq_gather_offset_z_u16(base, offset, p);
542 #endif /* POLYMORPHIC */
543 }
544
545 // CHECK-LABEL: @test_vldrhq_gather_offset_z_u32(
546 // CHECK-NEXT: entry:
547 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
548 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
549 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.predicated.v4i32.p0i16.v4i32.v4i1(i16* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 16, i32 0, i32 1, <4 x i1> [[TMP1]])
550 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
551 //
test_vldrhq_gather_offset_z_u32(const uint16_t * base,uint32x4_t offset,mve_pred16_t p)552 uint32x4_t test_vldrhq_gather_offset_z_u32(const uint16_t *base, uint32x4_t offset, mve_pred16_t p)
553 {
554 #ifdef POLYMORPHIC
555 return vldrhq_gather_offset_z(base, offset, p);
556 #else /* POLYMORPHIC */
557 return vldrhq_gather_offset_z_u32(base, offset, p);
558 #endif /* POLYMORPHIC */
559 }
560
561 // CHECK-LABEL: @test_vldrhq_gather_shifted_offset_f16(
562 // CHECK-NEXT: entry:
563 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vldr.gather.offset.v8f16.p0f16.v8i16(half* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], i32 16, i32 1, i32 0)
564 // CHECK-NEXT: ret <8 x half> [[TMP0]]
565 //
test_vldrhq_gather_shifted_offset_f16(const float16_t * base,uint16x8_t offset)566 float16x8_t test_vldrhq_gather_shifted_offset_f16(const float16_t *base, uint16x8_t offset)
567 {
568 #ifdef POLYMORPHIC
569 return vldrhq_gather_shifted_offset(base, offset);
570 #else /* POLYMORPHIC */
571 return vldrhq_gather_shifted_offset_f16(base, offset);
572 #endif /* POLYMORPHIC */
573 }
574
575 // CHECK-LABEL: @test_vldrhq_gather_shifted_offset_s16(
576 // CHECK-NEXT: entry:
577 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x i16> @llvm.arm.mve.vldr.gather.offset.v8i16.p0i16.v8i16(i16* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], i32 16, i32 1, i32 0)
578 // CHECK-NEXT: ret <8 x i16> [[TMP0]]
579 //
test_vldrhq_gather_shifted_offset_s16(const int16_t * base,uint16x8_t offset)580 int16x8_t test_vldrhq_gather_shifted_offset_s16(const int16_t *base, uint16x8_t offset)
581 {
582 #ifdef POLYMORPHIC
583 return vldrhq_gather_shifted_offset(base, offset);
584 #else /* POLYMORPHIC */
585 return vldrhq_gather_shifted_offset_s16(base, offset);
586 #endif /* POLYMORPHIC */
587 }
588
589 // CHECK-LABEL: @test_vldrhq_gather_shifted_offset_s32(
590 // CHECK-NEXT: entry:
591 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.v4i32.p0i16.v4i32(i16* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 16, i32 1, i32 0)
592 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
593 //
test_vldrhq_gather_shifted_offset_s32(const int16_t * base,uint32x4_t offset)594 int32x4_t test_vldrhq_gather_shifted_offset_s32(const int16_t *base, uint32x4_t offset)
595 {
596 #ifdef POLYMORPHIC
597 return vldrhq_gather_shifted_offset(base, offset);
598 #else /* POLYMORPHIC */
599 return vldrhq_gather_shifted_offset_s32(base, offset);
600 #endif /* POLYMORPHIC */
601 }
602
603 // CHECK-LABEL: @test_vldrhq_gather_shifted_offset_u16(
604 // CHECK-NEXT: entry:
605 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x i16> @llvm.arm.mve.vldr.gather.offset.v8i16.p0i16.v8i16(i16* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], i32 16, i32 1, i32 1)
606 // CHECK-NEXT: ret <8 x i16> [[TMP0]]
607 //
test_vldrhq_gather_shifted_offset_u16(const uint16_t * base,uint16x8_t offset)608 uint16x8_t test_vldrhq_gather_shifted_offset_u16(const uint16_t *base, uint16x8_t offset)
609 {
610 #ifdef POLYMORPHIC
611 return vldrhq_gather_shifted_offset(base, offset);
612 #else /* POLYMORPHIC */
613 return vldrhq_gather_shifted_offset_u16(base, offset);
614 #endif /* POLYMORPHIC */
615 }
616
617 // CHECK-LABEL: @test_vldrhq_gather_shifted_offset_u32(
618 // CHECK-NEXT: entry:
619 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.v4i32.p0i16.v4i32(i16* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 16, i32 1, i32 1)
620 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
621 //
test_vldrhq_gather_shifted_offset_u32(const uint16_t * base,uint32x4_t offset)622 uint32x4_t test_vldrhq_gather_shifted_offset_u32(const uint16_t *base, uint32x4_t offset)
623 {
624 #ifdef POLYMORPHIC
625 return vldrhq_gather_shifted_offset(base, offset);
626 #else /* POLYMORPHIC */
627 return vldrhq_gather_shifted_offset_u32(base, offset);
628 #endif /* POLYMORPHIC */
629 }
630
631 // CHECK-LABEL: @test_vldrhq_gather_shifted_offset_z_f16(
632 // CHECK-NEXT: entry:
633 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
634 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
635 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vldr.gather.offset.predicated.v8f16.p0f16.v8i16.v8i1(half* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], i32 16, i32 1, i32 0, <8 x i1> [[TMP1]])
636 // CHECK-NEXT: ret <8 x half> [[TMP2]]
637 //
test_vldrhq_gather_shifted_offset_z_f16(const float16_t * base,uint16x8_t offset,mve_pred16_t p)638 float16x8_t test_vldrhq_gather_shifted_offset_z_f16(const float16_t *base, uint16x8_t offset, mve_pred16_t p)
639 {
640 #ifdef POLYMORPHIC
641 return vldrhq_gather_shifted_offset_z(base, offset, p);
642 #else /* POLYMORPHIC */
643 return vldrhq_gather_shifted_offset_z_f16(base, offset, p);
644 #endif /* POLYMORPHIC */
645 }
646
647 // CHECK-LABEL: @test_vldrhq_gather_shifted_offset_z_s16(
648 // CHECK-NEXT: entry:
649 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
650 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
651 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.vldr.gather.offset.predicated.v8i16.p0i16.v8i16.v8i1(i16* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], i32 16, i32 1, i32 0, <8 x i1> [[TMP1]])
652 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
653 //
test_vldrhq_gather_shifted_offset_z_s16(const int16_t * base,uint16x8_t offset,mve_pred16_t p)654 int16x8_t test_vldrhq_gather_shifted_offset_z_s16(const int16_t *base, uint16x8_t offset, mve_pred16_t p)
655 {
656 #ifdef POLYMORPHIC
657 return vldrhq_gather_shifted_offset_z(base, offset, p);
658 #else /* POLYMORPHIC */
659 return vldrhq_gather_shifted_offset_z_s16(base, offset, p);
660 #endif /* POLYMORPHIC */
661 }
662
663 // CHECK-LABEL: @test_vldrhq_gather_shifted_offset_z_s32(
664 // CHECK-NEXT: entry:
665 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
666 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
667 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.predicated.v4i32.p0i16.v4i32.v4i1(i16* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 16, i32 1, i32 0, <4 x i1> [[TMP1]])
668 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
669 //
test_vldrhq_gather_shifted_offset_z_s32(const int16_t * base,uint32x4_t offset,mve_pred16_t p)670 int32x4_t test_vldrhq_gather_shifted_offset_z_s32(const int16_t *base, uint32x4_t offset, mve_pred16_t p)
671 {
672 #ifdef POLYMORPHIC
673 return vldrhq_gather_shifted_offset_z(base, offset, p);
674 #else /* POLYMORPHIC */
675 return vldrhq_gather_shifted_offset_z_s32(base, offset, p);
676 #endif /* POLYMORPHIC */
677 }
678
679 // CHECK-LABEL: @test_vldrhq_gather_shifted_offset_z_u16(
680 // CHECK-NEXT: entry:
681 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
682 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
683 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.vldr.gather.offset.predicated.v8i16.p0i16.v8i16.v8i1(i16* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], i32 16, i32 1, i32 1, <8 x i1> [[TMP1]])
684 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
685 //
test_vldrhq_gather_shifted_offset_z_u16(const uint16_t * base,uint16x8_t offset,mve_pred16_t p)686 uint16x8_t test_vldrhq_gather_shifted_offset_z_u16(const uint16_t *base, uint16x8_t offset, mve_pred16_t p)
687 {
688 #ifdef POLYMORPHIC
689 return vldrhq_gather_shifted_offset_z(base, offset, p);
690 #else /* POLYMORPHIC */
691 return vldrhq_gather_shifted_offset_z_u16(base, offset, p);
692 #endif /* POLYMORPHIC */
693 }
694
695 // CHECK-LABEL: @test_vldrhq_gather_shifted_offset_z_u32(
696 // CHECK-NEXT: entry:
697 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
698 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
699 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.predicated.v4i32.p0i16.v4i32.v4i1(i16* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 16, i32 1, i32 1, <4 x i1> [[TMP1]])
700 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
701 //
test_vldrhq_gather_shifted_offset_z_u32(const uint16_t * base,uint32x4_t offset,mve_pred16_t p)702 uint32x4_t test_vldrhq_gather_shifted_offset_z_u32(const uint16_t *base, uint32x4_t offset, mve_pred16_t p)
703 {
704 #ifdef POLYMORPHIC
705 return vldrhq_gather_shifted_offset_z(base, offset, p);
706 #else /* POLYMORPHIC */
707 return vldrhq_gather_shifted_offset_z_u32(base, offset, p);
708 #endif /* POLYMORPHIC */
709 }
710
711 // CHECK-LABEL: @test_vldrwq_gather_base_f32(
712 // CHECK-NEXT: entry:
713 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vldr.gather.base.v4f32.v4i32(<4 x i32> [[ADDR:%.*]], i32 12)
714 // CHECK-NEXT: ret <4 x float> [[TMP0]]
715 //
test_vldrwq_gather_base_f32(uint32x4_t addr)716 float32x4_t test_vldrwq_gather_base_f32(uint32x4_t addr)
717 {
718 return vldrwq_gather_base_f32(addr, 0xc);
719 }
720
721 // CHECK-LABEL: @test_vldrwq_gather_base_s32(
722 // CHECK-NEXT: entry:
723 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.base.v4i32.v4i32(<4 x i32> [[ADDR:%.*]], i32 400)
724 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
725 //
test_vldrwq_gather_base_s32(uint32x4_t addr)726 int32x4_t test_vldrwq_gather_base_s32(uint32x4_t addr)
727 {
728 return vldrwq_gather_base_s32(addr, 0x190);
729 }
730
731 // CHECK-LABEL: @test_vldrwq_gather_base_u32(
732 // CHECK-NEXT: entry:
733 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.base.v4i32.v4i32(<4 x i32> [[ADDR:%.*]], i32 284)
734 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
735 //
test_vldrwq_gather_base_u32(uint32x4_t addr)736 uint32x4_t test_vldrwq_gather_base_u32(uint32x4_t addr)
737 {
738 return vldrwq_gather_base_u32(addr, 0x11c);
739 }
740
741 // CHECK-LABEL: @test_vldrwq_gather_base_wb_f32(
742 // CHECK-NEXT: entry:
743 // CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[ADDR:%.*]], align 8
744 // CHECK-NEXT: [[TMP1:%.*]] = call { <4 x float>, <4 x i32> } @llvm.arm.mve.vldr.gather.base.wb.v4f32.v4i32(<4 x i32> [[TMP0]], i32 -64)
745 // CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <4 x float>, <4 x i32> } [[TMP1]], 1
746 // CHECK-NEXT: store <4 x i32> [[TMP2]], <4 x i32>* [[ADDR]], align 8
747 // CHECK-NEXT: [[TMP3:%.*]] = extractvalue { <4 x float>, <4 x i32> } [[TMP1]], 0
748 // CHECK-NEXT: ret <4 x float> [[TMP3]]
749 //
test_vldrwq_gather_base_wb_f32(uint32x4_t * addr)750 float32x4_t test_vldrwq_gather_base_wb_f32(uint32x4_t *addr)
751 {
752 return vldrwq_gather_base_wb_f32(addr, -0x40);
753 }
754
755 // CHECK-LABEL: @test_vldrwq_gather_base_wb_s32(
756 // CHECK-NEXT: entry:
757 // CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[ADDR:%.*]], align 8
758 // CHECK-NEXT: [[TMP1:%.*]] = call { <4 x i32>, <4 x i32> } @llvm.arm.mve.vldr.gather.base.wb.v4i32.v4i32(<4 x i32> [[TMP0]], i32 80)
759 // CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[TMP1]], 1
760 // CHECK-NEXT: store <4 x i32> [[TMP2]], <4 x i32>* [[ADDR]], align 8
761 // CHECK-NEXT: [[TMP3:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[TMP1]], 0
762 // CHECK-NEXT: ret <4 x i32> [[TMP3]]
763 //
test_vldrwq_gather_base_wb_s32(uint32x4_t * addr)764 int32x4_t test_vldrwq_gather_base_wb_s32(uint32x4_t *addr)
765 {
766 return vldrwq_gather_base_wb_s32(addr, 0x50);
767 }
768
769 // CHECK-LABEL: @test_vldrwq_gather_base_wb_u32(
770 // CHECK-NEXT: entry:
771 // CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[ADDR:%.*]], align 8
772 // CHECK-NEXT: [[TMP1:%.*]] = call { <4 x i32>, <4 x i32> } @llvm.arm.mve.vldr.gather.base.wb.v4i32.v4i32(<4 x i32> [[TMP0]], i32 480)
773 // CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[TMP1]], 1
774 // CHECK-NEXT: store <4 x i32> [[TMP2]], <4 x i32>* [[ADDR]], align 8
775 // CHECK-NEXT: [[TMP3:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[TMP1]], 0
776 // CHECK-NEXT: ret <4 x i32> [[TMP3]]
777 //
test_vldrwq_gather_base_wb_u32(uint32x4_t * addr)778 uint32x4_t test_vldrwq_gather_base_wb_u32(uint32x4_t *addr)
779 {
780 return vldrwq_gather_base_wb_u32(addr, 0x1e0);
781 }
782
783 // CHECK-LABEL: @test_vldrwq_gather_base_wb_z_f32(
784 // CHECK-NEXT: entry:
785 // CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[ADDR:%.*]], align 8
786 // CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[P:%.*]] to i32
787 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP1]])
788 // CHECK-NEXT: [[TMP3:%.*]] = call { <4 x float>, <4 x i32> } @llvm.arm.mve.vldr.gather.base.wb.predicated.v4f32.v4i32.v4i1(<4 x i32> [[TMP0]], i32 -352, <4 x i1> [[TMP2]])
789 // CHECK-NEXT: [[TMP4:%.*]] = extractvalue { <4 x float>, <4 x i32> } [[TMP3]], 1
790 // CHECK-NEXT: store <4 x i32> [[TMP4]], <4 x i32>* [[ADDR]], align 8
791 // CHECK-NEXT: [[TMP5:%.*]] = extractvalue { <4 x float>, <4 x i32> } [[TMP3]], 0
792 // CHECK-NEXT: ret <4 x float> [[TMP5]]
793 //
test_vldrwq_gather_base_wb_z_f32(uint32x4_t * addr,mve_pred16_t p)794 float32x4_t test_vldrwq_gather_base_wb_z_f32(uint32x4_t *addr, mve_pred16_t p)
795 {
796 return vldrwq_gather_base_wb_z_f32(addr, -0x160, p);
797 }
798
799 // CHECK-LABEL: @test_vldrwq_gather_base_wb_z_s32(
800 // CHECK-NEXT: entry:
801 // CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[ADDR:%.*]], align 8
802 // CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[P:%.*]] to i32
803 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP1]])
804 // CHECK-NEXT: [[TMP3:%.*]] = call { <4 x i32>, <4 x i32> } @llvm.arm.mve.vldr.gather.base.wb.predicated.v4i32.v4i32.v4i1(<4 x i32> [[TMP0]], i32 276, <4 x i1> [[TMP2]])
805 // CHECK-NEXT: [[TMP4:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[TMP3]], 1
806 // CHECK-NEXT: store <4 x i32> [[TMP4]], <4 x i32>* [[ADDR]], align 8
807 // CHECK-NEXT: [[TMP5:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[TMP3]], 0
808 // CHECK-NEXT: ret <4 x i32> [[TMP5]]
809 //
test_vldrwq_gather_base_wb_z_s32(uint32x4_t * addr,mve_pred16_t p)810 int32x4_t test_vldrwq_gather_base_wb_z_s32(uint32x4_t *addr, mve_pred16_t p)
811 {
812 return vldrwq_gather_base_wb_z_s32(addr, 0x114, p);
813 }
814
815 // CHECK-LABEL: @test_vldrwq_gather_base_wb_z_u32(
816 // CHECK-NEXT: entry:
817 // CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[ADDR:%.*]], align 8
818 // CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[P:%.*]] to i32
819 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP1]])
820 // CHECK-NEXT: [[TMP3:%.*]] = call { <4 x i32>, <4 x i32> } @llvm.arm.mve.vldr.gather.base.wb.predicated.v4i32.v4i32.v4i1(<4 x i32> [[TMP0]], i32 88, <4 x i1> [[TMP2]])
821 // CHECK-NEXT: [[TMP4:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[TMP3]], 1
822 // CHECK-NEXT: store <4 x i32> [[TMP4]], <4 x i32>* [[ADDR]], align 8
823 // CHECK-NEXT: [[TMP5:%.*]] = extractvalue { <4 x i32>, <4 x i32> } [[TMP3]], 0
824 // CHECK-NEXT: ret <4 x i32> [[TMP5]]
825 //
test_vldrwq_gather_base_wb_z_u32(uint32x4_t * addr,mve_pred16_t p)826 uint32x4_t test_vldrwq_gather_base_wb_z_u32(uint32x4_t *addr, mve_pred16_t p)
827 {
828 return vldrwq_gather_base_wb_z_u32(addr, 0x58, p);
829 }
830
831 // CHECK-LABEL: @test_vldrwq_gather_base_z_f32(
832 // CHECK-NEXT: entry:
833 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
834 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
835 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vldr.gather.base.predicated.v4f32.v4i32.v4i1(<4 x i32> [[ADDR:%.*]], i32 300, <4 x i1> [[TMP1]])
836 // CHECK-NEXT: ret <4 x float> [[TMP2]]
837 //
test_vldrwq_gather_base_z_f32(uint32x4_t addr,mve_pred16_t p)838 float32x4_t test_vldrwq_gather_base_z_f32(uint32x4_t addr, mve_pred16_t p)
839 {
840 return vldrwq_gather_base_z_f32(addr, 0x12c, p);
841 }
842
843 // CHECK-LABEL: @test_vldrwq_gather_base_z_s32(
844 // CHECK-NEXT: entry:
845 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
846 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
847 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.base.predicated.v4i32.v4i32.v4i1(<4 x i32> [[ADDR:%.*]], i32 440, <4 x i1> [[TMP1]])
848 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
849 //
test_vldrwq_gather_base_z_s32(uint32x4_t addr,mve_pred16_t p)850 int32x4_t test_vldrwq_gather_base_z_s32(uint32x4_t addr, mve_pred16_t p)
851 {
852 return vldrwq_gather_base_z_s32(addr, 0x1b8, p);
853 }
854
855 // CHECK-LABEL: @test_vldrwq_gather_base_z_u32(
856 // CHECK-NEXT: entry:
857 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
858 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
859 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.base.predicated.v4i32.v4i32.v4i1(<4 x i32> [[ADDR:%.*]], i32 -300, <4 x i1> [[TMP1]])
860 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
861 //
test_vldrwq_gather_base_z_u32(uint32x4_t addr,mve_pred16_t p)862 uint32x4_t test_vldrwq_gather_base_z_u32(uint32x4_t addr, mve_pred16_t p)
863 {
864 return vldrwq_gather_base_z_u32(addr, -0x12c, p);
865 }
866
867 // CHECK-LABEL: @test_vldrwq_gather_offset_f32(
868 // CHECK-NEXT: entry:
869 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vldr.gather.offset.v4f32.p0f32.v4i32(float* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 32, i32 0, i32 0)
870 // CHECK-NEXT: ret <4 x float> [[TMP0]]
871 //
test_vldrwq_gather_offset_f32(const float32_t * base,uint32x4_t offset)872 float32x4_t test_vldrwq_gather_offset_f32(const float32_t *base, uint32x4_t offset)
873 {
874 #ifdef POLYMORPHIC
875 return vldrwq_gather_offset(base, offset);
876 #else /* POLYMORPHIC */
877 return vldrwq_gather_offset_f32(base, offset);
878 #endif /* POLYMORPHIC */
879 }
880
881 // CHECK-LABEL: @test_vldrwq_gather_offset_s32(
882 // CHECK-NEXT: entry:
883 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.v4i32.p0i32.v4i32(i32* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 32, i32 0, i32 0)
884 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
885 //
test_vldrwq_gather_offset_s32(const int32_t * base,uint32x4_t offset)886 int32x4_t test_vldrwq_gather_offset_s32(const int32_t *base, uint32x4_t offset)
887 {
888 #ifdef POLYMORPHIC
889 return vldrwq_gather_offset(base, offset);
890 #else /* POLYMORPHIC */
891 return vldrwq_gather_offset_s32(base, offset);
892 #endif /* POLYMORPHIC */
893 }
894
895 // CHECK-LABEL: @test_vldrwq_gather_offset_u32(
896 // CHECK-NEXT: entry:
897 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.v4i32.p0i32.v4i32(i32* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 32, i32 0, i32 1)
898 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
899 //
test_vldrwq_gather_offset_u32(const uint32_t * base,uint32x4_t offset)900 uint32x4_t test_vldrwq_gather_offset_u32(const uint32_t *base, uint32x4_t offset)
901 {
902 #ifdef POLYMORPHIC
903 return vldrwq_gather_offset(base, offset);
904 #else /* POLYMORPHIC */
905 return vldrwq_gather_offset_u32(base, offset);
906 #endif /* POLYMORPHIC */
907 }
908
909 // CHECK-LABEL: @test_vldrwq_gather_offset_z_f32(
910 // CHECK-NEXT: entry:
911 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
912 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
913 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vldr.gather.offset.predicated.v4f32.p0f32.v4i32.v4i1(float* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 32, i32 0, i32 0, <4 x i1> [[TMP1]])
914 // CHECK-NEXT: ret <4 x float> [[TMP2]]
915 //
test_vldrwq_gather_offset_z_f32(const float32_t * base,uint32x4_t offset,mve_pred16_t p)916 float32x4_t test_vldrwq_gather_offset_z_f32(const float32_t *base, uint32x4_t offset, mve_pred16_t p)
917 {
918 #ifdef POLYMORPHIC
919 return vldrwq_gather_offset_z(base, offset, p);
920 #else /* POLYMORPHIC */
921 return vldrwq_gather_offset_z_f32(base, offset, p);
922 #endif /* POLYMORPHIC */
923 }
924
925 // CHECK-LABEL: @test_vldrwq_gather_offset_z_s32(
926 // CHECK-NEXT: entry:
927 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
928 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
929 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.predicated.v4i32.p0i32.v4i32.v4i1(i32* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 32, i32 0, i32 0, <4 x i1> [[TMP1]])
930 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
931 //
test_vldrwq_gather_offset_z_s32(const int32_t * base,uint32x4_t offset,mve_pred16_t p)932 int32x4_t test_vldrwq_gather_offset_z_s32(const int32_t *base, uint32x4_t offset, mve_pred16_t p)
933 {
934 #ifdef POLYMORPHIC
935 return vldrwq_gather_offset_z(base, offset, p);
936 #else /* POLYMORPHIC */
937 return vldrwq_gather_offset_z_s32(base, offset, p);
938 #endif /* POLYMORPHIC */
939 }
940
941 // CHECK-LABEL: @test_vldrwq_gather_offset_z_u32(
942 // CHECK-NEXT: entry:
943 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
944 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
945 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.predicated.v4i32.p0i32.v4i32.v4i1(i32* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 32, i32 0, i32 1, <4 x i1> [[TMP1]])
946 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
947 //
test_vldrwq_gather_offset_z_u32(const uint32_t * base,uint32x4_t offset,mve_pred16_t p)948 uint32x4_t test_vldrwq_gather_offset_z_u32(const uint32_t *base, uint32x4_t offset, mve_pred16_t p)
949 {
950 #ifdef POLYMORPHIC
951 return vldrwq_gather_offset_z(base, offset, p);
952 #else /* POLYMORPHIC */
953 return vldrwq_gather_offset_z_u32(base, offset, p);
954 #endif /* POLYMORPHIC */
955 }
956
957 // CHECK-LABEL: @test_vldrwq_gather_shifted_offset_f32(
958 // CHECK-NEXT: entry:
959 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vldr.gather.offset.v4f32.p0f32.v4i32(float* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 32, i32 2, i32 0)
960 // CHECK-NEXT: ret <4 x float> [[TMP0]]
961 //
test_vldrwq_gather_shifted_offset_f32(const float32_t * base,uint32x4_t offset)962 float32x4_t test_vldrwq_gather_shifted_offset_f32(const float32_t *base, uint32x4_t offset)
963 {
964 #ifdef POLYMORPHIC
965 return vldrwq_gather_shifted_offset(base, offset);
966 #else /* POLYMORPHIC */
967 return vldrwq_gather_shifted_offset_f32(base, offset);
968 #endif /* POLYMORPHIC */
969 }
970
971 // CHECK-LABEL: @test_vldrwq_gather_shifted_offset_s32(
972 // CHECK-NEXT: entry:
973 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.v4i32.p0i32.v4i32(i32* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 32, i32 2, i32 0)
974 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
975 //
test_vldrwq_gather_shifted_offset_s32(const int32_t * base,uint32x4_t offset)976 int32x4_t test_vldrwq_gather_shifted_offset_s32(const int32_t *base, uint32x4_t offset)
977 {
978 #ifdef POLYMORPHIC
979 return vldrwq_gather_shifted_offset(base, offset);
980 #else /* POLYMORPHIC */
981 return vldrwq_gather_shifted_offset_s32(base, offset);
982 #endif /* POLYMORPHIC */
983 }
984
985 // CHECK-LABEL: @test_vldrwq_gather_shifted_offset_u32(
986 // CHECK-NEXT: entry:
987 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.v4i32.p0i32.v4i32(i32* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 32, i32 2, i32 1)
988 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
989 //
test_vldrwq_gather_shifted_offset_u32(const uint32_t * base,uint32x4_t offset)990 uint32x4_t test_vldrwq_gather_shifted_offset_u32(const uint32_t *base, uint32x4_t offset)
991 {
992 #ifdef POLYMORPHIC
993 return vldrwq_gather_shifted_offset(base, offset);
994 #else /* POLYMORPHIC */
995 return vldrwq_gather_shifted_offset_u32(base, offset);
996 #endif /* POLYMORPHIC */
997 }
998
999 // CHECK-LABEL: @test_vldrwq_gather_shifted_offset_z_f32(
1000 // CHECK-NEXT: entry:
1001 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1002 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1003 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vldr.gather.offset.predicated.v4f32.p0f32.v4i32.v4i1(float* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 32, i32 2, i32 0, <4 x i1> [[TMP1]])
1004 // CHECK-NEXT: ret <4 x float> [[TMP2]]
1005 //
test_vldrwq_gather_shifted_offset_z_f32(const float32_t * base,uint32x4_t offset,mve_pred16_t p)1006 float32x4_t test_vldrwq_gather_shifted_offset_z_f32(const float32_t *base, uint32x4_t offset, mve_pred16_t p)
1007 {
1008 #ifdef POLYMORPHIC
1009 return vldrwq_gather_shifted_offset_z(base, offset, p);
1010 #else /* POLYMORPHIC */
1011 return vldrwq_gather_shifted_offset_z_f32(base, offset, p);
1012 #endif /* POLYMORPHIC */
1013 }
1014
1015 // CHECK-LABEL: @test_vldrwq_gather_shifted_offset_z_s32(
1016 // CHECK-NEXT: entry:
1017 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1018 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1019 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.predicated.v4i32.p0i32.v4i32.v4i1(i32* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 32, i32 2, i32 0, <4 x i1> [[TMP1]])
1020 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
1021 //
test_vldrwq_gather_shifted_offset_z_s32(const int32_t * base,uint32x4_t offset,mve_pred16_t p)1022 int32x4_t test_vldrwq_gather_shifted_offset_z_s32(const int32_t *base, uint32x4_t offset, mve_pred16_t p)
1023 {
1024 #ifdef POLYMORPHIC
1025 return vldrwq_gather_shifted_offset_z(base, offset, p);
1026 #else /* POLYMORPHIC */
1027 return vldrwq_gather_shifted_offset_z_s32(base, offset, p);
1028 #endif /* POLYMORPHIC */
1029 }
1030
1031 // CHECK-LABEL: @test_vldrwq_gather_shifted_offset_z_u32(
1032 // CHECK-NEXT: entry:
1033 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1034 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1035 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vldr.gather.offset.predicated.v4i32.p0i32.v4i32.v4i1(i32* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], i32 32, i32 2, i32 1, <4 x i1> [[TMP1]])
1036 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
1037 //
test_vldrwq_gather_shifted_offset_z_u32(const uint32_t * base,uint32x4_t offset,mve_pred16_t p)1038 uint32x4_t test_vldrwq_gather_shifted_offset_z_u32(const uint32_t *base, uint32x4_t offset, mve_pred16_t p)
1039 {
1040 #ifdef POLYMORPHIC
1041 return vldrwq_gather_shifted_offset_z(base, offset, p);
1042 #else /* POLYMORPHIC */
1043 return vldrwq_gather_shifted_offset_z_u32(base, offset, p);
1044 #endif /* POLYMORPHIC */
1045 }
1046
1047 // CHECK-LABEL: @test_vstrbq_scatter_offset_p_s16(
1048 // CHECK-NEXT: entry:
1049 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1050 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
1051 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i8.v8i16.v8i16.v8i1(i8* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], <8 x i16> [[VALUE:%.*]], i32 8, i32 0, <8 x i1> [[TMP1]])
1052 // CHECK-NEXT: ret void
1053 //
test_vstrbq_scatter_offset_p_s16(int8_t * base,uint16x8_t offset,int16x8_t value,mve_pred16_t p)1054 void test_vstrbq_scatter_offset_p_s16(int8_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
1055 {
1056 #ifdef POLYMORPHIC
1057 vstrbq_scatter_offset_p(base, offset, value, p);
1058 #else /* POLYMORPHIC */
1059 vstrbq_scatter_offset_p_s16(base, offset, value, p);
1060 #endif /* POLYMORPHIC */
1061 }
1062
1063 // CHECK-LABEL: @test_vstrbq_scatter_offset_p_s32(
1064 // CHECK-NEXT: entry:
1065 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1066 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1067 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i8.v4i32.v4i32.v4i1(i8* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 8, i32 0, <4 x i1> [[TMP1]])
1068 // CHECK-NEXT: ret void
1069 //
test_vstrbq_scatter_offset_p_s32(int8_t * base,uint32x4_t offset,int32x4_t value,mve_pred16_t p)1070 void test_vstrbq_scatter_offset_p_s32(int8_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
1071 {
1072 #ifdef POLYMORPHIC
1073 vstrbq_scatter_offset_p(base, offset, value, p);
1074 #else /* POLYMORPHIC */
1075 vstrbq_scatter_offset_p_s32(base, offset, value, p);
1076 #endif /* POLYMORPHIC */
1077 }
1078
1079 // CHECK-LABEL: @test_vstrbq_scatter_offset_p_s8(
1080 // CHECK-NEXT: entry:
1081 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1082 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
1083 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i8.v16i8.v16i8.v16i1(i8* [[BASE:%.*]], <16 x i8> [[OFFSET:%.*]], <16 x i8> [[VALUE:%.*]], i32 8, i32 0, <16 x i1> [[TMP1]])
1084 // CHECK-NEXT: ret void
1085 //
test_vstrbq_scatter_offset_p_s8(int8_t * base,uint8x16_t offset,int8x16_t value,mve_pred16_t p)1086 void test_vstrbq_scatter_offset_p_s8(int8_t *base, uint8x16_t offset, int8x16_t value, mve_pred16_t p)
1087 {
1088 #ifdef POLYMORPHIC
1089 vstrbq_scatter_offset_p(base, offset, value, p);
1090 #else /* POLYMORPHIC */
1091 vstrbq_scatter_offset_p_s8(base, offset, value, p);
1092 #endif /* POLYMORPHIC */
1093 }
1094
1095 // CHECK-LABEL: @test_vstrbq_scatter_offset_p_u16(
1096 // CHECK-NEXT: entry:
1097 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1098 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
1099 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i8.v8i16.v8i16.v8i1(i8* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], <8 x i16> [[VALUE:%.*]], i32 8, i32 0, <8 x i1> [[TMP1]])
1100 // CHECK-NEXT: ret void
1101 //
test_vstrbq_scatter_offset_p_u16(uint8_t * base,uint16x8_t offset,uint16x8_t value,mve_pred16_t p)1102 void test_vstrbq_scatter_offset_p_u16(uint8_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
1103 {
1104 #ifdef POLYMORPHIC
1105 vstrbq_scatter_offset_p(base, offset, value, p);
1106 #else /* POLYMORPHIC */
1107 vstrbq_scatter_offset_p_u16(base, offset, value, p);
1108 #endif /* POLYMORPHIC */
1109 }
1110
1111 // CHECK-LABEL: @test_vstrbq_scatter_offset_p_u32(
1112 // CHECK-NEXT: entry:
1113 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1114 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1115 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i8.v4i32.v4i32.v4i1(i8* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 8, i32 0, <4 x i1> [[TMP1]])
1116 // CHECK-NEXT: ret void
1117 //
test_vstrbq_scatter_offset_p_u32(uint8_t * base,uint32x4_t offset,uint32x4_t value,mve_pred16_t p)1118 void test_vstrbq_scatter_offset_p_u32(uint8_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
1119 {
1120 #ifdef POLYMORPHIC
1121 vstrbq_scatter_offset_p(base, offset, value, p);
1122 #else /* POLYMORPHIC */
1123 vstrbq_scatter_offset_p_u32(base, offset, value, p);
1124 #endif /* POLYMORPHIC */
1125 }
1126
1127 // CHECK-LABEL: @test_vstrbq_scatter_offset_p_u8(
1128 // CHECK-NEXT: entry:
1129 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1130 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
1131 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i8.v16i8.v16i8.v16i1(i8* [[BASE:%.*]], <16 x i8> [[OFFSET:%.*]], <16 x i8> [[VALUE:%.*]], i32 8, i32 0, <16 x i1> [[TMP1]])
1132 // CHECK-NEXT: ret void
1133 //
test_vstrbq_scatter_offset_p_u8(uint8_t * base,uint8x16_t offset,uint8x16_t value,mve_pred16_t p)1134 void test_vstrbq_scatter_offset_p_u8(uint8_t *base, uint8x16_t offset, uint8x16_t value, mve_pred16_t p)
1135 {
1136 #ifdef POLYMORPHIC
1137 vstrbq_scatter_offset_p(base, offset, value, p);
1138 #else /* POLYMORPHIC */
1139 vstrbq_scatter_offset_p_u8(base, offset, value, p);
1140 #endif /* POLYMORPHIC */
1141 }
1142
1143 // CHECK-LABEL: @test_vstrbq_scatter_offset_s16(
1144 // CHECK-NEXT: entry:
1145 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i8.v8i16.v8i16(i8* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], <8 x i16> [[VALUE:%.*]], i32 8, i32 0)
1146 // CHECK-NEXT: ret void
1147 //
test_vstrbq_scatter_offset_s16(int8_t * base,uint16x8_t offset,int16x8_t value)1148 void test_vstrbq_scatter_offset_s16(int8_t *base, uint16x8_t offset, int16x8_t value)
1149 {
1150 #ifdef POLYMORPHIC
1151 vstrbq_scatter_offset(base, offset, value);
1152 #else /* POLYMORPHIC */
1153 vstrbq_scatter_offset_s16(base, offset, value);
1154 #endif /* POLYMORPHIC */
1155 }
1156
1157 // CHECK-LABEL: @test_vstrbq_scatter_offset_s32(
1158 // CHECK-NEXT: entry:
1159 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i8.v4i32.v4i32(i8* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 8, i32 0)
1160 // CHECK-NEXT: ret void
1161 //
test_vstrbq_scatter_offset_s32(int8_t * base,uint32x4_t offset,int32x4_t value)1162 void test_vstrbq_scatter_offset_s32(int8_t *base, uint32x4_t offset, int32x4_t value)
1163 {
1164 #ifdef POLYMORPHIC
1165 vstrbq_scatter_offset(base, offset, value);
1166 #else /* POLYMORPHIC */
1167 vstrbq_scatter_offset_s32(base, offset, value);
1168 #endif /* POLYMORPHIC */
1169 }
1170
1171 // CHECK-LABEL: @test_vstrbq_scatter_offset_s8(
1172 // CHECK-NEXT: entry:
1173 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i8.v16i8.v16i8(i8* [[BASE:%.*]], <16 x i8> [[OFFSET:%.*]], <16 x i8> [[VALUE:%.*]], i32 8, i32 0)
1174 // CHECK-NEXT: ret void
1175 //
test_vstrbq_scatter_offset_s8(int8_t * base,uint8x16_t offset,int8x16_t value)1176 void test_vstrbq_scatter_offset_s8(int8_t *base, uint8x16_t offset, int8x16_t value)
1177 {
1178 #ifdef POLYMORPHIC
1179 vstrbq_scatter_offset(base, offset, value);
1180 #else /* POLYMORPHIC */
1181 vstrbq_scatter_offset_s8(base, offset, value);
1182 #endif /* POLYMORPHIC */
1183 }
1184
1185 // CHECK-LABEL: @test_vstrbq_scatter_offset_u16(
1186 // CHECK-NEXT: entry:
1187 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i8.v8i16.v8i16(i8* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], <8 x i16> [[VALUE:%.*]], i32 8, i32 0)
1188 // CHECK-NEXT: ret void
1189 //
test_vstrbq_scatter_offset_u16(uint8_t * base,uint16x8_t offset,uint16x8_t value)1190 void test_vstrbq_scatter_offset_u16(uint8_t *base, uint16x8_t offset, uint16x8_t value)
1191 {
1192 #ifdef POLYMORPHIC
1193 vstrbq_scatter_offset(base, offset, value);
1194 #else /* POLYMORPHIC */
1195 vstrbq_scatter_offset_u16(base, offset, value);
1196 #endif /* POLYMORPHIC */
1197 }
1198
1199 // CHECK-LABEL: @test_vstrbq_scatter_offset_u32(
1200 // CHECK-NEXT: entry:
1201 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i8.v4i32.v4i32(i8* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 8, i32 0)
1202 // CHECK-NEXT: ret void
1203 //
test_vstrbq_scatter_offset_u32(uint8_t * base,uint32x4_t offset,uint32x4_t value)1204 void test_vstrbq_scatter_offset_u32(uint8_t *base, uint32x4_t offset, uint32x4_t value)
1205 {
1206 #ifdef POLYMORPHIC
1207 vstrbq_scatter_offset(base, offset, value);
1208 #else /* POLYMORPHIC */
1209 vstrbq_scatter_offset_u32(base, offset, value);
1210 #endif /* POLYMORPHIC */
1211 }
1212
1213 // CHECK-LABEL: @test_vstrbq_scatter_offset_u8(
1214 // CHECK-NEXT: entry:
1215 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i8.v16i8.v16i8(i8* [[BASE:%.*]], <16 x i8> [[OFFSET:%.*]], <16 x i8> [[VALUE:%.*]], i32 8, i32 0)
1216 // CHECK-NEXT: ret void
1217 //
test_vstrbq_scatter_offset_u8(uint8_t * base,uint8x16_t offset,uint8x16_t value)1218 void test_vstrbq_scatter_offset_u8(uint8_t *base, uint8x16_t offset, uint8x16_t value)
1219 {
1220 #ifdef POLYMORPHIC
1221 vstrbq_scatter_offset(base, offset, value);
1222 #else /* POLYMORPHIC */
1223 vstrbq_scatter_offset_u8(base, offset, value);
1224 #endif /* POLYMORPHIC */
1225 }
1226
1227 // CHECK-LABEL: @test_vstrdq_scatter_base_p_s64(
1228 // CHECK-NEXT: entry:
1229 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1230 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1231 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.base.predicated.v2i64.v2i64.v4i1(<2 x i64> [[ADDR:%.*]], i32 888, <2 x i64> [[VALUE:%.*]], <4 x i1> [[TMP1]])
1232 // CHECK-NEXT: ret void
1233 //
test_vstrdq_scatter_base_p_s64(uint64x2_t addr,int64x2_t value,mve_pred16_t p)1234 void test_vstrdq_scatter_base_p_s64(uint64x2_t addr, int64x2_t value, mve_pred16_t p)
1235 {
1236 #ifdef POLYMORPHIC
1237 vstrdq_scatter_base_p(addr, 0x378, value, p);
1238 #else /* POLYMORPHIC */
1239 vstrdq_scatter_base_p_s64(addr, 0x378, value, p);
1240 #endif /* POLYMORPHIC */
1241 }
1242
1243 // CHECK-LABEL: @test_vstrdq_scatter_base_p_u64(
1244 // CHECK-NEXT: entry:
1245 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1246 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1247 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.base.predicated.v2i64.v2i64.v4i1(<2 x i64> [[ADDR:%.*]], i32 264, <2 x i64> [[VALUE:%.*]], <4 x i1> [[TMP1]])
1248 // CHECK-NEXT: ret void
1249 //
test_vstrdq_scatter_base_p_u64(uint64x2_t addr,uint64x2_t value,mve_pred16_t p)1250 void test_vstrdq_scatter_base_p_u64(uint64x2_t addr, uint64x2_t value, mve_pred16_t p)
1251 {
1252 #ifdef POLYMORPHIC
1253 vstrdq_scatter_base_p(addr, 0x108, value, p);
1254 #else /* POLYMORPHIC */
1255 vstrdq_scatter_base_p_u64(addr, 0x108, value, p);
1256 #endif /* POLYMORPHIC */
1257 }
1258
1259 // CHECK-LABEL: @test_vstrdq_scatter_base_s64(
1260 // CHECK-NEXT: entry:
1261 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.base.v2i64.v2i64(<2 x i64> [[ADDR:%.*]], i32 408, <2 x i64> [[VALUE:%.*]])
1262 // CHECK-NEXT: ret void
1263 //
test_vstrdq_scatter_base_s64(uint64x2_t addr,int64x2_t value)1264 void test_vstrdq_scatter_base_s64(uint64x2_t addr, int64x2_t value)
1265 {
1266 #ifdef POLYMORPHIC
1267 vstrdq_scatter_base(addr, 0x198, value);
1268 #else /* POLYMORPHIC */
1269 vstrdq_scatter_base_s64(addr, 0x198, value);
1270 #endif /* POLYMORPHIC */
1271 }
1272
1273 // CHECK-LABEL: @test_vstrdq_scatter_base_u64(
1274 // CHECK-NEXT: entry:
1275 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.base.v2i64.v2i64(<2 x i64> [[ADDR:%.*]], i32 -472, <2 x i64> [[VALUE:%.*]])
1276 // CHECK-NEXT: ret void
1277 //
test_vstrdq_scatter_base_u64(uint64x2_t addr,uint64x2_t value)1278 void test_vstrdq_scatter_base_u64(uint64x2_t addr, uint64x2_t value)
1279 {
1280 #ifdef POLYMORPHIC
1281 vstrdq_scatter_base(addr, -0x1d8, value);
1282 #else /* POLYMORPHIC */
1283 vstrdq_scatter_base_u64(addr, -0x1d8, value);
1284 #endif /* POLYMORPHIC */
1285 }
1286
1287 // CHECK-LABEL: @test_vstrdq_scatter_base_wb_p_s64(
1288 // CHECK-NEXT: entry:
1289 // CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* [[ADDR:%.*]], align 8
1290 // CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[P:%.*]] to i32
1291 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP1]])
1292 // CHECK-NEXT: [[TMP3:%.*]] = call <2 x i64> @llvm.arm.mve.vstr.scatter.base.wb.predicated.v2i64.v2i64.v4i1(<2 x i64> [[TMP0]], i32 248, <2 x i64> [[VALUE:%.*]], <4 x i1> [[TMP2]])
1293 // CHECK-NEXT: store <2 x i64> [[TMP3]], <2 x i64>* [[ADDR]], align 8
1294 // CHECK-NEXT: ret void
1295 //
test_vstrdq_scatter_base_wb_p_s64(uint64x2_t * addr,int64x2_t value,mve_pred16_t p)1296 void test_vstrdq_scatter_base_wb_p_s64(uint64x2_t *addr, int64x2_t value, mve_pred16_t p)
1297 {
1298 #ifdef POLYMORPHIC
1299 vstrdq_scatter_base_wb_p(addr, 0xf8, value, p);
1300 #else /* POLYMORPHIC */
1301 vstrdq_scatter_base_wb_p_s64(addr, 0xf8, value, p);
1302 #endif /* POLYMORPHIC */
1303 }
1304
1305 // CHECK-LABEL: @test_vstrdq_scatter_base_wb_p_u64(
1306 // CHECK-NEXT: entry:
1307 // CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* [[ADDR:%.*]], align 8
1308 // CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[P:%.*]] to i32
1309 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP1]])
1310 // CHECK-NEXT: [[TMP3:%.*]] = call <2 x i64> @llvm.arm.mve.vstr.scatter.base.wb.predicated.v2i64.v2i64.v4i1(<2 x i64> [[TMP0]], i32 136, <2 x i64> [[VALUE:%.*]], <4 x i1> [[TMP2]])
1311 // CHECK-NEXT: store <2 x i64> [[TMP3]], <2 x i64>* [[ADDR]], align 8
1312 // CHECK-NEXT: ret void
1313 //
test_vstrdq_scatter_base_wb_p_u64(uint64x2_t * addr,uint64x2_t value,mve_pred16_t p)1314 void test_vstrdq_scatter_base_wb_p_u64(uint64x2_t *addr, uint64x2_t value, mve_pred16_t p)
1315 {
1316 #ifdef POLYMORPHIC
1317 vstrdq_scatter_base_wb_p(addr, 0x88, value, p);
1318 #else /* POLYMORPHIC */
1319 vstrdq_scatter_base_wb_p_u64(addr, 0x88, value, p);
1320 #endif /* POLYMORPHIC */
1321 }
1322
1323 // CHECK-LABEL: @test_vstrdq_scatter_base_wb_s64(
1324 // CHECK-NEXT: entry:
1325 // CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* [[ADDR:%.*]], align 8
1326 // CHECK-NEXT: [[TMP1:%.*]] = call <2 x i64> @llvm.arm.mve.vstr.scatter.base.wb.v2i64.v2i64(<2 x i64> [[TMP0]], i32 208, <2 x i64> [[VALUE:%.*]])
1327 // CHECK-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* [[ADDR]], align 8
1328 // CHECK-NEXT: ret void
1329 //
test_vstrdq_scatter_base_wb_s64(uint64x2_t * addr,int64x2_t value)1330 void test_vstrdq_scatter_base_wb_s64(uint64x2_t *addr, int64x2_t value)
1331 {
1332 #ifdef POLYMORPHIC
1333 vstrdq_scatter_base_wb(addr, 0xd0, value);
1334 #else /* POLYMORPHIC */
1335 vstrdq_scatter_base_wb_s64(addr, 0xd0, value);
1336 #endif /* POLYMORPHIC */
1337 }
1338
1339 // CHECK-LABEL: @test_vstrdq_scatter_base_wb_u64(
1340 // CHECK-NEXT: entry:
1341 // CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* [[ADDR:%.*]], align 8
1342 // CHECK-NEXT: [[TMP1:%.*]] = call <2 x i64> @llvm.arm.mve.vstr.scatter.base.wb.v2i64.v2i64(<2 x i64> [[TMP0]], i32 -168, <2 x i64> [[VALUE:%.*]])
1343 // CHECK-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* [[ADDR]], align 8
1344 // CHECK-NEXT: ret void
1345 //
test_vstrdq_scatter_base_wb_u64(uint64x2_t * addr,uint64x2_t value)1346 void test_vstrdq_scatter_base_wb_u64(uint64x2_t *addr, uint64x2_t value)
1347 {
1348 #ifdef POLYMORPHIC
1349 vstrdq_scatter_base_wb(addr, -0xa8, value);
1350 #else /* POLYMORPHIC */
1351 vstrdq_scatter_base_wb_u64(addr, -0xa8, value);
1352 #endif /* POLYMORPHIC */
1353 }
1354
1355 // CHECK-LABEL: @test_vstrdq_scatter_offset_p_s64(
1356 // CHECK-NEXT: entry:
1357 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1358 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1359 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i64.v2i64.v2i64.v4i1(i64* [[BASE:%.*]], <2 x i64> [[OFFSET:%.*]], <2 x i64> [[VALUE:%.*]], i32 64, i32 0, <4 x i1> [[TMP1]])
1360 // CHECK-NEXT: ret void
1361 //
test_vstrdq_scatter_offset_p_s64(int64_t * base,uint64x2_t offset,int64x2_t value,mve_pred16_t p)1362 void test_vstrdq_scatter_offset_p_s64(int64_t *base, uint64x2_t offset, int64x2_t value, mve_pred16_t p)
1363 {
1364 #ifdef POLYMORPHIC
1365 vstrdq_scatter_offset_p(base, offset, value, p);
1366 #else /* POLYMORPHIC */
1367 vstrdq_scatter_offset_p_s64(base, offset, value, p);
1368 #endif /* POLYMORPHIC */
1369 }
1370
1371 // CHECK-LABEL: @test_vstrdq_scatter_offset_p_u64(
1372 // CHECK-NEXT: entry:
1373 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1374 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1375 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i64.v2i64.v2i64.v4i1(i64* [[BASE:%.*]], <2 x i64> [[OFFSET:%.*]], <2 x i64> [[VALUE:%.*]], i32 64, i32 0, <4 x i1> [[TMP1]])
1376 // CHECK-NEXT: ret void
1377 //
test_vstrdq_scatter_offset_p_u64(uint64_t * base,uint64x2_t offset,uint64x2_t value,mve_pred16_t p)1378 void test_vstrdq_scatter_offset_p_u64(uint64_t *base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p)
1379 {
1380 #ifdef POLYMORPHIC
1381 vstrdq_scatter_offset_p(base, offset, value, p);
1382 #else /* POLYMORPHIC */
1383 vstrdq_scatter_offset_p_u64(base, offset, value, p);
1384 #endif /* POLYMORPHIC */
1385 }
1386
1387 // CHECK-LABEL: @test_vstrdq_scatter_offset_s64(
1388 // CHECK-NEXT: entry:
1389 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i64.v2i64.v2i64(i64* [[BASE:%.*]], <2 x i64> [[OFFSET:%.*]], <2 x i64> [[VALUE:%.*]], i32 64, i32 0)
1390 // CHECK-NEXT: ret void
1391 //
test_vstrdq_scatter_offset_s64(int64_t * base,uint64x2_t offset,int64x2_t value)1392 void test_vstrdq_scatter_offset_s64(int64_t *base, uint64x2_t offset, int64x2_t value)
1393 {
1394 #ifdef POLYMORPHIC
1395 vstrdq_scatter_offset(base, offset, value);
1396 #else /* POLYMORPHIC */
1397 vstrdq_scatter_offset_s64(base, offset, value);
1398 #endif /* POLYMORPHIC */
1399 }
1400
1401 // CHECK-LABEL: @test_vstrdq_scatter_offset_u64(
1402 // CHECK-NEXT: entry:
1403 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i64.v2i64.v2i64(i64* [[BASE:%.*]], <2 x i64> [[OFFSET:%.*]], <2 x i64> [[VALUE:%.*]], i32 64, i32 0)
1404 // CHECK-NEXT: ret void
1405 //
test_vstrdq_scatter_offset_u64(uint64_t * base,uint64x2_t offset,uint64x2_t value)1406 void test_vstrdq_scatter_offset_u64(uint64_t *base, uint64x2_t offset, uint64x2_t value)
1407 {
1408 #ifdef POLYMORPHIC
1409 vstrdq_scatter_offset(base, offset, value);
1410 #else /* POLYMORPHIC */
1411 vstrdq_scatter_offset_u64(base, offset, value);
1412 #endif /* POLYMORPHIC */
1413 }
1414
1415 // CHECK-LABEL: @test_vstrdq_scatter_shifted_offset_p_s64(
1416 // CHECK-NEXT: entry:
1417 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1418 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1419 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i64.v2i64.v2i64.v4i1(i64* [[BASE:%.*]], <2 x i64> [[OFFSET:%.*]], <2 x i64> [[VALUE:%.*]], i32 64, i32 3, <4 x i1> [[TMP1]])
1420 // CHECK-NEXT: ret void
1421 //
test_vstrdq_scatter_shifted_offset_p_s64(int64_t * base,uint64x2_t offset,int64x2_t value,mve_pred16_t p)1422 void test_vstrdq_scatter_shifted_offset_p_s64(int64_t *base, uint64x2_t offset, int64x2_t value, mve_pred16_t p)
1423 {
1424 #ifdef POLYMORPHIC
1425 vstrdq_scatter_shifted_offset_p(base, offset, value, p);
1426 #else /* POLYMORPHIC */
1427 vstrdq_scatter_shifted_offset_p_s64(base, offset, value, p);
1428 #endif /* POLYMORPHIC */
1429 }
1430
1431 // CHECK-LABEL: @test_vstrdq_scatter_shifted_offset_p_u64(
1432 // CHECK-NEXT: entry:
1433 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1434 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1435 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i64.v2i64.v2i64.v4i1(i64* [[BASE:%.*]], <2 x i64> [[OFFSET:%.*]], <2 x i64> [[VALUE:%.*]], i32 64, i32 3, <4 x i1> [[TMP1]])
1436 // CHECK-NEXT: ret void
1437 //
test_vstrdq_scatter_shifted_offset_p_u64(uint64_t * base,uint64x2_t offset,uint64x2_t value,mve_pred16_t p)1438 void test_vstrdq_scatter_shifted_offset_p_u64(uint64_t *base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p)
1439 {
1440 #ifdef POLYMORPHIC
1441 vstrdq_scatter_shifted_offset_p(base, offset, value, p);
1442 #else /* POLYMORPHIC */
1443 vstrdq_scatter_shifted_offset_p_u64(base, offset, value, p);
1444 #endif /* POLYMORPHIC */
1445 }
1446
1447 // CHECK-LABEL: @test_vstrdq_scatter_shifted_offset_s64(
1448 // CHECK-NEXT: entry:
1449 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i64.v2i64.v2i64(i64* [[BASE:%.*]], <2 x i64> [[OFFSET:%.*]], <2 x i64> [[VALUE:%.*]], i32 64, i32 3)
1450 // CHECK-NEXT: ret void
1451 //
test_vstrdq_scatter_shifted_offset_s64(int64_t * base,uint64x2_t offset,int64x2_t value)1452 void test_vstrdq_scatter_shifted_offset_s64(int64_t *base, uint64x2_t offset, int64x2_t value)
1453 {
1454 #ifdef POLYMORPHIC
1455 vstrdq_scatter_shifted_offset(base, offset, value);
1456 #else /* POLYMORPHIC */
1457 vstrdq_scatter_shifted_offset_s64(base, offset, value);
1458 #endif /* POLYMORPHIC */
1459 }
1460
1461 // CHECK-LABEL: @test_vstrdq_scatter_shifted_offset_u64(
1462 // CHECK-NEXT: entry:
1463 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i64.v2i64.v2i64(i64* [[BASE:%.*]], <2 x i64> [[OFFSET:%.*]], <2 x i64> [[VALUE:%.*]], i32 64, i32 3)
1464 // CHECK-NEXT: ret void
1465 //
test_vstrdq_scatter_shifted_offset_u64(uint64_t * base,uint64x2_t offset,uint64x2_t value)1466 void test_vstrdq_scatter_shifted_offset_u64(uint64_t *base, uint64x2_t offset, uint64x2_t value)
1467 {
1468 #ifdef POLYMORPHIC
1469 vstrdq_scatter_shifted_offset(base, offset, value);
1470 #else /* POLYMORPHIC */
1471 vstrdq_scatter_shifted_offset_u64(base, offset, value);
1472 #endif /* POLYMORPHIC */
1473 }
1474
1475 // CHECK-LABEL: @test_vstrhq_scatter_offset_f16(
1476 // CHECK-NEXT: entry:
1477 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0f16.v8i16.v8f16(half* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], <8 x half> [[VALUE:%.*]], i32 16, i32 0)
1478 // CHECK-NEXT: ret void
1479 //
test_vstrhq_scatter_offset_f16(float16_t * base,uint16x8_t offset,float16x8_t value)1480 void test_vstrhq_scatter_offset_f16(float16_t *base, uint16x8_t offset, float16x8_t value)
1481 {
1482 #ifdef POLYMORPHIC
1483 vstrhq_scatter_offset(base, offset, value);
1484 #else /* POLYMORPHIC */
1485 vstrhq_scatter_offset_f16(base, offset, value);
1486 #endif /* POLYMORPHIC */
1487 }
1488
1489 // CHECK-LABEL: @test_vstrhq_scatter_offset_p_f16(
1490 // CHECK-NEXT: entry:
1491 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1492 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
1493 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0f16.v8i16.v8f16.v8i1(half* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], <8 x half> [[VALUE:%.*]], i32 16, i32 0, <8 x i1> [[TMP1]])
1494 // CHECK-NEXT: ret void
1495 //
test_vstrhq_scatter_offset_p_f16(float16_t * base,uint16x8_t offset,float16x8_t value,mve_pred16_t p)1496 void test_vstrhq_scatter_offset_p_f16(float16_t *base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
1497 {
1498 #ifdef POLYMORPHIC
1499 vstrhq_scatter_offset_p(base, offset, value, p);
1500 #else /* POLYMORPHIC */
1501 vstrhq_scatter_offset_p_f16(base, offset, value, p);
1502 #endif /* POLYMORPHIC */
1503 }
1504
1505 // CHECK-LABEL: @test_vstrhq_scatter_offset_p_s16(
1506 // CHECK-NEXT: entry:
1507 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1508 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
1509 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i16.v8i16.v8i16.v8i1(i16* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], <8 x i16> [[VALUE:%.*]], i32 16, i32 0, <8 x i1> [[TMP1]])
1510 // CHECK-NEXT: ret void
1511 //
test_vstrhq_scatter_offset_p_s16(int16_t * base,uint16x8_t offset,int16x8_t value,mve_pred16_t p)1512 void test_vstrhq_scatter_offset_p_s16(int16_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
1513 {
1514 #ifdef POLYMORPHIC
1515 vstrhq_scatter_offset_p(base, offset, value, p);
1516 #else /* POLYMORPHIC */
1517 vstrhq_scatter_offset_p_s16(base, offset, value, p);
1518 #endif /* POLYMORPHIC */
1519 }
1520
1521 // CHECK-LABEL: @test_vstrhq_scatter_offset_p_s32(
1522 // CHECK-NEXT: entry:
1523 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1524 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1525 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i16.v4i32.v4i32.v4i1(i16* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 16, i32 0, <4 x i1> [[TMP1]])
1526 // CHECK-NEXT: ret void
1527 //
test_vstrhq_scatter_offset_p_s32(int16_t * base,uint32x4_t offset,int32x4_t value,mve_pred16_t p)1528 void test_vstrhq_scatter_offset_p_s32(int16_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
1529 {
1530 #ifdef POLYMORPHIC
1531 vstrhq_scatter_offset_p(base, offset, value, p);
1532 #else /* POLYMORPHIC */
1533 vstrhq_scatter_offset_p_s32(base, offset, value, p);
1534 #endif /* POLYMORPHIC */
1535 }
1536
1537 // CHECK-LABEL: @test_vstrhq_scatter_offset_p_u16(
1538 // CHECK-NEXT: entry:
1539 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1540 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
1541 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i16.v8i16.v8i16.v8i1(i16* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], <8 x i16> [[VALUE:%.*]], i32 16, i32 0, <8 x i1> [[TMP1]])
1542 // CHECK-NEXT: ret void
1543 //
test_vstrhq_scatter_offset_p_u16(uint16_t * base,uint16x8_t offset,uint16x8_t value,mve_pred16_t p)1544 void test_vstrhq_scatter_offset_p_u16(uint16_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
1545 {
1546 #ifdef POLYMORPHIC
1547 vstrhq_scatter_offset_p(base, offset, value, p);
1548 #else /* POLYMORPHIC */
1549 vstrhq_scatter_offset_p_u16(base, offset, value, p);
1550 #endif /* POLYMORPHIC */
1551 }
1552
1553 // CHECK-LABEL: @test_vstrhq_scatter_offset_p_u32(
1554 // CHECK-NEXT: entry:
1555 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1556 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1557 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i16.v4i32.v4i32.v4i1(i16* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 16, i32 0, <4 x i1> [[TMP1]])
1558 // CHECK-NEXT: ret void
1559 //
test_vstrhq_scatter_offset_p_u32(uint16_t * base,uint32x4_t offset,uint32x4_t value,mve_pred16_t p)1560 void test_vstrhq_scatter_offset_p_u32(uint16_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
1561 {
1562 #ifdef POLYMORPHIC
1563 vstrhq_scatter_offset_p(base, offset, value, p);
1564 #else /* POLYMORPHIC */
1565 vstrhq_scatter_offset_p_u32(base, offset, value, p);
1566 #endif /* POLYMORPHIC */
1567 }
1568
1569 // CHECK-LABEL: @test_vstrhq_scatter_offset_s16(
1570 // CHECK-NEXT: entry:
1571 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i16.v8i16.v8i16(i16* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], <8 x i16> [[VALUE:%.*]], i32 16, i32 0)
1572 // CHECK-NEXT: ret void
1573 //
test_vstrhq_scatter_offset_s16(int16_t * base,uint16x8_t offset,int16x8_t value)1574 void test_vstrhq_scatter_offset_s16(int16_t *base, uint16x8_t offset, int16x8_t value)
1575 {
1576 #ifdef POLYMORPHIC
1577 vstrhq_scatter_offset(base, offset, value);
1578 #else /* POLYMORPHIC */
1579 vstrhq_scatter_offset_s16(base, offset, value);
1580 #endif /* POLYMORPHIC */
1581 }
1582
1583 // CHECK-LABEL: @test_vstrhq_scatter_offset_s32(
1584 // CHECK-NEXT: entry:
1585 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i16.v4i32.v4i32(i16* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 16, i32 0)
1586 // CHECK-NEXT: ret void
1587 //
test_vstrhq_scatter_offset_s32(int16_t * base,uint32x4_t offset,int32x4_t value)1588 void test_vstrhq_scatter_offset_s32(int16_t *base, uint32x4_t offset, int32x4_t value)
1589 {
1590 #ifdef POLYMORPHIC
1591 vstrhq_scatter_offset(base, offset, value);
1592 #else /* POLYMORPHIC */
1593 vstrhq_scatter_offset_s32(base, offset, value);
1594 #endif /* POLYMORPHIC */
1595 }
1596
1597 // CHECK-LABEL: @test_vstrhq_scatter_offset_u16(
1598 // CHECK-NEXT: entry:
1599 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i16.v8i16.v8i16(i16* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], <8 x i16> [[VALUE:%.*]], i32 16, i32 0)
1600 // CHECK-NEXT: ret void
1601 //
test_vstrhq_scatter_offset_u16(uint16_t * base,uint16x8_t offset,uint16x8_t value)1602 void test_vstrhq_scatter_offset_u16(uint16_t *base, uint16x8_t offset, uint16x8_t value)
1603 {
1604 #ifdef POLYMORPHIC
1605 vstrhq_scatter_offset(base, offset, value);
1606 #else /* POLYMORPHIC */
1607 vstrhq_scatter_offset_u16(base, offset, value);
1608 #endif /* POLYMORPHIC */
1609 }
1610
1611 // CHECK-LABEL: @test_vstrhq_scatter_offset_u32(
1612 // CHECK-NEXT: entry:
1613 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i16.v4i32.v4i32(i16* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 16, i32 0)
1614 // CHECK-NEXT: ret void
1615 //
test_vstrhq_scatter_offset_u32(uint16_t * base,uint32x4_t offset,uint32x4_t value)1616 void test_vstrhq_scatter_offset_u32(uint16_t *base, uint32x4_t offset, uint32x4_t value)
1617 {
1618 #ifdef POLYMORPHIC
1619 vstrhq_scatter_offset(base, offset, value);
1620 #else /* POLYMORPHIC */
1621 vstrhq_scatter_offset_u32(base, offset, value);
1622 #endif /* POLYMORPHIC */
1623 }
1624
1625 // CHECK-LABEL: @test_vstrhq_scatter_shifted_offset_f16(
1626 // CHECK-NEXT: entry:
1627 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0f16.v8i16.v8f16(half* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], <8 x half> [[VALUE:%.*]], i32 16, i32 1)
1628 // CHECK-NEXT: ret void
1629 //
test_vstrhq_scatter_shifted_offset_f16(float16_t * base,uint16x8_t offset,float16x8_t value)1630 void test_vstrhq_scatter_shifted_offset_f16(float16_t *base, uint16x8_t offset, float16x8_t value)
1631 {
1632 #ifdef POLYMORPHIC
1633 vstrhq_scatter_shifted_offset(base, offset, value);
1634 #else /* POLYMORPHIC */
1635 vstrhq_scatter_shifted_offset_f16(base, offset, value);
1636 #endif /* POLYMORPHIC */
1637 }
1638
1639 // CHECK-LABEL: @test_vstrhq_scatter_shifted_offset_p_f16(
1640 // CHECK-NEXT: entry:
1641 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1642 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
1643 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0f16.v8i16.v8f16.v8i1(half* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], <8 x half> [[VALUE:%.*]], i32 16, i32 1, <8 x i1> [[TMP1]])
1644 // CHECK-NEXT: ret void
1645 //
test_vstrhq_scatter_shifted_offset_p_f16(float16_t * base,uint16x8_t offset,float16x8_t value,mve_pred16_t p)1646 void test_vstrhq_scatter_shifted_offset_p_f16(float16_t *base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
1647 {
1648 #ifdef POLYMORPHIC
1649 vstrhq_scatter_shifted_offset_p(base, offset, value, p);
1650 #else /* POLYMORPHIC */
1651 vstrhq_scatter_shifted_offset_p_f16(base, offset, value, p);
1652 #endif /* POLYMORPHIC */
1653 }
1654
1655 // CHECK-LABEL: @test_vstrhq_scatter_shifted_offset_p_s16(
1656 // CHECK-NEXT: entry:
1657 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1658 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
1659 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i16.v8i16.v8i16.v8i1(i16* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], <8 x i16> [[VALUE:%.*]], i32 16, i32 1, <8 x i1> [[TMP1]])
1660 // CHECK-NEXT: ret void
1661 //
test_vstrhq_scatter_shifted_offset_p_s16(int16_t * base,uint16x8_t offset,int16x8_t value,mve_pred16_t p)1662 void test_vstrhq_scatter_shifted_offset_p_s16(int16_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
1663 {
1664 #ifdef POLYMORPHIC
1665 vstrhq_scatter_shifted_offset_p(base, offset, value, p);
1666 #else /* POLYMORPHIC */
1667 vstrhq_scatter_shifted_offset_p_s16(base, offset, value, p);
1668 #endif /* POLYMORPHIC */
1669 }
1670
1671 // CHECK-LABEL: @test_vstrhq_scatter_shifted_offset_p_s32(
1672 // CHECK-NEXT: entry:
1673 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1674 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1675 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i16.v4i32.v4i32.v4i1(i16* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 16, i32 1, <4 x i1> [[TMP1]])
1676 // CHECK-NEXT: ret void
1677 //
test_vstrhq_scatter_shifted_offset_p_s32(int16_t * base,uint32x4_t offset,int32x4_t value,mve_pred16_t p)1678 void test_vstrhq_scatter_shifted_offset_p_s32(int16_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
1679 {
1680 #ifdef POLYMORPHIC
1681 vstrhq_scatter_shifted_offset_p(base, offset, value, p);
1682 #else /* POLYMORPHIC */
1683 vstrhq_scatter_shifted_offset_p_s32(base, offset, value, p);
1684 #endif /* POLYMORPHIC */
1685 }
1686
1687 // CHECK-LABEL: @test_vstrhq_scatter_shifted_offset_p_u16(
1688 // CHECK-NEXT: entry:
1689 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1690 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
1691 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i16.v8i16.v8i16.v8i1(i16* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], <8 x i16> [[VALUE:%.*]], i32 16, i32 1, <8 x i1> [[TMP1]])
1692 // CHECK-NEXT: ret void
1693 //
test_vstrhq_scatter_shifted_offset_p_u16(uint16_t * base,uint16x8_t offset,uint16x8_t value,mve_pred16_t p)1694 void test_vstrhq_scatter_shifted_offset_p_u16(uint16_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
1695 {
1696 #ifdef POLYMORPHIC
1697 vstrhq_scatter_shifted_offset_p(base, offset, value, p);
1698 #else /* POLYMORPHIC */
1699 vstrhq_scatter_shifted_offset_p_u16(base, offset, value, p);
1700 #endif /* POLYMORPHIC */
1701 }
1702
1703 // CHECK-LABEL: @test_vstrhq_scatter_shifted_offset_p_u32(
1704 // CHECK-NEXT: entry:
1705 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1706 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1707 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i16.v4i32.v4i32.v4i1(i16* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 16, i32 1, <4 x i1> [[TMP1]])
1708 // CHECK-NEXT: ret void
1709 //
test_vstrhq_scatter_shifted_offset_p_u32(uint16_t * base,uint32x4_t offset,uint32x4_t value,mve_pred16_t p)1710 void test_vstrhq_scatter_shifted_offset_p_u32(uint16_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
1711 {
1712 #ifdef POLYMORPHIC
1713 vstrhq_scatter_shifted_offset_p(base, offset, value, p);
1714 #else /* POLYMORPHIC */
1715 vstrhq_scatter_shifted_offset_p_u32(base, offset, value, p);
1716 #endif /* POLYMORPHIC */
1717 }
1718
1719 // CHECK-LABEL: @test_vstrhq_scatter_shifted_offset_s16(
1720 // CHECK-NEXT: entry:
1721 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i16.v8i16.v8i16(i16* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], <8 x i16> [[VALUE:%.*]], i32 16, i32 1)
1722 // CHECK-NEXT: ret void
1723 //
test_vstrhq_scatter_shifted_offset_s16(int16_t * base,uint16x8_t offset,int16x8_t value)1724 void test_vstrhq_scatter_shifted_offset_s16(int16_t *base, uint16x8_t offset, int16x8_t value)
1725 {
1726 #ifdef POLYMORPHIC
1727 vstrhq_scatter_shifted_offset(base, offset, value);
1728 #else /* POLYMORPHIC */
1729 vstrhq_scatter_shifted_offset_s16(base, offset, value);
1730 #endif /* POLYMORPHIC */
1731 }
1732
1733 // CHECK-LABEL: @test_vstrhq_scatter_shifted_offset_s32(
1734 // CHECK-NEXT: entry:
1735 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i16.v4i32.v4i32(i16* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 16, i32 1)
1736 // CHECK-NEXT: ret void
1737 //
test_vstrhq_scatter_shifted_offset_s32(int16_t * base,uint32x4_t offset,int32x4_t value)1738 void test_vstrhq_scatter_shifted_offset_s32(int16_t *base, uint32x4_t offset, int32x4_t value)
1739 {
1740 #ifdef POLYMORPHIC
1741 vstrhq_scatter_shifted_offset(base, offset, value);
1742 #else /* POLYMORPHIC */
1743 vstrhq_scatter_shifted_offset_s32(base, offset, value);
1744 #endif /* POLYMORPHIC */
1745 }
1746
1747 // CHECK-LABEL: @test_vstrhq_scatter_shifted_offset_u16(
1748 // CHECK-NEXT: entry:
1749 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i16.v8i16.v8i16(i16* [[BASE:%.*]], <8 x i16> [[OFFSET:%.*]], <8 x i16> [[VALUE:%.*]], i32 16, i32 1)
1750 // CHECK-NEXT: ret void
1751 //
test_vstrhq_scatter_shifted_offset_u16(uint16_t * base,uint16x8_t offset,uint16x8_t value)1752 void test_vstrhq_scatter_shifted_offset_u16(uint16_t *base, uint16x8_t offset, uint16x8_t value)
1753 {
1754 #ifdef POLYMORPHIC
1755 vstrhq_scatter_shifted_offset(base, offset, value);
1756 #else /* POLYMORPHIC */
1757 vstrhq_scatter_shifted_offset_u16(base, offset, value);
1758 #endif /* POLYMORPHIC */
1759 }
1760
1761 // CHECK-LABEL: @test_vstrhq_scatter_shifted_offset_u32(
1762 // CHECK-NEXT: entry:
1763 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i16.v4i32.v4i32(i16* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 16, i32 1)
1764 // CHECK-NEXT: ret void
1765 //
test_vstrhq_scatter_shifted_offset_u32(uint16_t * base,uint32x4_t offset,uint32x4_t value)1766 void test_vstrhq_scatter_shifted_offset_u32(uint16_t *base, uint32x4_t offset, uint32x4_t value)
1767 {
1768 #ifdef POLYMORPHIC
1769 vstrhq_scatter_shifted_offset(base, offset, value);
1770 #else /* POLYMORPHIC */
1771 vstrhq_scatter_shifted_offset_u32(base, offset, value);
1772 #endif /* POLYMORPHIC */
1773 }
1774
1775 // CHECK-LABEL: @test_vstrwq_scatter_base_f32(
1776 // CHECK-NEXT: entry:
1777 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.base.v4i32.v4f32(<4 x i32> [[ADDR:%.*]], i32 380, <4 x float> [[VALUE:%.*]])
1778 // CHECK-NEXT: ret void
1779 //
test_vstrwq_scatter_base_f32(uint32x4_t addr,float32x4_t value)1780 void test_vstrwq_scatter_base_f32(uint32x4_t addr, float32x4_t value)
1781 {
1782 #ifdef POLYMORPHIC
1783 vstrwq_scatter_base(addr, 0x17c, value);
1784 #else /* POLYMORPHIC */
1785 vstrwq_scatter_base_f32(addr, 0x17c, value);
1786 #endif /* POLYMORPHIC */
1787 }
1788
1789 // CHECK-LABEL: @test_vstrwq_scatter_base_p_f32(
1790 // CHECK-NEXT: entry:
1791 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1792 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1793 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.base.predicated.v4i32.v4f32.v4i1(<4 x i32> [[ADDR:%.*]], i32 -400, <4 x float> [[VALUE:%.*]], <4 x i1> [[TMP1]])
1794 // CHECK-NEXT: ret void
1795 //
test_vstrwq_scatter_base_p_f32(uint32x4_t addr,float32x4_t value,mve_pred16_t p)1796 void test_vstrwq_scatter_base_p_f32(uint32x4_t addr, float32x4_t value, mve_pred16_t p)
1797 {
1798 #ifdef POLYMORPHIC
1799 vstrwq_scatter_base_p(addr, -0x190, value, p);
1800 #else /* POLYMORPHIC */
1801 vstrwq_scatter_base_p_f32(addr, -0x190, value, p);
1802 #endif /* POLYMORPHIC */
1803 }
1804
1805 // CHECK-LABEL: @test_vstrwq_scatter_base_p_s32(
1806 // CHECK-NEXT: entry:
1807 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1808 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1809 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.base.predicated.v4i32.v4i32.v4i1(<4 x i32> [[ADDR:%.*]], i32 48, <4 x i32> [[VALUE:%.*]], <4 x i1> [[TMP1]])
1810 // CHECK-NEXT: ret void
1811 //
test_vstrwq_scatter_base_p_s32(uint32x4_t addr,int32x4_t value,mve_pred16_t p)1812 void test_vstrwq_scatter_base_p_s32(uint32x4_t addr, int32x4_t value, mve_pred16_t p)
1813 {
1814 #ifdef POLYMORPHIC
1815 vstrwq_scatter_base_p(addr, 0x30, value, p);
1816 #else /* POLYMORPHIC */
1817 vstrwq_scatter_base_p_s32(addr, 0x30, value, p);
1818 #endif /* POLYMORPHIC */
1819 }
1820
1821 // CHECK-LABEL: @test_vstrwq_scatter_base_p_u32(
1822 // CHECK-NEXT: entry:
1823 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1824 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1825 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.base.predicated.v4i32.v4i32.v4i1(<4 x i32> [[ADDR:%.*]], i32 -376, <4 x i32> [[VALUE:%.*]], <4 x i1> [[TMP1]])
1826 // CHECK-NEXT: ret void
1827 //
test_vstrwq_scatter_base_p_u32(uint32x4_t addr,uint32x4_t value,mve_pred16_t p)1828 void test_vstrwq_scatter_base_p_u32(uint32x4_t addr, uint32x4_t value, mve_pred16_t p)
1829 {
1830 #ifdef POLYMORPHIC
1831 vstrwq_scatter_base_p(addr, -0x178, value, p);
1832 #else /* POLYMORPHIC */
1833 vstrwq_scatter_base_p_u32(addr, -0x178, value, p);
1834 #endif /* POLYMORPHIC */
1835 }
1836
1837 // CHECK-LABEL: @test_vstrwq_scatter_base_s32(
1838 // CHECK-NEXT: entry:
1839 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.base.v4i32.v4i32(<4 x i32> [[ADDR:%.*]], i32 156, <4 x i32> [[VALUE:%.*]])
1840 // CHECK-NEXT: ret void
1841 //
test_vstrwq_scatter_base_s32(uint32x4_t addr,int32x4_t value)1842 void test_vstrwq_scatter_base_s32(uint32x4_t addr, int32x4_t value)
1843 {
1844 #ifdef POLYMORPHIC
1845 vstrwq_scatter_base(addr, 0x9c, value);
1846 #else /* POLYMORPHIC */
1847 vstrwq_scatter_base_s32(addr, 0x9c, value);
1848 #endif /* POLYMORPHIC */
1849 }
1850
1851 // CHECK-LABEL: @test_vstrwq_scatter_base_u32(
1852 // CHECK-NEXT: entry:
1853 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.base.v4i32.v4i32(<4 x i32> [[ADDR:%.*]], i32 212, <4 x i32> [[VALUE:%.*]])
1854 // CHECK-NEXT: ret void
1855 //
test_vstrwq_scatter_base_u32(uint32x4_t addr,uint32x4_t value)1856 void test_vstrwq_scatter_base_u32(uint32x4_t addr, uint32x4_t value)
1857 {
1858 #ifdef POLYMORPHIC
1859 vstrwq_scatter_base(addr, 0xd4, value);
1860 #else /* POLYMORPHIC */
1861 vstrwq_scatter_base_u32(addr, 0xd4, value);
1862 #endif /* POLYMORPHIC */
1863 }
1864
1865 // CHECK-LABEL: @test_vstrwq_scatter_base_wb_f32(
1866 // CHECK-NEXT: entry:
1867 // CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[ADDR:%.*]], align 8
1868 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.arm.mve.vstr.scatter.base.wb.v4i32.v4f32(<4 x i32> [[TMP0]], i32 -412, <4 x float> [[VALUE:%.*]])
1869 // CHECK-NEXT: store <4 x i32> [[TMP1]], <4 x i32>* [[ADDR]], align 8
1870 // CHECK-NEXT: ret void
1871 //
test_vstrwq_scatter_base_wb_f32(uint32x4_t * addr,float32x4_t value)1872 void test_vstrwq_scatter_base_wb_f32(uint32x4_t *addr, float32x4_t value)
1873 {
1874 #ifdef POLYMORPHIC
1875 vstrwq_scatter_base_wb(addr, -0x19c, value);
1876 #else /* POLYMORPHIC */
1877 vstrwq_scatter_base_wb_f32(addr, -0x19c, value);
1878 #endif /* POLYMORPHIC */
1879 }
1880
1881 // CHECK-LABEL: @test_vstrwq_scatter_base_wb_p_f32(
1882 // CHECK-NEXT: entry:
1883 // CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[ADDR:%.*]], align 8
1884 // CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[P:%.*]] to i32
1885 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP1]])
1886 // CHECK-NEXT: [[TMP3:%.*]] = call <4 x i32> @llvm.arm.mve.vstr.scatter.base.wb.predicated.v4i32.v4f32.v4i1(<4 x i32> [[TMP0]], i32 236, <4 x float> [[VALUE:%.*]], <4 x i1> [[TMP2]])
1887 // CHECK-NEXT: store <4 x i32> [[TMP3]], <4 x i32>* [[ADDR]], align 8
1888 // CHECK-NEXT: ret void
1889 //
test_vstrwq_scatter_base_wb_p_f32(uint32x4_t * addr,float32x4_t value,mve_pred16_t p)1890 void test_vstrwq_scatter_base_wb_p_f32(uint32x4_t *addr, float32x4_t value, mve_pred16_t p)
1891 {
1892 #ifdef POLYMORPHIC
1893 vstrwq_scatter_base_wb_p(addr, 0xec, value, p);
1894 #else /* POLYMORPHIC */
1895 vstrwq_scatter_base_wb_p_f32(addr, 0xec, value, p);
1896 #endif /* POLYMORPHIC */
1897 }
1898
1899 // CHECK-LABEL: @test_vstrwq_scatter_base_wb_p_s32(
1900 // CHECK-NEXT: entry:
1901 // CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[ADDR:%.*]], align 8
1902 // CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[P:%.*]] to i32
1903 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP1]])
1904 // CHECK-NEXT: [[TMP3:%.*]] = call <4 x i32> @llvm.arm.mve.vstr.scatter.base.wb.predicated.v4i32.v4i32.v4i1(<4 x i32> [[TMP0]], i32 328, <4 x i32> [[VALUE:%.*]], <4 x i1> [[TMP2]])
1905 // CHECK-NEXT: store <4 x i32> [[TMP3]], <4 x i32>* [[ADDR]], align 8
1906 // CHECK-NEXT: ret void
1907 //
test_vstrwq_scatter_base_wb_p_s32(uint32x4_t * addr,int32x4_t value,mve_pred16_t p)1908 void test_vstrwq_scatter_base_wb_p_s32(uint32x4_t *addr, int32x4_t value, mve_pred16_t p)
1909 {
1910 #ifdef POLYMORPHIC
1911 vstrwq_scatter_base_wb_p(addr, 0x148, value, p);
1912 #else /* POLYMORPHIC */
1913 vstrwq_scatter_base_wb_p_s32(addr, 0x148, value, p);
1914 #endif /* POLYMORPHIC */
1915 }
1916
1917 // CHECK-LABEL: @test_vstrwq_scatter_base_wb_p_u32(
1918 // CHECK-NEXT: entry:
1919 // CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[ADDR:%.*]], align 8
1920 // CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[P:%.*]] to i32
1921 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP1]])
1922 // CHECK-NEXT: [[TMP3:%.*]] = call <4 x i32> @llvm.arm.mve.vstr.scatter.base.wb.predicated.v4i32.v4i32.v4i1(<4 x i32> [[TMP0]], i32 412, <4 x i32> [[VALUE:%.*]], <4 x i1> [[TMP2]])
1923 // CHECK-NEXT: store <4 x i32> [[TMP3]], <4 x i32>* [[ADDR]], align 8
1924 // CHECK-NEXT: ret void
1925 //
test_vstrwq_scatter_base_wb_p_u32(uint32x4_t * addr,uint32x4_t value,mve_pred16_t p)1926 void test_vstrwq_scatter_base_wb_p_u32(uint32x4_t *addr, uint32x4_t value, mve_pred16_t p)
1927 {
1928 #ifdef POLYMORPHIC
1929 vstrwq_scatter_base_wb_p(addr, 0x19c, value, p);
1930 #else /* POLYMORPHIC */
1931 vstrwq_scatter_base_wb_p_u32(addr, 0x19c, value, p);
1932 #endif /* POLYMORPHIC */
1933 }
1934
1935 // CHECK-LABEL: @test_vstrwq_scatter_base_wb_s32(
1936 // CHECK-NEXT: entry:
1937 // CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[ADDR:%.*]], align 8
1938 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.arm.mve.vstr.scatter.base.wb.v4i32.v4i32(<4 x i32> [[TMP0]], i32 -152, <4 x i32> [[VALUE:%.*]])
1939 // CHECK-NEXT: store <4 x i32> [[TMP1]], <4 x i32>* [[ADDR]], align 8
1940 // CHECK-NEXT: ret void
1941 //
test_vstrwq_scatter_base_wb_s32(uint32x4_t * addr,int32x4_t value)1942 void test_vstrwq_scatter_base_wb_s32(uint32x4_t *addr, int32x4_t value)
1943 {
1944 #ifdef POLYMORPHIC
1945 vstrwq_scatter_base_wb(addr, -0x98, value);
1946 #else /* POLYMORPHIC */
1947 vstrwq_scatter_base_wb_s32(addr, -0x98, value);
1948 #endif /* POLYMORPHIC */
1949 }
1950
1951 // CHECK-LABEL: @test_vstrwq_scatter_base_wb_u32(
1952 // CHECK-NEXT: entry:
1953 // CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[ADDR:%.*]], align 8
1954 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.arm.mve.vstr.scatter.base.wb.v4i32.v4i32(<4 x i32> [[TMP0]], i32 64, <4 x i32> [[VALUE:%.*]])
1955 // CHECK-NEXT: store <4 x i32> [[TMP1]], <4 x i32>* [[ADDR]], align 8
1956 // CHECK-NEXT: ret void
1957 //
test_vstrwq_scatter_base_wb_u32(uint32x4_t * addr,uint32x4_t value)1958 void test_vstrwq_scatter_base_wb_u32(uint32x4_t *addr, uint32x4_t value)
1959 {
1960 #ifdef POLYMORPHIC
1961 vstrwq_scatter_base_wb(addr, 0x40, value);
1962 #else /* POLYMORPHIC */
1963 vstrwq_scatter_base_wb_u32(addr, 0x40, value);
1964 #endif /* POLYMORPHIC */
1965 }
1966
1967 // CHECK-LABEL: @test_vstrwq_scatter_offset_f32(
1968 // CHECK-NEXT: entry:
1969 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0f32.v4i32.v4f32(float* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x float> [[VALUE:%.*]], i32 32, i32 0)
1970 // CHECK-NEXT: ret void
1971 //
test_vstrwq_scatter_offset_f32(float32_t * base,uint32x4_t offset,float32x4_t value)1972 void test_vstrwq_scatter_offset_f32(float32_t *base, uint32x4_t offset, float32x4_t value)
1973 {
1974 #ifdef POLYMORPHIC
1975 vstrwq_scatter_offset(base, offset, value);
1976 #else /* POLYMORPHIC */
1977 vstrwq_scatter_offset_f32(base, offset, value);
1978 #endif /* POLYMORPHIC */
1979 }
1980
1981 // CHECK-LABEL: @test_vstrwq_scatter_offset_p_f32(
1982 // CHECK-NEXT: entry:
1983 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
1984 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
1985 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0f32.v4i32.v4f32.v4i1(float* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x float> [[VALUE:%.*]], i32 32, i32 0, <4 x i1> [[TMP1]])
1986 // CHECK-NEXT: ret void
1987 //
test_vstrwq_scatter_offset_p_f32(float32_t * base,uint32x4_t offset,float32x4_t value,mve_pred16_t p)1988 void test_vstrwq_scatter_offset_p_f32(float32_t *base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
1989 {
1990 #ifdef POLYMORPHIC
1991 vstrwq_scatter_offset_p(base, offset, value, p);
1992 #else /* POLYMORPHIC */
1993 vstrwq_scatter_offset_p_f32(base, offset, value, p);
1994 #endif /* POLYMORPHIC */
1995 }
1996
1997 // CHECK-LABEL: @test_vstrwq_scatter_offset_p_s32(
1998 // CHECK-NEXT: entry:
1999 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
2000 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
2001 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i32.v4i32.v4i32.v4i1(i32* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 32, i32 0, <4 x i1> [[TMP1]])
2002 // CHECK-NEXT: ret void
2003 //
test_vstrwq_scatter_offset_p_s32(int32_t * base,uint32x4_t offset,int32x4_t value,mve_pred16_t p)2004 void test_vstrwq_scatter_offset_p_s32(int32_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
2005 {
2006 #ifdef POLYMORPHIC
2007 vstrwq_scatter_offset_p(base, offset, value, p);
2008 #else /* POLYMORPHIC */
2009 vstrwq_scatter_offset_p_s32(base, offset, value, p);
2010 #endif /* POLYMORPHIC */
2011 }
2012
2013 // CHECK-LABEL: @test_vstrwq_scatter_offset_p_u32(
2014 // CHECK-NEXT: entry:
2015 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
2016 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
2017 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i32.v4i32.v4i32.v4i1(i32* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 32, i32 0, <4 x i1> [[TMP1]])
2018 // CHECK-NEXT: ret void
2019 //
test_vstrwq_scatter_offset_p_u32(uint32_t * base,uint32x4_t offset,uint32x4_t value,mve_pred16_t p)2020 void test_vstrwq_scatter_offset_p_u32(uint32_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
2021 {
2022 #ifdef POLYMORPHIC
2023 vstrwq_scatter_offset_p(base, offset, value, p);
2024 #else /* POLYMORPHIC */
2025 vstrwq_scatter_offset_p_u32(base, offset, value, p);
2026 #endif /* POLYMORPHIC */
2027 }
2028
2029 // CHECK-LABEL: @test_vstrwq_scatter_offset_s32(
2030 // CHECK-NEXT: entry:
2031 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i32.v4i32.v4i32(i32* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 32, i32 0)
2032 // CHECK-NEXT: ret void
2033 //
test_vstrwq_scatter_offset_s32(int32_t * base,uint32x4_t offset,int32x4_t value)2034 void test_vstrwq_scatter_offset_s32(int32_t *base, uint32x4_t offset, int32x4_t value)
2035 {
2036 #ifdef POLYMORPHIC
2037 vstrwq_scatter_offset(base, offset, value);
2038 #else /* POLYMORPHIC */
2039 vstrwq_scatter_offset_s32(base, offset, value);
2040 #endif /* POLYMORPHIC */
2041 }
2042
2043 // CHECK-LABEL: @test_vstrwq_scatter_offset_u32(
2044 // CHECK-NEXT: entry:
2045 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i32.v4i32.v4i32(i32* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 32, i32 0)
2046 // CHECK-NEXT: ret void
2047 //
test_vstrwq_scatter_offset_u32(uint32_t * base,uint32x4_t offset,uint32x4_t value)2048 void test_vstrwq_scatter_offset_u32(uint32_t *base, uint32x4_t offset, uint32x4_t value)
2049 {
2050 #ifdef POLYMORPHIC
2051 vstrwq_scatter_offset(base, offset, value);
2052 #else /* POLYMORPHIC */
2053 vstrwq_scatter_offset_u32(base, offset, value);
2054 #endif /* POLYMORPHIC */
2055 }
2056
2057 // CHECK-LABEL: @test_vstrwq_scatter_shifted_offset_f32(
2058 // CHECK-NEXT: entry:
2059 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0f32.v4i32.v4f32(float* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x float> [[VALUE:%.*]], i32 32, i32 2)
2060 // CHECK-NEXT: ret void
2061 //
test_vstrwq_scatter_shifted_offset_f32(float32_t * base,uint32x4_t offset,float32x4_t value)2062 void test_vstrwq_scatter_shifted_offset_f32(float32_t *base, uint32x4_t offset, float32x4_t value)
2063 {
2064 #ifdef POLYMORPHIC
2065 vstrwq_scatter_shifted_offset(base, offset, value);
2066 #else /* POLYMORPHIC */
2067 vstrwq_scatter_shifted_offset_f32(base, offset, value);
2068 #endif /* POLYMORPHIC */
2069 }
2070
2071 // CHECK-LABEL: @test_vstrwq_scatter_shifted_offset_p_f32(
2072 // CHECK-NEXT: entry:
2073 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
2074 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
2075 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0f32.v4i32.v4f32.v4i1(float* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x float> [[VALUE:%.*]], i32 32, i32 2, <4 x i1> [[TMP1]])
2076 // CHECK-NEXT: ret void
2077 //
test_vstrwq_scatter_shifted_offset_p_f32(float32_t * base,uint32x4_t offset,float32x4_t value,mve_pred16_t p)2078 void test_vstrwq_scatter_shifted_offset_p_f32(float32_t *base, uint32x4_t offset, float32x4_t value, mve_pred16_t p)
2079 {
2080 #ifdef POLYMORPHIC
2081 vstrwq_scatter_shifted_offset_p(base, offset, value, p);
2082 #else /* POLYMORPHIC */
2083 vstrwq_scatter_shifted_offset_p_f32(base, offset, value, p);
2084 #endif /* POLYMORPHIC */
2085 }
2086
2087 // CHECK-LABEL: @test_vstrwq_scatter_shifted_offset_p_s32(
2088 // CHECK-NEXT: entry:
2089 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
2090 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
2091 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i32.v4i32.v4i32.v4i1(i32* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 32, i32 2, <4 x i1> [[TMP1]])
2092 // CHECK-NEXT: ret void
2093 //
test_vstrwq_scatter_shifted_offset_p_s32(int32_t * base,uint32x4_t offset,int32x4_t value,mve_pred16_t p)2094 void test_vstrwq_scatter_shifted_offset_p_s32(int32_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
2095 {
2096 #ifdef POLYMORPHIC
2097 vstrwq_scatter_shifted_offset_p(base, offset, value, p);
2098 #else /* POLYMORPHIC */
2099 vstrwq_scatter_shifted_offset_p_s32(base, offset, value, p);
2100 #endif /* POLYMORPHIC */
2101 }
2102
2103 // CHECK-LABEL: @test_vstrwq_scatter_shifted_offset_p_u32(
2104 // CHECK-NEXT: entry:
2105 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
2106 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
2107 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.predicated.p0i32.v4i32.v4i32.v4i1(i32* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 32, i32 2, <4 x i1> [[TMP1]])
2108 // CHECK-NEXT: ret void
2109 //
test_vstrwq_scatter_shifted_offset_p_u32(uint32_t * base,uint32x4_t offset,uint32x4_t value,mve_pred16_t p)2110 void test_vstrwq_scatter_shifted_offset_p_u32(uint32_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
2111 {
2112 #ifdef POLYMORPHIC
2113 vstrwq_scatter_shifted_offset_p(base, offset, value, p);
2114 #else /* POLYMORPHIC */
2115 vstrwq_scatter_shifted_offset_p_u32(base, offset, value, p);
2116 #endif /* POLYMORPHIC */
2117 }
2118
2119 // CHECK-LABEL: @test_vstrwq_scatter_shifted_offset_s32(
2120 // CHECK-NEXT: entry:
2121 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i32.v4i32.v4i32(i32* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 32, i32 2)
2122 // CHECK-NEXT: ret void
2123 //
test_vstrwq_scatter_shifted_offset_s32(int32_t * base,uint32x4_t offset,int32x4_t value)2124 void test_vstrwq_scatter_shifted_offset_s32(int32_t *base, uint32x4_t offset, int32x4_t value)
2125 {
2126 #ifdef POLYMORPHIC
2127 vstrwq_scatter_shifted_offset(base, offset, value);
2128 #else /* POLYMORPHIC */
2129 vstrwq_scatter_shifted_offset_s32(base, offset, value);
2130 #endif /* POLYMORPHIC */
2131 }
2132
2133 // CHECK-LABEL: @test_vstrwq_scatter_shifted_offset_u32(
2134 // CHECK-NEXT: entry:
2135 // CHECK-NEXT: call void @llvm.arm.mve.vstr.scatter.offset.p0i32.v4i32.v4i32(i32* [[BASE:%.*]], <4 x i32> [[OFFSET:%.*]], <4 x i32> [[VALUE:%.*]], i32 32, i32 2)
2136 // CHECK-NEXT: ret void
2137 //
test_vstrwq_scatter_shifted_offset_u32(uint32_t * base,uint32x4_t offset,uint32x4_t value)2138 void test_vstrwq_scatter_shifted_offset_u32(uint32_t *base, uint32x4_t offset, uint32x4_t value)
2139 {
2140 #ifdef POLYMORPHIC
2141 vstrwq_scatter_shifted_offset(base, offset, value);
2142 #else /* POLYMORPHIC */
2143 vstrwq_scatter_shifted_offset_u32(base, offset, value);
2144 #endif /* POLYMORPHIC */
2145 }
2146
2147