1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
3 // RUN: %clang_cc1 -DPOLYMORPHIC -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
4
5 #include <arm_mve.h>
6
7 // CHECK-LABEL: @test_vcvtq_f16_s16(
8 // CHECK-NEXT: entry:
9 // CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i16> [[A:%.*]] to <8 x half>
10 // CHECK-NEXT: ret <8 x half> [[TMP0]]
11 //
test_vcvtq_f16_s16(int16x8_t a)12 float16x8_t test_vcvtq_f16_s16(int16x8_t a)
13 {
14 #ifdef POLYMORPHIC
15 return vcvtq(a);
16 #else /* POLYMORPHIC */
17 return vcvtq_f16_s16(a);
18 #endif /* POLYMORPHIC */
19 }
20
21 // CHECK-LABEL: @test_vcvtq_f16_u16(
22 // CHECK-NEXT: entry:
23 // CHECK-NEXT: [[TMP0:%.*]] = uitofp <8 x i16> [[A:%.*]] to <8 x half>
24 // CHECK-NEXT: ret <8 x half> [[TMP0]]
25 //
test_vcvtq_f16_u16(uint16x8_t a)26 float16x8_t test_vcvtq_f16_u16(uint16x8_t a)
27 {
28 #ifdef POLYMORPHIC
29 return vcvtq(a);
30 #else /* POLYMORPHIC */
31 return vcvtq_f16_u16(a);
32 #endif /* POLYMORPHIC */
33 }
34
35 // CHECK-LABEL: @test_vcvtq_f32_s32(
36 // CHECK-NEXT: entry:
37 // CHECK-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[A:%.*]] to <4 x float>
38 // CHECK-NEXT: ret <4 x float> [[TMP0]]
39 //
test_vcvtq_f32_s32(int32x4_t a)40 float32x4_t test_vcvtq_f32_s32(int32x4_t a)
41 {
42 #ifdef POLYMORPHIC
43 return vcvtq(a);
44 #else /* POLYMORPHIC */
45 return vcvtq_f32_s32(a);
46 #endif /* POLYMORPHIC */
47 }
48
49 // CHECK-LABEL: @test_vcvtq_f32_u32(
50 // CHECK-NEXT: entry:
51 // CHECK-NEXT: [[TMP0:%.*]] = uitofp <4 x i32> [[A:%.*]] to <4 x float>
52 // CHECK-NEXT: ret <4 x float> [[TMP0]]
53 //
test_vcvtq_f32_u32(uint32x4_t a)54 float32x4_t test_vcvtq_f32_u32(uint32x4_t a)
55 {
56 #ifdef POLYMORPHIC
57 return vcvtq(a);
58 #else /* POLYMORPHIC */
59 return vcvtq_f32_u32(a);
60 #endif /* POLYMORPHIC */
61 }
62
63 // CHECK-LABEL: @test_vcvtq_s16_f16(
64 // CHECK-NEXT: entry:
65 // CHECK-NEXT: [[TMP0:%.*]] = fptosi <8 x half> [[A:%.*]] to <8 x i16>
66 // CHECK-NEXT: ret <8 x i16> [[TMP0]]
67 //
test_vcvtq_s16_f16(float16x8_t a)68 int16x8_t test_vcvtq_s16_f16(float16x8_t a)
69 {
70 return vcvtq_s16_f16(a);
71 }
72
73 // CHECK-LABEL: @test_vcvtq_s32_f32(
74 // CHECK-NEXT: entry:
75 // CHECK-NEXT: [[TMP0:%.*]] = fptosi <4 x float> [[A:%.*]] to <4 x i32>
76 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
77 //
test_vcvtq_s32_f32(float32x4_t a)78 int32x4_t test_vcvtq_s32_f32(float32x4_t a)
79 {
80 return vcvtq_s32_f32(a);
81 }
82
83 // CHECK-LABEL: @test_vcvtq_u16_f16(
84 // CHECK-NEXT: entry:
85 // CHECK-NEXT: [[TMP0:%.*]] = fptoui <8 x half> [[A:%.*]] to <8 x i16>
86 // CHECK-NEXT: ret <8 x i16> [[TMP0]]
87 //
test_vcvtq_u16_f16(float16x8_t a)88 uint16x8_t test_vcvtq_u16_f16(float16x8_t a)
89 {
90 return vcvtq_u16_f16(a);
91 }
92
93 // CHECK-LABEL: @test_vcvtq_u32_f32(
94 // CHECK-NEXT: entry:
95 // CHECK-NEXT: [[TMP0:%.*]] = fptoui <4 x float> [[A:%.*]] to <4 x i32>
96 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
97 //
test_vcvtq_u32_f32(float32x4_t a)98 uint32x4_t test_vcvtq_u32_f32(float32x4_t a)
99 {
100 return vcvtq_u32_f32(a);
101 }
102
103 // CHECK-LABEL: @test_vcvtq_m_f16_s16(
104 // CHECK-NEXT: entry:
105 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
106 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
107 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vcvt.fp.int.predicated.v8f16.v8i16.v8i1(<8 x i16> [[A:%.*]], i32 0, <8 x i1> [[TMP1]], <8 x half> [[INACTIVE:%.*]])
108 // CHECK-NEXT: ret <8 x half> [[TMP2]]
109 //
test_vcvtq_m_f16_s16(float16x8_t inactive,int16x8_t a,mve_pred16_t p)110 float16x8_t test_vcvtq_m_f16_s16(float16x8_t inactive, int16x8_t a, mve_pred16_t p)
111 {
112 #ifdef POLYMORPHIC
113 return vcvtq_m(inactive, a, p);
114 #else /* POLYMORPHIC */
115 return vcvtq_m_f16_s16(inactive, a, p);
116 #endif /* POLYMORPHIC */
117 }
118
119 // CHECK-LABEL: @test_vcvtq_m_f16_u16(
120 // CHECK-NEXT: entry:
121 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
122 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
123 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vcvt.fp.int.predicated.v8f16.v8i16.v8i1(<8 x i16> [[A:%.*]], i32 1, <8 x i1> [[TMP1]], <8 x half> [[INACTIVE:%.*]])
124 // CHECK-NEXT: ret <8 x half> [[TMP2]]
125 //
test_vcvtq_m_f16_u16(float16x8_t inactive,uint16x8_t a,mve_pred16_t p)126 float16x8_t test_vcvtq_m_f16_u16(float16x8_t inactive, uint16x8_t a, mve_pred16_t p)
127 {
128 #ifdef POLYMORPHIC
129 return vcvtq_m(inactive, a, p);
130 #else /* POLYMORPHIC */
131 return vcvtq_m_f16_u16(inactive, a, p);
132 #endif /* POLYMORPHIC */
133 }
134
135 // CHECK-LABEL: @test_vcvtq_m_f32_s32(
136 // CHECK-NEXT: entry:
137 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
138 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
139 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcvt.fp.int.predicated.v4f32.v4i32.v4i1(<4 x i32> [[A:%.*]], i32 0, <4 x i1> [[TMP1]], <4 x float> [[INACTIVE:%.*]])
140 // CHECK-NEXT: ret <4 x float> [[TMP2]]
141 //
test_vcvtq_m_f32_s32(float32x4_t inactive,int32x4_t a,mve_pred16_t p)142 float32x4_t test_vcvtq_m_f32_s32(float32x4_t inactive, int32x4_t a, mve_pred16_t p)
143 {
144 #ifdef POLYMORPHIC
145 return vcvtq_m(inactive, a, p);
146 #else /* POLYMORPHIC */
147 return vcvtq_m_f32_s32(inactive, a, p);
148 #endif /* POLYMORPHIC */
149 }
150
151 // CHECK-LABEL: @test_vcvtq_m_f32_u32(
152 // CHECK-NEXT: entry:
153 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
154 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
155 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcvt.fp.int.predicated.v4f32.v4i32.v4i1(<4 x i32> [[A:%.*]], i32 1, <4 x i1> [[TMP1]], <4 x float> [[INACTIVE:%.*]])
156 // CHECK-NEXT: ret <4 x float> [[TMP2]]
157 //
test_vcvtq_m_f32_u32(float32x4_t inactive,uint32x4_t a,mve_pred16_t p)158 float32x4_t test_vcvtq_m_f32_u32(float32x4_t inactive, uint32x4_t a, mve_pred16_t p)
159 {
160 #ifdef POLYMORPHIC
161 return vcvtq_m(inactive, a, p);
162 #else /* POLYMORPHIC */
163 return vcvtq_m_f32_u32(inactive, a, p);
164 #endif /* POLYMORPHIC */
165 }
166
167 // CHECK-LABEL: @test_vcvtq_m_s16_f16(
168 // CHECK-NEXT: entry:
169 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
170 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
171 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.vcvt.fp.int.predicated.v8i16.v8f16.v8i1(<8 x half> [[A:%.*]], i32 0, <8 x i1> [[TMP1]], <8 x i16> [[INACTIVE:%.*]])
172 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
173 //
test_vcvtq_m_s16_f16(int16x8_t inactive,float16x8_t a,mve_pred16_t p)174 int16x8_t test_vcvtq_m_s16_f16(int16x8_t inactive, float16x8_t a, mve_pred16_t p)
175 {
176 #ifdef POLYMORPHIC
177 return vcvtq_m(inactive, a, p);
178 #else /* POLYMORPHIC */
179 return vcvtq_m_s16_f16(inactive, a, p);
180 #endif /* POLYMORPHIC */
181 }
182
183 // CHECK-LABEL: @test_vcvtq_m_s32_f32(
184 // CHECK-NEXT: entry:
185 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
186 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
187 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vcvt.fp.int.predicated.v4i32.v4f32.v4i1(<4 x float> [[A:%.*]], i32 0, <4 x i1> [[TMP1]], <4 x i32> [[INACTIVE:%.*]])
188 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
189 //
test_vcvtq_m_s32_f32(int32x4_t inactive,float32x4_t a,mve_pred16_t p)190 int32x4_t test_vcvtq_m_s32_f32(int32x4_t inactive, float32x4_t a, mve_pred16_t p)
191 {
192 #ifdef POLYMORPHIC
193 return vcvtq_m(inactive, a, p);
194 #else /* POLYMORPHIC */
195 return vcvtq_m_s32_f32(inactive, a, p);
196 #endif /* POLYMORPHIC */
197 }
198
199 // CHECK-LABEL: @test_vcvtq_m_u16_f16(
200 // CHECK-NEXT: entry:
201 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
202 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
203 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.vcvt.fp.int.predicated.v8i16.v8f16.v8i1(<8 x half> [[A:%.*]], i32 1, <8 x i1> [[TMP1]], <8 x i16> [[INACTIVE:%.*]])
204 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
205 //
test_vcvtq_m_u16_f16(uint16x8_t inactive,float16x8_t a,mve_pred16_t p)206 uint16x8_t test_vcvtq_m_u16_f16(uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
207 {
208 #ifdef POLYMORPHIC
209 return vcvtq_m(inactive, a, p);
210 #else /* POLYMORPHIC */
211 return vcvtq_m_u16_f16(inactive, a, p);
212 #endif /* POLYMORPHIC */
213 }
214
215 // CHECK-LABEL: @test_vcvtq_m_u32_f32(
216 // CHECK-NEXT: entry:
217 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
218 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
219 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vcvt.fp.int.predicated.v4i32.v4f32.v4i1(<4 x float> [[A:%.*]], i32 1, <4 x i1> [[TMP1]], <4 x i32> [[INACTIVE:%.*]])
220 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
221 //
test_vcvtq_m_u32_f32(uint32x4_t inactive,float32x4_t a,mve_pred16_t p)222 uint32x4_t test_vcvtq_m_u32_f32(uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
223 {
224 #ifdef POLYMORPHIC
225 return vcvtq_m(inactive, a, p);
226 #else /* POLYMORPHIC */
227 return vcvtq_m_u32_f32(inactive, a, p);
228 #endif /* POLYMORPHIC */
229 }
230
231 // CHECK-LABEL: @test_vcvtq_x_f16_s16(
232 // CHECK-NEXT: entry:
233 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
234 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
235 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vcvt.fp.int.predicated.v8f16.v8i16.v8i1(<8 x i16> [[A:%.*]], i32 0, <8 x i1> [[TMP1]], <8 x half> undef)
236 // CHECK-NEXT: ret <8 x half> [[TMP2]]
237 //
test_vcvtq_x_f16_s16(int16x8_t a,mve_pred16_t p)238 float16x8_t test_vcvtq_x_f16_s16(int16x8_t a, mve_pred16_t p)
239 {
240 #ifdef POLYMORPHIC
241 return vcvtq_x(a, p);
242 #else /* POLYMORPHIC */
243 return vcvtq_x_f16_s16(a, p);
244 #endif /* POLYMORPHIC */
245 }
246
247 // CHECK-LABEL: @test_vcvtq_x_f16_u16(
248 // CHECK-NEXT: entry:
249 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
250 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
251 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vcvt.fp.int.predicated.v8f16.v8i16.v8i1(<8 x i16> [[A:%.*]], i32 1, <8 x i1> [[TMP1]], <8 x half> undef)
252 // CHECK-NEXT: ret <8 x half> [[TMP2]]
253 //
test_vcvtq_x_f16_u16(uint16x8_t a,mve_pred16_t p)254 float16x8_t test_vcvtq_x_f16_u16(uint16x8_t a, mve_pred16_t p)
255 {
256 #ifdef POLYMORPHIC
257 return vcvtq_x(a, p);
258 #else /* POLYMORPHIC */
259 return vcvtq_x_f16_u16(a, p);
260 #endif /* POLYMORPHIC */
261 }
262
263 // CHECK-LABEL: @test_vcvtq_x_f32_s32(
264 // CHECK-NEXT: entry:
265 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
266 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
267 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcvt.fp.int.predicated.v4f32.v4i32.v4i1(<4 x i32> [[A:%.*]], i32 0, <4 x i1> [[TMP1]], <4 x float> undef)
268 // CHECK-NEXT: ret <4 x float> [[TMP2]]
269 //
test_vcvtq_x_f32_s32(int32x4_t a,mve_pred16_t p)270 float32x4_t test_vcvtq_x_f32_s32(int32x4_t a, mve_pred16_t p)
271 {
272 #ifdef POLYMORPHIC
273 return vcvtq_x(a, p);
274 #else /* POLYMORPHIC */
275 return vcvtq_x_f32_s32(a, p);
276 #endif /* POLYMORPHIC */
277 }
278
279 // CHECK-LABEL: @test_vcvtq_x_f32_u32(
280 // CHECK-NEXT: entry:
281 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
282 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
283 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcvt.fp.int.predicated.v4f32.v4i32.v4i1(<4 x i32> [[A:%.*]], i32 1, <4 x i1> [[TMP1]], <4 x float> undef)
284 // CHECK-NEXT: ret <4 x float> [[TMP2]]
285 //
test_vcvtq_x_f32_u32(uint32x4_t a,mve_pred16_t p)286 float32x4_t test_vcvtq_x_f32_u32(uint32x4_t a, mve_pred16_t p)
287 {
288 #ifdef POLYMORPHIC
289 return vcvtq_x(a, p);
290 #else /* POLYMORPHIC */
291 return vcvtq_x_f32_u32(a, p);
292 #endif /* POLYMORPHIC */
293 }
294
295 // CHECK-LABEL: @test_vcvtq_x_s16_f16(
296 // CHECK-NEXT: entry:
297 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
298 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
299 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.vcvt.fp.int.predicated.v8i16.v8f16.v8i1(<8 x half> [[A:%.*]], i32 0, <8 x i1> [[TMP1]], <8 x i16> undef)
300 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
301 //
test_vcvtq_x_s16_f16(float16x8_t a,mve_pred16_t p)302 int16x8_t test_vcvtq_x_s16_f16(float16x8_t a, mve_pred16_t p)
303 {
304 return vcvtq_x_s16_f16(a, p);
305 }
306
307 // CHECK-LABEL: @test_vcvtq_x_s32_f32(
308 // CHECK-NEXT: entry:
309 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
310 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
311 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vcvt.fp.int.predicated.v4i32.v4f32.v4i1(<4 x float> [[A:%.*]], i32 0, <4 x i1> [[TMP1]], <4 x i32> undef)
312 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
313 //
test_vcvtq_x_s32_f32(float32x4_t a,mve_pred16_t p)314 int32x4_t test_vcvtq_x_s32_f32(float32x4_t a, mve_pred16_t p)
315 {
316 return vcvtq_x_s32_f32(a, p);
317 }
318
319 // CHECK-LABEL: @test_vcvtq_x_u16_f16(
320 // CHECK-NEXT: entry:
321 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
322 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
323 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.vcvt.fp.int.predicated.v8i16.v8f16.v8i1(<8 x half> [[A:%.*]], i32 1, <8 x i1> [[TMP1]], <8 x i16> undef)
324 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
325 //
test_vcvtq_x_u16_f16(float16x8_t a,mve_pred16_t p)326 uint16x8_t test_vcvtq_x_u16_f16(float16x8_t a, mve_pred16_t p)
327 {
328 return vcvtq_x_u16_f16(a, p);
329 }
330
331 // CHECK-LABEL: @test_vcvtq_x_u32_f32(
332 // CHECK-NEXT: entry:
333 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
334 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
335 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vcvt.fp.int.predicated.v4i32.v4f32.v4i1(<4 x float> [[A:%.*]], i32 1, <4 x i1> [[TMP1]], <4 x i32> undef)
336 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
337 //
test_vcvtq_x_u32_f32(float32x4_t a,mve_pred16_t p)338 uint32x4_t test_vcvtq_x_u32_f32(float32x4_t a, mve_pred16_t p)
339 {
340 return vcvtq_x_u32_f32(a, p);
341 }
342
343 // CHECK-LABEL: @test_vcvttq_f16_f32(
344 // CHECK-NEXT: entry:
345 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vcvt.narrow(<8 x half> [[A:%.*]], <4 x float> [[B:%.*]], i32 1)
346 // CHECK-NEXT: ret <8 x half> [[TMP0]]
347 //
test_vcvttq_f16_f32(float16x8_t a,float32x4_t b)348 float16x8_t test_vcvttq_f16_f32(float16x8_t a, float32x4_t b)
349 {
350 return vcvttq_f16_f32(a, b);
351 }
352
353 // CHECK-LABEL: @test_vcvttq_m_f16_f32(
354 // CHECK-NEXT: entry:
355 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
356 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
357 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vcvt.narrow.predicated(<8 x half> [[A:%.*]], <4 x float> [[B:%.*]], i32 1, <4 x i1> [[TMP1]])
358 // CHECK-NEXT: ret <8 x half> [[TMP2]]
359 //
test_vcvttq_m_f16_f32(float16x8_t a,float32x4_t b,mve_pred16_t p)360 float16x8_t test_vcvttq_m_f16_f32(float16x8_t a, float32x4_t b, mve_pred16_t p)
361 {
362 return vcvttq_m_f16_f32(a, b, p);
363 }
364
365 // CHECK-LABEL: @test_vcvtq_n_f16_s16(
366 // CHECK-NEXT: entry:
367 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vcvt.fix.v8f16.v8i16(i32 0, <8 x i16> [[A:%.*]], i32 1)
368 // CHECK-NEXT: ret <8 x half> [[TMP0]]
369 //
test_vcvtq_n_f16_s16(int16x8_t a)370 float16x8_t test_vcvtq_n_f16_s16(int16x8_t a)
371 {
372 #ifdef POLYMORPHIC
373 return vcvtq_n(a, 1);
374 #else
375 return vcvtq_n_f16_s16(a, 1);
376 #endif
377 }
378
379 // CHECK-LABEL: @test_vcvtq_n_f16_u16(
380 // CHECK-NEXT: entry:
381 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vcvt.fix.v8f16.v8i16(i32 1, <8 x i16> [[A:%.*]], i32 2)
382 // CHECK-NEXT: ret <8 x half> [[TMP0]]
383 //
test_vcvtq_n_f16_u16(uint16x8_t a)384 float16x8_t test_vcvtq_n_f16_u16(uint16x8_t a)
385 {
386 #ifdef POLYMORPHIC
387 return vcvtq_n(a, 2);
388 #else
389 return vcvtq_n_f16_u16(a, 2);
390 #endif
391 }
392
393 // CHECK-LABEL: @test_vcvtq_n_f32_s32(
394 // CHECK-NEXT: entry:
395 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vcvt.fix.v4f32.v4i32(i32 0, <4 x i32> [[A:%.*]], i32 3)
396 // CHECK-NEXT: ret <4 x float> [[TMP0]]
397 //
test_vcvtq_n_f32_s32(int32x4_t a)398 float32x4_t test_vcvtq_n_f32_s32(int32x4_t a)
399 {
400 #ifdef POLYMORPHIC
401 return vcvtq_n(a, 3);
402 #else
403 return vcvtq_n_f32_s32(a, 3);
404 #endif
405 }
406
407 // CHECK-LABEL: @test_vcvtq_n_f32_u32(
408 // CHECK-NEXT: entry:
409 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vcvt.fix.v4f32.v4i32(i32 1, <4 x i32> [[A:%.*]], i32 32)
410 // CHECK-NEXT: ret <4 x float> [[TMP0]]
411 //
test_vcvtq_n_f32_u32(uint32x4_t a)412 float32x4_t test_vcvtq_n_f32_u32(uint32x4_t a)
413 {
414 #ifdef POLYMORPHIC
415 return vcvtq_n(a, 32);
416 #else
417 return vcvtq_n_f32_u32(a, 32);
418 #endif
419 }
420
421 // CHECK-LABEL: @test_vcvtq_n_s16_f16(
422 // CHECK-NEXT: entry:
423 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x i16> @llvm.arm.mve.vcvt.fix.v8i16.v8f16(i32 0, <8 x half> [[A:%.*]], i32 1)
424 // CHECK-NEXT: ret <8 x i16> [[TMP0]]
425 //
test_vcvtq_n_s16_f16(float16x8_t a)426 int16x8_t test_vcvtq_n_s16_f16(float16x8_t a)
427 {
428 return vcvtq_n_s16_f16(a, 1);
429 }
430
431 // CHECK-LABEL: @test_vcvtq_n_u16_f16(
432 // CHECK-NEXT: entry:
433 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x i16> @llvm.arm.mve.vcvt.fix.v8i16.v8f16(i32 1, <8 x half> [[A:%.*]], i32 2)
434 // CHECK-NEXT: ret <8 x i16> [[TMP0]]
435 //
test_vcvtq_n_u16_f16(float16x8_t a)436 uint16x8_t test_vcvtq_n_u16_f16(float16x8_t a)
437 {
438 return vcvtq_n_u16_f16(a, 2);
439 }
440
441 // CHECK-LABEL: @test_vcvtq_n_s32_f32(
442 // CHECK-NEXT: entry:
443 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vcvt.fix.v4i32.v4f32(i32 0, <4 x float> [[A:%.*]], i32 3)
444 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
445 //
test_vcvtq_n_s32_f32(float32x4_t a)446 int32x4_t test_vcvtq_n_s32_f32(float32x4_t a)
447 {
448 return vcvtq_n_s32_f32(a, 3);
449 }
450
451 // CHECK-LABEL: @test_vcvtq_n_u32_f32(
452 // CHECK-NEXT: entry:
453 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vcvt.fix.v4i32.v4f32(i32 1, <4 x float> [[A:%.*]], i32 32)
454 // CHECK-NEXT: ret <4 x i32> [[TMP0]]
455 //
test_vcvtq_n_u32_f32(float32x4_t a)456 uint32x4_t test_vcvtq_n_u32_f32(float32x4_t a)
457 {
458 return vcvtq_n_u32_f32(a, 32);
459 }
460
461 // CHECK-LABEL: @test_vcvtq_m_n_f16_s16(
462 // CHECK-NEXT: entry:
463 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
464 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
465 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vcvt.fix.predicated.v8f16.v8i16.v8i1(i32 0, <8 x half> [[INACTIVE:%.*]], <8 x i16> [[A:%.*]], i32 1, <8 x i1> [[TMP1]])
466 // CHECK-NEXT: ret <8 x half> [[TMP2]]
467 //
test_vcvtq_m_n_f16_s16(float16x8_t inactive,int16x8_t a,mve_pred16_t p)468 float16x8_t test_vcvtq_m_n_f16_s16(float16x8_t inactive, int16x8_t a, mve_pred16_t p)
469 {
470 #ifdef POLYMORPHIC
471 return vcvtq_m_n(inactive, a, 1, p);
472 #else
473 return vcvtq_m_n_f16_s16(inactive, a, 1, p);
474 #endif
475 }
476
477 // CHECK-LABEL: @test_vcvtq_m_n_f16_u16(
478 // CHECK-NEXT: entry:
479 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
480 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
481 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vcvt.fix.predicated.v8f16.v8i16.v8i1(i32 1, <8 x half> [[INACTIVE:%.*]], <8 x i16> [[A:%.*]], i32 2, <8 x i1> [[TMP1]])
482 // CHECK-NEXT: ret <8 x half> [[TMP2]]
483 //
test_vcvtq_m_n_f16_u16(float16x8_t inactive,uint16x8_t a,mve_pred16_t p)484 float16x8_t test_vcvtq_m_n_f16_u16(float16x8_t inactive, uint16x8_t a, mve_pred16_t p)
485 {
486 #ifdef POLYMORPHIC
487 return vcvtq_m_n(inactive, a, 2, p);
488 #else
489 return vcvtq_m_n_f16_u16(inactive, a, 2, p);
490 #endif
491 }
492
493 // CHECK-LABEL: @test_vcvtq_m_n_f32_s32(
494 // CHECK-NEXT: entry:
495 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
496 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
497 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcvt.fix.predicated.v4f32.v4i32.v4i1(i32 0, <4 x float> [[INACTIVE:%.*]], <4 x i32> [[A:%.*]], i32 3, <4 x i1> [[TMP1]])
498 // CHECK-NEXT: ret <4 x float> [[TMP2]]
499 //
test_vcvtq_m_n_f32_s32(float32x4_t inactive,int32x4_t a,mve_pred16_t p)500 float32x4_t test_vcvtq_m_n_f32_s32(float32x4_t inactive, int32x4_t a, mve_pred16_t p)
501 {
502 #ifdef POLYMORPHIC
503 return vcvtq_m_n(inactive, a, 3, p);
504 #else
505 return vcvtq_m_n_f32_s32(inactive, a, 3, p);
506 #endif
507 }
508
509 // CHECK-LABEL: @test_vcvtq_m_n_f32_u32(
510 // CHECK-NEXT: entry:
511 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
512 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
513 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcvt.fix.predicated.v4f32.v4i32.v4i1(i32 1, <4 x float> [[INACTIVE:%.*]], <4 x i32> [[A:%.*]], i32 32, <4 x i1> [[TMP1]])
514 // CHECK-NEXT: ret <4 x float> [[TMP2]]
515 //
test_vcvtq_m_n_f32_u32(float32x4_t inactive,uint32x4_t a,mve_pred16_t p)516 float32x4_t test_vcvtq_m_n_f32_u32(float32x4_t inactive, uint32x4_t a, mve_pred16_t p)
517 {
518 #ifdef POLYMORPHIC
519 return vcvtq_m_n(inactive, a, 32, p);
520 #else
521 return vcvtq_m_n_f32_u32(inactive, a, 32, p);
522 #endif
523 }
524
525 // CHECK-LABEL: @test_vcvtq_m_n_s16_f16(
526 // CHECK-NEXT: entry:
527 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
528 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
529 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.vcvt.fix.predicated.v8i16.v8f16.v8i1(i32 0, <8 x i16> [[INACTIVE:%.*]], <8 x half> [[A:%.*]], i32 1, <8 x i1> [[TMP1]])
530 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
531 //
test_vcvtq_m_n_s16_f16(int16x8_t inactive,float16x8_t a,mve_pred16_t p)532 int16x8_t test_vcvtq_m_n_s16_f16(int16x8_t inactive, float16x8_t a, mve_pred16_t p)
533 {
534 #ifdef POLYMORPHIC
535 return vcvtq_m_n(inactive, a, 1, p);
536 #else
537 return vcvtq_m_n_s16_f16(inactive, a, 1, p);
538 #endif
539 }
540
541 // CHECK-LABEL: @test_vcvtq_m_n_u16_f16(
542 // CHECK-NEXT: entry:
543 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
544 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
545 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.vcvt.fix.predicated.v8i16.v8f16.v8i1(i32 1, <8 x i16> [[INACTIVE:%.*]], <8 x half> [[A:%.*]], i32 2, <8 x i1> [[TMP1]])
546 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
547 //
test_vcvtq_m_n_u16_f16(uint16x8_t inactive,float16x8_t a,mve_pred16_t p)548 uint16x8_t test_vcvtq_m_n_u16_f16(uint16x8_t inactive, float16x8_t a, mve_pred16_t p)
549 {
550 #ifdef POLYMORPHIC
551 return vcvtq_m_n(inactive, a, 2, p);
552 #else
553 return vcvtq_m_n_u16_f16(inactive, a, 2, p);
554 #endif
555 }
556
557 // CHECK-LABEL: @test_vcvtq_m_n_s32_f32(
558 // CHECK-NEXT: entry:
559 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
560 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
561 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vcvt.fix.predicated.v4i32.v4f32.v4i1(i32 0, <4 x i32> [[INACTIVE:%.*]], <4 x float> [[A:%.*]], i32 3, <4 x i1> [[TMP1]])
562 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
563 //
test_vcvtq_m_n_s32_f32(int32x4_t inactive,float32x4_t a,mve_pred16_t p)564 int32x4_t test_vcvtq_m_n_s32_f32(int32x4_t inactive, float32x4_t a, mve_pred16_t p)
565 {
566 #ifdef POLYMORPHIC
567 return vcvtq_m_n(inactive, a, 3, p);
568 #else
569 return vcvtq_m_n_s32_f32(inactive, a, 3, p);
570 #endif
571 }
572
573 // CHECK-LABEL: @test_vcvtq_m_n_u32_f32(
574 // CHECK-NEXT: entry:
575 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
576 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
577 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vcvt.fix.predicated.v4i32.v4f32.v4i1(i32 1, <4 x i32> [[INACTIVE:%.*]], <4 x float> [[A:%.*]], i32 32, <4 x i1> [[TMP1]])
578 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
579 //
test_vcvtq_m_n_u32_f32(uint32x4_t inactive,float32x4_t a,mve_pred16_t p)580 uint32x4_t test_vcvtq_m_n_u32_f32(uint32x4_t inactive, float32x4_t a, mve_pred16_t p)
581 {
582 #ifdef POLYMORPHIC
583 return vcvtq_m_n(inactive, a, 32, p);
584 #else
585 return vcvtq_m_n_u32_f32(inactive, a, 32, p);
586 #endif
587 }
588
589 // CHECK-LABEL: @test_vcvtq_x_n_f16_s16(
590 // CHECK-NEXT: entry:
591 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
592 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
593 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vcvt.fix.predicated.v8f16.v8i16.v8i1(i32 0, <8 x half> undef, <8 x i16> [[A:%.*]], i32 1, <8 x i1> [[TMP1]])
594 // CHECK-NEXT: ret <8 x half> [[TMP2]]
595 //
test_vcvtq_x_n_f16_s16(int16x8_t a,mve_pred16_t p)596 float16x8_t test_vcvtq_x_n_f16_s16(int16x8_t a, mve_pred16_t p)
597 {
598 #ifdef POLYMORPHIC
599 return vcvtq_x_n(a, 1, p);
600 #else
601 return vcvtq_x_n_f16_s16(a, 1, p);
602 #endif
603 }
604
605 // CHECK-LABEL: @test_vcvtq_x_n_f16_u16(
606 // CHECK-NEXT: entry:
607 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
608 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
609 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vcvt.fix.predicated.v8f16.v8i16.v8i1(i32 1, <8 x half> undef, <8 x i16> [[A:%.*]], i32 2, <8 x i1> [[TMP1]])
610 // CHECK-NEXT: ret <8 x half> [[TMP2]]
611 //
test_vcvtq_x_n_f16_u16(uint16x8_t a,mve_pred16_t p)612 float16x8_t test_vcvtq_x_n_f16_u16(uint16x8_t a, mve_pred16_t p)
613 {
614 #ifdef POLYMORPHIC
615 return vcvtq_x_n(a, 2, p);
616 #else
617 return vcvtq_x_n_f16_u16(a, 2, p);
618 #endif
619 }
620
621 // CHECK-LABEL: @test_vcvtq_x_n_f32_s32(
622 // CHECK-NEXT: entry:
623 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
624 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
625 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcvt.fix.predicated.v4f32.v4i32.v4i1(i32 0, <4 x float> undef, <4 x i32> [[A:%.*]], i32 3, <4 x i1> [[TMP1]])
626 // CHECK-NEXT: ret <4 x float> [[TMP2]]
627 //
test_vcvtq_x_n_f32_s32(int32x4_t a,mve_pred16_t p)628 float32x4_t test_vcvtq_x_n_f32_s32(int32x4_t a, mve_pred16_t p)
629 {
630 #ifdef POLYMORPHIC
631 return vcvtq_x_n(a, 3, p);
632 #else
633 return vcvtq_x_n_f32_s32(a, 3, p);
634 #endif
635 }
636
637 // CHECK-LABEL: @test_vcvtq_x_n_f32_u32(
638 // CHECK-NEXT: entry:
639 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
640 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
641 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcvt.fix.predicated.v4f32.v4i32.v4i1(i32 1, <4 x float> undef, <4 x i32> [[A:%.*]], i32 32, <4 x i1> [[TMP1]])
642 // CHECK-NEXT: ret <4 x float> [[TMP2]]
643 //
test_vcvtq_x_n_f32_u32(uint32x4_t a,mve_pred16_t p)644 float32x4_t test_vcvtq_x_n_f32_u32(uint32x4_t a, mve_pred16_t p)
645 {
646 #ifdef POLYMORPHIC
647 return vcvtq_x_n(a, 32, p);
648 #else
649 return vcvtq_x_n_f32_u32(a, 32, p);
650 #endif
651 }
652
653 // CHECK-LABEL: @test_vcvtq_x_n_s16_f16(
654 // CHECK-NEXT: entry:
655 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
656 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
657 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.vcvt.fix.predicated.v8i16.v8f16.v8i1(i32 0, <8 x i16> undef, <8 x half> [[A:%.*]], i32 1, <8 x i1> [[TMP1]])
658 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
659 //
test_vcvtq_x_n_s16_f16(float16x8_t a,mve_pred16_t p)660 int16x8_t test_vcvtq_x_n_s16_f16(float16x8_t a, mve_pred16_t p)
661 {
662 return vcvtq_x_n_s16_f16(a, 1, p);
663 }
664
665 // CHECK-LABEL: @test_vcvtq_x_n_u16_f16(
666 // CHECK-NEXT: entry:
667 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
668 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
669 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.vcvt.fix.predicated.v8i16.v8f16.v8i1(i32 1, <8 x i16> undef, <8 x half> [[A:%.*]], i32 2, <8 x i1> [[TMP1]])
670 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
671 //
test_vcvtq_x_n_u16_f16(float16x8_t a,mve_pred16_t p)672 uint16x8_t test_vcvtq_x_n_u16_f16(float16x8_t a, mve_pred16_t p)
673 {
674 return vcvtq_x_n_u16_f16(a, 2, p);
675 }
676
677 // CHECK-LABEL: @test_vcvtq_x_n_s32_f32(
678 // CHECK-NEXT: entry:
679 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
680 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
681 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vcvt.fix.predicated.v4i32.v4f32.v4i1(i32 0, <4 x i32> undef, <4 x float> [[A:%.*]], i32 3, <4 x i1> [[TMP1]])
682 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
683 //
test_vcvtq_x_n_s32_f32(float32x4_t a,mve_pred16_t p)684 int32x4_t test_vcvtq_x_n_s32_f32(float32x4_t a, mve_pred16_t p)
685 {
686 return vcvtq_x_n_s32_f32(a, 3, p);
687 }
688
689 // CHECK-LABEL: @test_vcvtq_x_n_u32_f32(
690 // CHECK-NEXT: entry:
691 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
692 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
693 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vcvt.fix.predicated.v4i32.v4f32.v4i1(i32 1, <4 x i32> undef, <4 x float> [[A:%.*]], i32 32, <4 x i1> [[TMP1]])
694 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
695 //
test_vcvtq_x_n_u32_f32(float32x4_t a,mve_pred16_t p)696 uint32x4_t test_vcvtq_x_n_u32_f32(float32x4_t a, mve_pred16_t p)
697 {
698 return vcvtq_x_n_u32_f32(a, 32, p);
699 }
700
701 // CHECK-LABEL: @test_vcvtbq_f32_f16(
702 // CHECK-NEXT: entry:
703 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vcvt.widen(<8 x half> [[A:%.*]], i32 0)
704 // CHECK-NEXT: ret <4 x float> [[TMP0]]
705 //
test_vcvtbq_f32_f16(float16x8_t a)706 float32x4_t test_vcvtbq_f32_f16(float16x8_t a)
707 {
708 return vcvtbq_f32_f16(a);
709 }
710
711 // CHECK-LABEL: @test_vcvttq_f32_f16(
712 // CHECK-NEXT: entry:
713 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vcvt.widen(<8 x half> [[A:%.*]], i32 1)
714 // CHECK-NEXT: ret <4 x float> [[TMP0]]
715 //
test_vcvttq_f32_f16(float16x8_t a)716 float32x4_t test_vcvttq_f32_f16(float16x8_t a)
717 {
718 return vcvttq_f32_f16(a);
719 }
720
721 // CHECK-LABEL: @test_vcvtbq_m_f32_f16(
722 // CHECK-NEXT: entry:
723 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
724 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
725 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcvt.widen.predicated(<4 x float> [[INACTIVE:%.*]], <8 x half> [[A:%.*]], i32 0, <4 x i1> [[TMP1]])
726 // CHECK-NEXT: ret <4 x float> [[TMP2]]
727 //
test_vcvtbq_m_f32_f16(float32x4_t inactive,float16x8_t a,mve_pred16_t p)728 float32x4_t test_vcvtbq_m_f32_f16(float32x4_t inactive, float16x8_t a, mve_pred16_t p)
729 {
730 return vcvtbq_m_f32_f16(inactive, a, p);
731 }
732
733 // CHECK-LABEL: @test_vcvttq_m_f32_f16(
734 // CHECK-NEXT: entry:
735 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
736 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
737 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcvt.widen.predicated(<4 x float> [[INACTIVE:%.*]], <8 x half> [[A:%.*]], i32 1, <4 x i1> [[TMP1]])
738 // CHECK-NEXT: ret <4 x float> [[TMP2]]
739 //
test_vcvttq_m_f32_f16(float32x4_t inactive,float16x8_t a,mve_pred16_t p)740 float32x4_t test_vcvttq_m_f32_f16(float32x4_t inactive, float16x8_t a, mve_pred16_t p)
741 {
742 return vcvttq_m_f32_f16(inactive, a, p);
743 }
744
745 // CHECK-LABEL: @test_vcvtbq_x_f32_f16(
746 // CHECK-NEXT: entry:
747 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
748 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
749 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcvt.widen.predicated(<4 x float> undef, <8 x half> [[A:%.*]], i32 0, <4 x i1> [[TMP1]])
750 // CHECK-NEXT: ret <4 x float> [[TMP2]]
751 //
test_vcvtbq_x_f32_f16(float16x8_t a,mve_pred16_t p)752 float32x4_t test_vcvtbq_x_f32_f16(float16x8_t a, mve_pred16_t p)
753 {
754 return vcvtbq_x_f32_f16(a, p);
755 }
756
757 // CHECK-LABEL: @test_vcvttq_x_f32_f16(
758 // CHECK-NEXT: entry:
759 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
760 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
761 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcvt.widen.predicated(<4 x float> undef, <8 x half> [[A:%.*]], i32 1, <4 x i1> [[TMP1]])
762 // CHECK-NEXT: ret <4 x float> [[TMP2]]
763 //
test_vcvttq_x_f32_f16(float16x8_t a,mve_pred16_t p)764 float32x4_t test_vcvttq_x_f32_f16(float16x8_t a, mve_pred16_t p)
765 {
766 return vcvttq_x_f32_f16(a, p);
767 }
768