1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
3 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
4 
5 #include <arm_mve.h>
6 
7 // CHECK-LABEL: @test_vhsubq_u8(
8 // CHECK-NEXT:  entry:
9 // CHECK-NEXT:    [[TMP0:%.*]] = call <16 x i8> @llvm.arm.mve.vhsub.v16i8(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], i32 1)
10 // CHECK-NEXT:    ret <16 x i8> [[TMP0]]
11 //
test_vhsubq_u8(uint8x16_t a,uint8x16_t b)12 uint8x16_t test_vhsubq_u8(uint8x16_t a, uint8x16_t b)
13 {
14 #ifdef POLYMORPHIC
15     return vhsubq(a, b);
16 #else /* POLYMORPHIC */
17     return vhsubq_u8(a, b);
18 #endif /* POLYMORPHIC */
19 }
20 
21 // CHECK-LABEL: @test_vhsubq_s16(
22 // CHECK-NEXT:  entry:
23 // CHECK-NEXT:    [[TMP0:%.*]] = call <8 x i16> @llvm.arm.mve.vhsub.v8i16(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 0)
24 // CHECK-NEXT:    ret <8 x i16> [[TMP0]]
25 //
test_vhsubq_s16(int16x8_t a,int16x8_t b)26 int16x8_t test_vhsubq_s16(int16x8_t a, int16x8_t b)
27 {
28 #ifdef POLYMORPHIC
29     return vhsubq(a, b);
30 #else /* POLYMORPHIC */
31     return vhsubq_s16(a, b);
32 #endif /* POLYMORPHIC */
33 }
34 
35 // CHECK-LABEL: @test_vhsubq_u32(
36 // CHECK-NEXT:  entry:
37 // CHECK-NEXT:    [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vhsub.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 1)
38 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
39 //
test_vhsubq_u32(uint32x4_t a,uint32x4_t b)40 uint32x4_t test_vhsubq_u32(uint32x4_t a, uint32x4_t b)
41 {
42 #ifdef POLYMORPHIC
43     return vhsubq(a, b);
44 #else /* POLYMORPHIC */
45     return vhsubq_u32(a, b);
46 #endif /* POLYMORPHIC */
47 }
48 
49 // CHECK-LABEL: @test_vhsubq_m_s8(
50 // CHECK-NEXT:  entry:
51 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
52 // CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
53 // CHECK-NEXT:    [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.hsub.predicated.v16i8.v16i1(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], i32 0, <16 x i1> [[TMP1]], <16 x i8> [[INACTIVE:%.*]])
54 // CHECK-NEXT:    ret <16 x i8> [[TMP2]]
55 //
test_vhsubq_m_s8(int8x16_t inactive,int8x16_t a,int8x16_t b,mve_pred16_t p)56 int8x16_t test_vhsubq_m_s8(int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
57 {
58 #ifdef POLYMORPHIC
59     return vhsubq_m(inactive, a, b, p);
60 #else /* POLYMORPHIC */
61     return vhsubq_m_s8(inactive, a, b, p);
62 #endif /* POLYMORPHIC */
63 }
64 
65 // CHECK-LABEL: @test_vhsubq_m_u16(
66 // CHECK-NEXT:  entry:
67 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
68 // CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
69 // CHECK-NEXT:    [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.hsub.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 1, <8 x i1> [[TMP1]], <8 x i16> [[INACTIVE:%.*]])
70 // CHECK-NEXT:    ret <8 x i16> [[TMP2]]
71 //
test_vhsubq_m_u16(uint16x8_t inactive,uint16x8_t a,uint16x8_t b,mve_pred16_t p)72 uint16x8_t test_vhsubq_m_u16(uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
73 {
74 #ifdef POLYMORPHIC
75     return vhsubq_m(inactive, a, b, p);
76 #else /* POLYMORPHIC */
77     return vhsubq_m_u16(inactive, a, b, p);
78 #endif /* POLYMORPHIC */
79 }
80 
81 // CHECK-LABEL: @test_vhsubq_m_s32(
82 // CHECK-NEXT:  entry:
83 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
84 // CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
85 // CHECK-NEXT:    [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.hsub.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 0, <4 x i1> [[TMP1]], <4 x i32> [[INACTIVE:%.*]])
86 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
87 //
test_vhsubq_m_s32(int32x4_t inactive,int32x4_t a,int32x4_t b,mve_pred16_t p)88 int32x4_t test_vhsubq_m_s32(int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
89 {
90 #ifdef POLYMORPHIC
91     return vhsubq_m(inactive, a, b, p);
92 #else /* POLYMORPHIC */
93     return vhsubq_m_s32(inactive, a, b, p);
94 #endif /* POLYMORPHIC */
95 }
96 
97 // CHECK-LABEL: @test_vhsubq_n_u8(
98 // CHECK-NEXT:  entry:
99 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <16 x i8> undef, i8 [[B:%.*]], i32 0
100 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <16 x i8> [[DOTSPLATINSERT]], <16 x i8> undef, <16 x i32> zeroinitializer
101 // CHECK-NEXT:    [[TMP0:%.*]] = call <16 x i8> @llvm.arm.mve.vhsub.v16i8(<16 x i8> [[A:%.*]], <16 x i8> [[DOTSPLAT]], i32 1)
102 // CHECK-NEXT:    ret <16 x i8> [[TMP0]]
103 //
test_vhsubq_n_u8(uint8x16_t a,uint8_t b)104 uint8x16_t test_vhsubq_n_u8(uint8x16_t a, uint8_t b)
105 {
106 #ifdef POLYMORPHIC
107     return vhsubq(a, b);
108 #else /* POLYMORPHIC */
109     return vhsubq_n_u8(a, b);
110 #endif /* POLYMORPHIC */
111 }
112 
113 // CHECK-LABEL: @test_vhsubq_n_s16(
114 // CHECK-NEXT:  entry:
115 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <8 x i16> undef, i16 [[B:%.*]], i32 0
116 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <8 x i16> [[DOTSPLATINSERT]], <8 x i16> undef, <8 x i32> zeroinitializer
117 // CHECK-NEXT:    [[TMP0:%.*]] = call <8 x i16> @llvm.arm.mve.vhsub.v8i16(<8 x i16> [[A:%.*]], <8 x i16> [[DOTSPLAT]], i32 0)
118 // CHECK-NEXT:    ret <8 x i16> [[TMP0]]
119 //
test_vhsubq_n_s16(int16x8_t a,int16_t b)120 int16x8_t test_vhsubq_n_s16(int16x8_t a, int16_t b)
121 {
122 #ifdef POLYMORPHIC
123     return vhsubq(a, b);
124 #else /* POLYMORPHIC */
125     return vhsubq_n_s16(a, b);
126 #endif /* POLYMORPHIC */
127 }
128 
129 // CHECK-LABEL: @test_vhsubq_n_u32(
130 // CHECK-NEXT:  entry:
131 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> undef, i32 [[B:%.*]], i32 0
132 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <4 x i32> [[DOTSPLATINSERT]], <4 x i32> undef, <4 x i32> zeroinitializer
133 // CHECK-NEXT:    [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vhsub.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[DOTSPLAT]], i32 1)
134 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
135 //
test_vhsubq_n_u32(uint32x4_t a,uint32_t b)136 uint32x4_t test_vhsubq_n_u32(uint32x4_t a, uint32_t b)
137 {
138 #ifdef POLYMORPHIC
139     return vhsubq(a, b);
140 #else /* POLYMORPHIC */
141     return vhsubq_n_u32(a, b);
142 #endif /* POLYMORPHIC */
143 }
144 
145 // CHECK-LABEL: @test_vhsubq_m_n_s8(
146 // CHECK-NEXT:  entry:
147 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <16 x i8> undef, i8 [[B:%.*]], i32 0
148 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <16 x i8> [[DOTSPLATINSERT]], <16 x i8> undef, <16 x i32> zeroinitializer
149 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
150 // CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
151 // CHECK-NEXT:    [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.hsub.predicated.v16i8.v16i1(<16 x i8> [[A:%.*]], <16 x i8> [[DOTSPLAT]], i32 0, <16 x i1> [[TMP1]], <16 x i8> [[INACTIVE:%.*]])
152 // CHECK-NEXT:    ret <16 x i8> [[TMP2]]
153 //
test_vhsubq_m_n_s8(int8x16_t inactive,int8x16_t a,int8_t b,mve_pred16_t p)154 int8x16_t test_vhsubq_m_n_s8(int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
155 {
156 #ifdef POLYMORPHIC
157     return vhsubq_m(inactive, a, b, p);
158 #else /* POLYMORPHIC */
159     return vhsubq_m_n_s8(inactive, a, b, p);
160 #endif /* POLYMORPHIC */
161 }
162 
163 // CHECK-LABEL: @test_vhsubq_m_n_u16(
164 // CHECK-NEXT:  entry:
165 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <8 x i16> undef, i16 [[B:%.*]], i32 0
166 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <8 x i16> [[DOTSPLATINSERT]], <8 x i16> undef, <8 x i32> zeroinitializer
167 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
168 // CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
169 // CHECK-NEXT:    [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.hsub.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], <8 x i16> [[DOTSPLAT]], i32 1, <8 x i1> [[TMP1]], <8 x i16> [[INACTIVE:%.*]])
170 // CHECK-NEXT:    ret <8 x i16> [[TMP2]]
171 //
test_vhsubq_m_n_u16(uint16x8_t inactive,uint16x8_t a,uint16_t b,mve_pred16_t p)172 uint16x8_t test_vhsubq_m_n_u16(uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
173 {
174 #ifdef POLYMORPHIC
175     return vhsubq_m(inactive, a, b, p);
176 #else /* POLYMORPHIC */
177     return vhsubq_m_n_u16(inactive, a, b, p);
178 #endif /* POLYMORPHIC */
179 }
180 
181 // CHECK-LABEL: @test_vhsubq_m_n_s32(
182 // CHECK-NEXT:  entry:
183 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> undef, i32 [[B:%.*]], i32 0
184 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <4 x i32> [[DOTSPLATINSERT]], <4 x i32> undef, <4 x i32> zeroinitializer
185 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
186 // CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
187 // CHECK-NEXT:    [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.hsub.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], <4 x i32> [[DOTSPLAT]], i32 0, <4 x i1> [[TMP1]], <4 x i32> [[INACTIVE:%.*]])
188 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
189 //
test_vhsubq_m_n_s32(int32x4_t inactive,int32x4_t a,int32_t b,mve_pred16_t p)190 int32x4_t test_vhsubq_m_n_s32(int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
191 {
192 #ifdef POLYMORPHIC
193     return vhsubq_m(inactive, a, b, p);
194 #else /* POLYMORPHIC */
195     return vhsubq_m_n_s32(inactive, a, b, p);
196 #endif /* POLYMORPHIC */
197 }
198 
199 // CHECK-LABEL: @test_vhsubq_x_n_u8(
200 // CHECK-NEXT:  entry:
201 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <16 x i8> undef, i8 [[B:%.*]], i32 0
202 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <16 x i8> [[DOTSPLATINSERT]], <16 x i8> undef, <16 x i32> zeroinitializer
203 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
204 // CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
205 // CHECK-NEXT:    [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.hsub.predicated.v16i8.v16i1(<16 x i8> [[A:%.*]], <16 x i8> [[DOTSPLAT]], i32 1, <16 x i1> [[TMP1]], <16 x i8> undef)
206 // CHECK-NEXT:    ret <16 x i8> [[TMP2]]
207 //
test_vhsubq_x_n_u8(uint8x16_t a,uint8_t b,mve_pred16_t p)208 uint8x16_t test_vhsubq_x_n_u8(uint8x16_t a, uint8_t b, mve_pred16_t p)
209 {
210 #ifdef POLYMORPHIC
211     return vhsubq_x(a, b, p);
212 #else /* POLYMORPHIC */
213     return vhsubq_x_n_u8(a, b, p);
214 #endif /* POLYMORPHIC */
215 }
216 
217 // CHECK-LABEL: @test_vhsubq_x_n_s16(
218 // CHECK-NEXT:  entry:
219 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <8 x i16> undef, i16 [[B:%.*]], i32 0
220 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <8 x i16> [[DOTSPLATINSERT]], <8 x i16> undef, <8 x i32> zeroinitializer
221 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
222 // CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
223 // CHECK-NEXT:    [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.hsub.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], <8 x i16> [[DOTSPLAT]], i32 0, <8 x i1> [[TMP1]], <8 x i16> undef)
224 // CHECK-NEXT:    ret <8 x i16> [[TMP2]]
225 //
test_vhsubq_x_n_s16(int16x8_t a,int16_t b,mve_pred16_t p)226 int16x8_t test_vhsubq_x_n_s16(int16x8_t a, int16_t b, mve_pred16_t p)
227 {
228 #ifdef POLYMORPHIC
229     return vhsubq_x(a, b, p);
230 #else /* POLYMORPHIC */
231     return vhsubq_x_n_s16(a, b, p);
232 #endif /* POLYMORPHIC */
233 }
234 
235 // CHECK-LABEL: @test_vhsubq_x_n_u32(
236 // CHECK-NEXT:  entry:
237 // CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> undef, i32 [[B:%.*]], i32 0
238 // CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <4 x i32> [[DOTSPLATINSERT]], <4 x i32> undef, <4 x i32> zeroinitializer
239 // CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
240 // CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
241 // CHECK-NEXT:    [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.hsub.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], <4 x i32> [[DOTSPLAT]], i32 1, <4 x i1> [[TMP1]], <4 x i32> undef)
242 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
243 //
test_vhsubq_x_n_u32(uint32x4_t a,uint32_t b,mve_pred16_t p)244 uint32x4_t test_vhsubq_x_n_u32(uint32x4_t a, uint32_t b, mve_pred16_t p)
245 {
246 #ifdef POLYMORPHIC
247     return vhsubq_x(a, b, p);
248 #else /* POLYMORPHIC */
249     return vhsubq_x_n_u32(a, b, p);
250 #endif /* POLYMORPHIC */
251 }
252