1 //===-- RegisterContextLinux_mips.cpp -------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===---------------------------------------------------------------------===//
8
9 #include <stddef.h>
10 #include <vector>
11
12 // For eh_frame and DWARF Register numbers
13 #include "RegisterContextLinux_mips.h"
14
15 // Internal codes for mips registers
16 #include "lldb-mips-linux-register-enums.h"
17
18 // For GP and FP buffers
19 #include "RegisterContext_mips.h"
20
21 using namespace lldb_private;
22 using namespace lldb;
23
24 // Include RegisterInfos_mips to declare our g_register_infos_mips structure.
25 #define DECLARE_REGISTER_INFOS_MIPS_STRUCT
26 #include "RegisterInfos_mips.h"
27 #undef DECLARE_REGISTER_INFOS_MIPS_STRUCT
28
29 // mips general purpose registers.
30 const uint32_t g_gp_regnums_mips[] = {
31 gpr_zero_mips, gpr_r1_mips, gpr_r2_mips, gpr_r3_mips,
32 gpr_r4_mips, gpr_r5_mips, gpr_r6_mips, gpr_r7_mips,
33 gpr_r8_mips, gpr_r9_mips, gpr_r10_mips, gpr_r11_mips,
34 gpr_r12_mips, gpr_r13_mips, gpr_r14_mips, gpr_r15_mips,
35 gpr_r16_mips, gpr_r17_mips, gpr_r18_mips, gpr_r19_mips,
36 gpr_r20_mips, gpr_r21_mips, gpr_r22_mips, gpr_r23_mips,
37 gpr_r24_mips, gpr_r25_mips, gpr_r26_mips, gpr_r27_mips,
38 gpr_gp_mips, gpr_sp_mips, gpr_r30_mips, gpr_ra_mips,
39 gpr_sr_mips, gpr_mullo_mips, gpr_mulhi_mips, gpr_badvaddr_mips,
40 gpr_cause_mips, gpr_pc_mips, gpr_config5_mips,
41 LLDB_INVALID_REGNUM // register sets need to end with this flag
42 };
43
44 static_assert((sizeof(g_gp_regnums_mips) / sizeof(g_gp_regnums_mips[0])) - 1 ==
45 k_num_gpr_registers_mips,
46 "g_gp_regnums_mips has wrong number of register infos");
47 // mips floating point registers.
48 const uint32_t g_fp_regnums_mips[] = {
49 fpr_f0_mips, fpr_f1_mips, fpr_f2_mips, fpr_f3_mips,
50 fpr_f4_mips, fpr_f5_mips, fpr_f6_mips, fpr_f7_mips,
51 fpr_f8_mips, fpr_f9_mips, fpr_f10_mips, fpr_f11_mips,
52 fpr_f12_mips, fpr_f13_mips, fpr_f14_mips, fpr_f15_mips,
53 fpr_f16_mips, fpr_f17_mips, fpr_f18_mips, fpr_f19_mips,
54 fpr_f20_mips, fpr_f21_mips, fpr_f22_mips, fpr_f23_mips,
55 fpr_f24_mips, fpr_f25_mips, fpr_f26_mips, fpr_f27_mips,
56 fpr_f28_mips, fpr_f29_mips, fpr_f30_mips, fpr_f31_mips,
57 fpr_fcsr_mips, fpr_fir_mips, fpr_config5_mips,
58 LLDB_INVALID_REGNUM // register sets need to end with this flag
59 };
60
61 static_assert((sizeof(g_fp_regnums_mips) / sizeof(g_fp_regnums_mips[0])) - 1 ==
62 k_num_fpr_registers_mips,
63 "g_fp_regnums_mips has wrong number of register infos");
64
65 // mips MSA registers.
66 const uint32_t g_msa_regnums_mips[] = {
67 msa_w0_mips, msa_w1_mips, msa_w2_mips, msa_w3_mips,
68 msa_w4_mips, msa_w5_mips, msa_w6_mips, msa_w7_mips,
69 msa_w8_mips, msa_w9_mips, msa_w10_mips, msa_w11_mips,
70 msa_w12_mips, msa_w13_mips, msa_w14_mips, msa_w15_mips,
71 msa_w16_mips, msa_w17_mips, msa_w18_mips, msa_w19_mips,
72 msa_w20_mips, msa_w21_mips, msa_w22_mips, msa_w23_mips,
73 msa_w24_mips, msa_w25_mips, msa_w26_mips, msa_w27_mips,
74 msa_w28_mips, msa_w29_mips, msa_w30_mips, msa_w31_mips,
75 msa_fcsr_mips, msa_fir_mips, msa_mcsr_mips, msa_mir_mips,
76 msa_config5_mips,
77 LLDB_INVALID_REGNUM // register sets need to end with this flag
78 };
79
80 static_assert((sizeof(g_msa_regnums_mips) / sizeof(g_msa_regnums_mips[0])) -
81 1 ==
82 k_num_msa_registers_mips,
83 "g_msa_regnums_mips has wrong number of register infos");
84
85 // Number of register sets provided by this context.
86 constexpr size_t k_num_register_sets = 3;
87
88 // Register sets for mips.
89 static const RegisterSet g_reg_sets_mips[k_num_register_sets] = {
90 {"General Purpose Registers", "gpr", k_num_gpr_registers_mips,
91 g_gp_regnums_mips},
92 {"Floating Point Registers", "fpu", k_num_fpr_registers_mips,
93 g_fp_regnums_mips},
94 {"MSA Registers", "msa", k_num_msa_registers_mips, g_msa_regnums_mips}};
95
GetUserRegisterInfoCount(bool msa_present)96 uint32_t GetUserRegisterInfoCount(bool msa_present) {
97 if (msa_present)
98 return static_cast<uint32_t>(k_num_user_registers_mips);
99 return static_cast<uint32_t>(k_num_user_registers_mips -
100 k_num_msa_registers_mips);
101 }
102
RegisterContextLinux_mips(const ArchSpec & target_arch,bool msa_present)103 RegisterContextLinux_mips::RegisterContextLinux_mips(
104 const ArchSpec &target_arch, bool msa_present)
105 : RegisterInfoInterface(target_arch),
106 m_user_register_count(GetUserRegisterInfoCount(msa_present)) {}
107
GetGPRSize() const108 size_t RegisterContextLinux_mips::GetGPRSize() const {
109 return sizeof(GPR_linux_mips);
110 }
111
GetRegisterInfo() const112 const RegisterInfo *RegisterContextLinux_mips::GetRegisterInfo() const {
113 switch (m_target_arch.GetMachine()) {
114 case llvm::Triple::mips:
115 case llvm::Triple::mipsel:
116 return g_register_infos_mips;
117 default:
118 assert(false && "Unhandled target architecture.");
119 return nullptr;
120 }
121 }
122
123 const RegisterSet *
GetRegisterSet(size_t set) const124 RegisterContextLinux_mips::GetRegisterSet(size_t set) const {
125 if (set >= k_num_register_sets)
126 return nullptr;
127 switch (m_target_arch.GetMachine()) {
128 case llvm::Triple::mips:
129 case llvm::Triple::mipsel:
130 return &g_reg_sets_mips[set];
131 default:
132 assert(false && "Unhandled target architecture.");
133 return nullptr;
134 }
135 }
136
137 size_t
GetRegisterSetCount() const138 RegisterContextLinux_mips::GetRegisterSetCount() const {
139 return k_num_register_sets;
140 }
141
GetRegisterCount() const142 uint32_t RegisterContextLinux_mips::GetRegisterCount() const {
143 return static_cast<uint32_t>(sizeof(g_register_infos_mips) /
144 sizeof(g_register_infos_mips[0]));
145 }
146
GetUserRegisterCount() const147 uint32_t RegisterContextLinux_mips::GetUserRegisterCount() const {
148 return static_cast<uint32_t>(m_user_register_count);
149 }
150