1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4
5 #include "src/base/cpu.h"
6
7 #if defined(STARBOARD)
8 #include "starboard/cpu_features.h"
9 #endif
10
11 #if V8_LIBC_MSVCRT
12 #include <intrin.h> // __cpuid()
13 #endif
14 #if V8_OS_LINUX
15 #include <linux/auxvec.h> // AT_HWCAP
16 #endif
17 #if V8_GLIBC_PREREQ(2, 16)
18 #include <sys/auxv.h> // getauxval()
19 #endif
20 #if V8_OS_QNX
21 #include <sys/syspage.h> // cpuinfo
22 #endif
23 #if V8_OS_LINUX && (V8_HOST_ARCH_PPC || V8_HOST_ARCH_PPC64)
24 #include <elf.h>
25 #endif
26 #if V8_OS_AIX
27 #include <sys/systemcfg.h> // _system_configuration
28 #ifndef POWER_8
29 #define POWER_8 0x10000
30 #endif
31 #ifndef POWER_9
32 #define POWER_9 0x20000
33 #endif
34 #endif
35 #if V8_OS_POSIX
36 #include <unistd.h> // sysconf()
37 #endif
38
39 #include <ctype.h>
40 #include <limits.h>
41 #include <stdio.h>
42 #include <stdlib.h>
43 #include <string.h>
44 #include <algorithm>
45
46 #include "src/base/logging.h"
47 #if V8_OS_WIN
48 #include "src/base/win32-headers.h" // NOLINT
49 #endif
50
51 namespace v8 {
52 namespace base {
53
54 #if V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64
55
56 // Define __cpuid() for non-MSVC libraries.
57 #if !V8_LIBC_MSVCRT
58
__cpuid(int cpu_info[4],int info_type)59 static V8_INLINE void __cpuid(int cpu_info[4], int info_type) {
60 // Clear ecx to align with __cpuid() of MSVC:
61 // https://msdn.microsoft.com/en-us/library/hskdteyh.aspx
62 #if defined(__i386__) && defined(__pic__)
63 // Make sure to preserve ebx, which contains the pointer
64 // to the GOT in case we're generating PIC.
65 __asm__ volatile(
66 "mov %%ebx, %%edi\n\t"
67 "cpuid\n\t"
68 "xchg %%edi, %%ebx\n\t"
69 : "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]),
70 "=d"(cpu_info[3])
71 : "a"(info_type), "c"(0));
72 #else
73 __asm__ volatile("cpuid \n\t"
74 : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]),
75 "=d"(cpu_info[3])
76 : "a"(info_type), "c"(0));
77 #endif // defined(__i386__) && defined(__pic__)
78 }
79
80 #endif // !V8_LIBC_MSVCRT
81
82 #elif V8_HOST_ARCH_ARM || V8_HOST_ARCH_ARM64 || V8_HOST_ARCH_MIPS || \
83 V8_HOST_ARCH_MIPS64
84
85 #if V8_OS_LINUX
86
87 #if V8_HOST_ARCH_ARM
88
89 // See <uapi/asm/hwcap.h> kernel header.
90 /*
91 * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
92 */
93 #define HWCAP_SWP (1 << 0)
94 #define HWCAP_HALF (1 << 1)
95 #define HWCAP_THUMB (1 << 2)
96 #define HWCAP_26BIT (1 << 3) /* Play it safe */
97 #define HWCAP_FAST_MULT (1 << 4)
98 #define HWCAP_FPA (1 << 5)
99 #define HWCAP_VFP (1 << 6)
100 #define HWCAP_EDSP (1 << 7)
101 #define HWCAP_JAVA (1 << 8)
102 #define HWCAP_IWMMXT (1 << 9)
103 #define HWCAP_CRUNCH (1 << 10)
104 #define HWCAP_THUMBEE (1 << 11)
105 #define HWCAP_NEON (1 << 12)
106 #define HWCAP_VFPv3 (1 << 13)
107 #define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */
108 #define HWCAP_TLS (1 << 15)
109 #define HWCAP_VFPv4 (1 << 16)
110 #define HWCAP_IDIVA (1 << 17)
111 #define HWCAP_IDIVT (1 << 18)
112 #define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */
113 #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
114 #define HWCAP_LPAE (1 << 20)
115
116 #endif // V8_HOST_ARCH_ARM
117
118 #if V8_HOST_ARCH_ARM64
119
120 // See <uapi/asm/hwcap.h> kernel header.
121 /*
122 * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
123 */
124 #define HWCAP_FP (1 << 0)
125 #define HWCAP_ASIMD (1 << 1)
126 #define HWCAP_EVTSTRM (1 << 2)
127 #define HWCAP_AES (1 << 3)
128 #define HWCAP_PMULL (1 << 4)
129 #define HWCAP_SHA1 (1 << 5)
130 #define HWCAP_SHA2 (1 << 6)
131 #define HWCAP_CRC32 (1 << 7)
132 #define HWCAP_ATOMICS (1 << 8)
133 #define HWCAP_FPHP (1 << 9)
134 #define HWCAP_ASIMDHP (1 << 10)
135 #define HWCAP_CPUID (1 << 11)
136 #define HWCAP_ASIMDRDM (1 << 12)
137 #define HWCAP_JSCVT (1 << 13)
138 #define HWCAP_FCMA (1 << 14)
139 #define HWCAP_LRCPC (1 << 15)
140 #define HWCAP_DCPOP (1 << 16)
141 #define HWCAP_SHA3 (1 << 17)
142 #define HWCAP_SM3 (1 << 18)
143 #define HWCAP_SM4 (1 << 19)
144 #define HWCAP_ASIMDDP (1 << 20)
145 #define HWCAP_SHA512 (1 << 21)
146 #define HWCAP_SVE (1 << 22)
147 #define HWCAP_ASIMDFHM (1 << 23)
148 #define HWCAP_DIT (1 << 24)
149 #define HWCAP_USCAT (1 << 25)
150 #define HWCAP_ILRCPC (1 << 26)
151 #define HWCAP_FLAGM (1 << 27)
152 #define HWCAP_SSBS (1 << 28)
153 #define HWCAP_SB (1 << 29)
154 #define HWCAP_PACA (1 << 30)
155 #define HWCAP_PACG (1UL << 31)
156
157 #endif // V8_HOST_ARCH_ARM64
158
159 #if V8_HOST_ARCH_ARM || V8_HOST_ARCH_ARM64
160
161 static uint32_t ReadELFHWCaps() {
162 uint32_t result = 0;
163 #if V8_GLIBC_PREREQ(2, 16)
164 result = static_cast<uint32_t>(getauxval(AT_HWCAP));
165 #else
166 // Read the ELF HWCAP flags by parsing /proc/self/auxv.
167 FILE* fp = fopen("/proc/self/auxv", "r");
168 if (fp != nullptr) {
169 struct {
170 uint32_t tag;
171 uint32_t value;
172 } entry;
173 for (;;) {
174 size_t n = fread(&entry, sizeof(entry), 1, fp);
175 if (n == 0 || (entry.tag == 0 && entry.value == 0)) {
176 break;
177 }
178 if (entry.tag == AT_HWCAP) {
179 result = entry.value;
180 break;
181 }
182 }
183 fclose(fp);
184 }
185 #endif
186 return result;
187 }
188
189 #endif // V8_HOST_ARCH_ARM || V8_HOST_ARCH_ARM64
190
191 #if V8_HOST_ARCH_MIPS
192 int __detect_fp64_mode(void) {
193 double result = 0;
194 // Bit representation of (double)1 is 0x3FF0000000000000.
195 __asm__ volatile(
196 ".set push\n\t"
197 ".set noreorder\n\t"
198 ".set oddspreg\n\t"
199 "lui $t0, 0x3FF0\n\t"
200 "ldc1 $f0, %0\n\t"
201 "mtc1 $t0, $f1\n\t"
202 "sdc1 $f0, %0\n\t"
203 ".set pop\n\t"
204 : "+m"(result)
205 :
206 : "t0", "$f0", "$f1", "memory");
207
208 return !(result == 1);
209 }
210
211
212 int __detect_mips_arch_revision(void) {
213 // TODO(dusmil): Do the specific syscall as soon as it is implemented in mips
214 // kernel.
215 uint32_t result = 0;
216 __asm__ volatile(
217 "move $v0, $zero\n\t"
218 // Encoding for "addi $v0, $v0, 1" on non-r6,
219 // which is encoding for "bovc $v0, %v0, 1" on r6.
220 // Use machine code directly to avoid compilation errors with different
221 // toolchains and maintain compatibility.
222 ".word 0x20420001\n\t"
223 "sw $v0, %0\n\t"
224 : "=m"(result)
225 :
226 : "v0", "memory");
227 // Result is 0 on r6 architectures, 1 on other architecture revisions.
228 // Fall-back to the least common denominator which is mips32 revision 1.
229 return result ? 1 : 6;
230 }
231 #endif // V8_HOST_ARCH_MIPS
232
233 // Extract the information exposed by the kernel via /proc/cpuinfo.
234 class CPUInfo final {
235 public:
236 CPUInfo() : datalen_(0) {
237 // Get the size of the cpuinfo file by reading it until the end. This is
238 // required because files under /proc do not always return a valid size
239 // when using fseek(0, SEEK_END) + ftell(). Nor can the be mmap()-ed.
240 static const char PATHNAME[] = "/proc/cpuinfo";
241 FILE* fp = fopen(PATHNAME, "r");
242 if (fp != nullptr) {
243 for (;;) {
244 char buffer[256];
245 size_t n = fread(buffer, 1, sizeof(buffer), fp);
246 if (n == 0) {
247 break;
248 }
249 datalen_ += n;
250 }
251 fclose(fp);
252 }
253
254 // Read the contents of the cpuinfo file.
255 data_ = new char[datalen_ + 1];
256 fp = fopen(PATHNAME, "r");
257 if (fp != nullptr) {
258 for (size_t offset = 0; offset < datalen_; ) {
259 size_t n = fread(data_ + offset, 1, datalen_ - offset, fp);
260 if (n == 0) {
261 break;
262 }
263 offset += n;
264 }
265 fclose(fp);
266 }
267
268 // Zero-terminate the data.
269 data_[datalen_] = '\0';
270 }
271
272 ~CPUInfo() {
273 delete[] data_;
274 }
275
276 // Extract the content of a the first occurrence of a given field in
277 // the content of the cpuinfo file and return it as a heap-allocated
278 // string that must be freed by the caller using delete[].
279 // Return nullptr if not found.
280 char* ExtractField(const char* field) const {
281 DCHECK_NOT_NULL(field);
282
283 // Look for first field occurrence, and ensure it starts the line.
284 size_t fieldlen = strlen(field);
285 char* p = data_;
286 for (;;) {
287 p = strstr(p, field);
288 if (p == nullptr) {
289 return nullptr;
290 }
291 if (p == data_ || p[-1] == '\n') {
292 break;
293 }
294 p += fieldlen;
295 }
296
297 // Skip to the first colon followed by a space.
298 p = strchr(p + fieldlen, ':');
299 if (p == nullptr || !isspace(p[1])) {
300 return nullptr;
301 }
302 p += 2;
303
304 // Find the end of the line.
305 char* q = strchr(p, '\n');
306 if (q == nullptr) {
307 q = data_ + datalen_;
308 }
309
310 // Copy the line into a heap-allocated buffer.
311 size_t len = q - p;
312 char* result = new char[len + 1];
313 if (result != nullptr) {
314 memcpy(result, p, len);
315 result[len] = '\0';
316 }
317 return result;
318 }
319
320 private:
321 char* data_;
322 size_t datalen_;
323 };
324
325 // Checks that a space-separated list of items contains one given 'item'.
326 static bool HasListItem(const char* list, const char* item) {
327 ssize_t item_len = strlen(item);
328 const char* p = list;
329 if (p != nullptr) {
330 while (*p != '\0') {
331 // Skip whitespace.
332 while (isspace(*p)) ++p;
333
334 // Find end of current list item.
335 const char* q = p;
336 while (*q != '\0' && !isspace(*q)) ++q;
337
338 if (item_len == q - p && memcmp(p, item, item_len) == 0) {
339 return true;
340 }
341
342 // Skip to next item.
343 p = q;
344 }
345 }
346 return false;
347 }
348
349 #endif // V8_OS_LINUX
350
351 #endif // V8_HOST_ARCH_ARM || V8_HOST_ARCH_ARM64 ||
352 // V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
353
354 #if defined(STARBOARD)
355
StarboardDetectCPU()356 bool CPU::StarboardDetectCPU() {
357 #if (SB_API_VERSION >= 11)
358 SbCPUFeatures features;
359 if (!SbCPUFeaturesGet(&features)) {
360 return false;
361 }
362 architecture_ = features.arm.architecture_generation;
363 switch (features.architecture) {
364 case kSbCPUFeaturesArchitectureArm:
365 case kSbCPUFeaturesArchitectureArm64:
366 has_neon_ = features.arm.has_neon;
367 has_thumb2_ = features.arm.has_thumb2;
368 has_vfp_ = features.arm.has_vfp;
369 has_vfp3_ = features.arm.has_vfp3;
370 has_vfp3_d32_ = features.arm.has_vfp3_d32;
371 has_idiva_ = features.arm.has_idiva;
372 break;
373 case kSbCPUFeaturesArchitectureX86:
374 case kSbCPUFeaturesArchitectureX86_64:
375 // Following flags are mandatory for V8
376 has_cmov_ = features.x86.has_cmov;
377 has_sse2_ = features.x86.has_sse2;
378 // These flags are optional
379 has_sse3_ = features.x86.has_sse3;
380 has_ssse3_ = features.x86.has_ssse3;
381 has_sse41_ = features.x86.has_sse41;
382 has_sahf_ = features.x86.has_sahf;
383 has_avx_ = features.x86.has_avx;
384 has_fma3_ = features.x86.has_fma3;
385 has_bmi1_ = features.x86.has_bmi1;
386 has_bmi2_ = features.x86.has_bmi2;
387 has_lzcnt_ = features.x86.has_lzcnt;
388 has_popcnt_ = features.x86.has_popcnt;
389 break;
390 default:
391 return false;
392 }
393
394 return true;
395 #else // SB_API_VERSION >= 11
396 return false;
397 #endif
398 }
399
400 #endif
401
CPU()402 CPU::CPU()
403 : stepping_(0),
404 model_(0),
405 ext_model_(0),
406 family_(0),
407 ext_family_(0),
408 type_(0),
409 implementer_(0),
410 architecture_(0),
411 variant_(-1),
412 part_(0),
413 icache_line_size_(UNKNOWN_CACHE_LINE_SIZE),
414 dcache_line_size_(UNKNOWN_CACHE_LINE_SIZE),
415 has_fpu_(false),
416 has_cmov_(false),
417 has_sahf_(false),
418 has_mmx_(false),
419 has_sse_(false),
420 has_sse2_(false),
421 has_sse3_(false),
422 has_ssse3_(false),
423 has_sse41_(false),
424 has_sse42_(false),
425 is_atom_(false),
426 has_osxsave_(false),
427 has_avx_(false),
428 has_fma3_(false),
429 has_bmi1_(false),
430 has_bmi2_(false),
431 has_lzcnt_(false),
432 has_popcnt_(false),
433 has_idiva_(false),
434 has_neon_(false),
435 has_thumb2_(false),
436 has_vfp_(false),
437 has_vfp3_(false),
438 has_vfp3_d32_(false),
439 has_jscvt_(false),
440 is_fp64_mode_(false),
441 has_non_stop_time_stamp_counter_(false),
442 has_msa_(false) {
443 memcpy(vendor_, "Unknown", 8);
444
445 #if defined(STARBOARD)
446 if (StarboardDetectCPU()) {
447 return;
448 }
449 #endif
450
451 #if V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64
452 int cpu_info[4];
453
454 // __cpuid with an InfoType argument of 0 returns the number of
455 // valid Ids in CPUInfo[0] and the CPU identification string in
456 // the other three array elements. The CPU identification string is
457 // not in linear order. The code below arranges the information
458 // in a human readable form. The human readable order is CPUInfo[1] |
459 // CPUInfo[3] | CPUInfo[2]. CPUInfo[2] and CPUInfo[3] are swapped
460 // before using memcpy to copy these three array elements to cpu_string.
461 __cpuid(cpu_info, 0);
462 unsigned num_ids = cpu_info[0];
463 std::swap(cpu_info[2], cpu_info[3]);
464 memcpy(vendor_, cpu_info + 1, 12);
465 vendor_[12] = '\0';
466
467 // Interpret CPU feature information.
468 if (num_ids > 0) {
469 __cpuid(cpu_info, 1);
470 stepping_ = cpu_info[0] & 0xF;
471 model_ = ((cpu_info[0] >> 4) & 0xF) + ((cpu_info[0] >> 12) & 0xF0);
472 family_ = (cpu_info[0] >> 8) & 0xF;
473 type_ = (cpu_info[0] >> 12) & 0x3;
474 ext_model_ = (cpu_info[0] >> 16) & 0xF;
475 ext_family_ = (cpu_info[0] >> 20) & 0xFF;
476 has_fpu_ = (cpu_info[3] & 0x00000001) != 0;
477 has_cmov_ = (cpu_info[3] & 0x00008000) != 0;
478 has_mmx_ = (cpu_info[3] & 0x00800000) != 0;
479 has_sse_ = (cpu_info[3] & 0x02000000) != 0;
480 has_sse2_ = (cpu_info[3] & 0x04000000) != 0;
481 has_sse3_ = (cpu_info[2] & 0x00000001) != 0;
482 has_ssse3_ = (cpu_info[2] & 0x00000200) != 0;
483 has_sse41_ = (cpu_info[2] & 0x00080000) != 0;
484 has_sse42_ = (cpu_info[2] & 0x00100000) != 0;
485 has_popcnt_ = (cpu_info[2] & 0x00800000) != 0;
486 has_osxsave_ = (cpu_info[2] & 0x08000000) != 0;
487 has_avx_ = (cpu_info[2] & 0x10000000) != 0;
488 has_fma3_ = (cpu_info[2] & 0x00001000) != 0;
489
490 if (family_ == 0x6) {
491 switch (model_) {
492 case 0x1C: // SLT
493 case 0x26:
494 case 0x36:
495 case 0x27:
496 case 0x35:
497 case 0x37: // SLM
498 case 0x4A:
499 case 0x4D:
500 case 0x4C: // AMT
501 case 0x6E:
502 is_atom_ = true;
503 }
504 }
505 }
506
507 // There are separate feature flags for VEX-encoded GPR instructions.
508 if (num_ids >= 7) {
509 __cpuid(cpu_info, 7);
510 has_bmi1_ = (cpu_info[1] & 0x00000008) != 0;
511 has_bmi2_ = (cpu_info[1] & 0x00000100) != 0;
512 }
513
514 // Query extended IDs.
515 __cpuid(cpu_info, 0x80000000);
516 unsigned num_ext_ids = cpu_info[0];
517
518 // Interpret extended CPU feature information.
519 if (num_ext_ids > 0x80000000) {
520 __cpuid(cpu_info, 0x80000001);
521 has_lzcnt_ = (cpu_info[2] & 0x00000020) != 0;
522 // SAHF must be probed in long mode.
523 has_sahf_ = (cpu_info[2] & 0x00000001) != 0;
524 }
525
526 // Check if CPU has non stoppable time stamp counter.
527 const unsigned parameter_containing_non_stop_time_stamp_counter = 0x80000007;
528 if (num_ext_ids >= parameter_containing_non_stop_time_stamp_counter) {
529 __cpuid(cpu_info, parameter_containing_non_stop_time_stamp_counter);
530 has_non_stop_time_stamp_counter_ = (cpu_info[3] & (1 << 8)) != 0;
531 }
532
533 #elif V8_HOST_ARCH_ARM
534
535 #if V8_OS_LINUX
536
537 #if V8_OS_LINUX
538 CPUInfo cpu_info;
539
540 // Extract implementor from the "CPU implementer" field.
541 char* implementer = cpu_info.ExtractField("CPU implementer");
542 if (implementer != nullptr) {
543 char* end;
544 implementer_ = strtol(implementer, &end, 0);
545 if (end == implementer) {
546 implementer_ = 0;
547 }
548 delete[] implementer;
549 }
550
551 char* variant = cpu_info.ExtractField("CPU variant");
552 if (variant != nullptr) {
553 char* end;
554 variant_ = strtol(variant, &end, 0);
555 if (end == variant) {
556 variant_ = -1;
557 }
558 delete[] variant;
559 }
560
561 // Extract part number from the "CPU part" field.
562 char* part = cpu_info.ExtractField("CPU part");
563 if (part != nullptr) {
564 char* end;
565 part_ = strtol(part, &end, 0);
566 if (end == part) {
567 part_ = 0;
568 }
569 delete[] part;
570 }
571 #endif
572
573 // Extract architecture from the "CPU Architecture" field.
574 // The list is well-known, unlike the the output of
575 // the 'Processor' field which can vary greatly.
576 // See the definition of the 'proc_arch' array in
577 // $KERNEL/arch/arm/kernel/setup.c and the 'c_show' function in
578 // same file.
579 char* architecture = cpu_info.ExtractField("CPU architecture");
580 if (architecture != nullptr) {
581 char* end;
582 architecture_ = strtol(architecture, &end, 10);
583 if (end == architecture) {
584 // Kernels older than 3.18 report "CPU architecture: AArch64" on ARMv8.
585 if (strcmp(architecture, "AArch64") == 0) {
586 architecture_ = 8;
587 } else {
588 architecture_ = 0;
589 }
590 }
591 delete[] architecture;
592
593 // Unfortunately, it seems that certain ARMv6-based CPUs
594 // report an incorrect architecture number of 7!
595 //
596 // See http://code.google.com/p/android/issues/detail?id=10812
597 //
598 // We try to correct this by looking at the 'elf_platform'
599 // field reported by the 'Processor' field, which is of the
600 // form of "(v7l)" for an ARMv7-based CPU, and "(v6l)" for
601 // an ARMv6-one. For example, the Raspberry Pi is one popular
602 // ARMv6 device that reports architecture 7.
603 if (architecture_ == 7) {
604 char* processor = cpu_info.ExtractField("Processor");
605 if (HasListItem(processor, "(v6l)")) {
606 architecture_ = 6;
607 }
608 delete[] processor;
609 }
610
611 // elf_platform moved to the model name field in Linux v3.8.
612 if (architecture_ == 7) {
613 char* processor = cpu_info.ExtractField("model name");
614 if (HasListItem(processor, "(v6l)")) {
615 architecture_ = 6;
616 }
617 delete[] processor;
618 }
619 }
620
621 // Try to extract the list of CPU features from ELF hwcaps.
622 uint32_t hwcaps = ReadELFHWCaps();
623 if (hwcaps != 0) {
624 has_idiva_ = (hwcaps & HWCAP_IDIVA) != 0;
625 has_neon_ = (hwcaps & HWCAP_NEON) != 0;
626 has_vfp_ = (hwcaps & HWCAP_VFP) != 0;
627 has_vfp3_ = (hwcaps & (HWCAP_VFPv3 | HWCAP_VFPv3D16 | HWCAP_VFPv4)) != 0;
628 has_vfp3_d32_ = (has_vfp3_ && ((hwcaps & HWCAP_VFPv3D16) == 0 ||
629 (hwcaps & HWCAP_VFPD32) != 0));
630 } else {
631 // Try to fallback to "Features" CPUInfo field.
632 char* features = cpu_info.ExtractField("Features");
633 has_idiva_ = HasListItem(features, "idiva");
634 has_neon_ = HasListItem(features, "neon");
635 has_thumb2_ = HasListItem(features, "thumb2");
636 has_vfp_ = HasListItem(features, "vfp");
637 if (HasListItem(features, "vfpv3d16")) {
638 has_vfp3_ = true;
639 } else if (HasListItem(features, "vfpv3")) {
640 has_vfp3_ = true;
641 has_vfp3_d32_ = true;
642 }
643 delete[] features;
644 }
645
646 // Some old kernels will report vfp not vfpv3. Here we make an attempt
647 // to detect vfpv3 by checking for vfp *and* neon, since neon is only
648 // available on architectures with vfpv3. Checking neon on its own is
649 // not enough as it is possible to have neon without vfp.
650 if (has_vfp_ && has_neon_) {
651 has_vfp3_ = true;
652 }
653
654 // VFPv3 implies ARMv7, see ARM DDI 0406B, page A1-6.
655 if (architecture_ < 7 && has_vfp3_) {
656 architecture_ = 7;
657 }
658
659 // ARMv7 implies Thumb2.
660 if (architecture_ >= 7) {
661 has_thumb2_ = true;
662 }
663
664 // The earliest architecture with Thumb2 is ARMv6T2.
665 if (has_thumb2_ && architecture_ < 6) {
666 architecture_ = 6;
667 }
668
669 // We don't support any FPUs other than VFP.
670 has_fpu_ = has_vfp_;
671
672 #elif V8_OS_QNX
673
674 uint32_t cpu_flags = SYSPAGE_ENTRY(cpuinfo)->flags;
675 if (cpu_flags & ARM_CPU_FLAG_V7) {
676 architecture_ = 7;
677 has_thumb2_ = true;
678 } else if (cpu_flags & ARM_CPU_FLAG_V6) {
679 architecture_ = 6;
680 // QNX doesn't say if Thumb2 is available.
681 // Assume false for the architectures older than ARMv7.
682 }
683 DCHECK_GE(architecture_, 6);
684 has_fpu_ = (cpu_flags & CPU_FLAG_FPU) != 0;
685 has_vfp_ = has_fpu_;
686 if (cpu_flags & ARM_CPU_FLAG_NEON) {
687 has_neon_ = true;
688 has_vfp3_ = has_vfp_;
689 #ifdef ARM_CPU_FLAG_VFP_D32
690 has_vfp3_d32_ = (cpu_flags & ARM_CPU_FLAG_VFP_D32) != 0;
691 #endif
692 }
693 has_idiva_ = (cpu_flags & ARM_CPU_FLAG_IDIV) != 0;
694
695 #endif // V8_OS_LINUX
696
697 #elif V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
698
699 // Simple detection of FPU at runtime for Linux.
700 // It is based on /proc/cpuinfo, which reveals hardware configuration
701 // to user-space applications. According to MIPS (early 2010), no similar
702 // facility is universally available on the MIPS architectures,
703 // so it's up to individual OSes to provide such.
704 CPUInfo cpu_info;
705 char* cpu_model = cpu_info.ExtractField("cpu model");
706 has_fpu_ = HasListItem(cpu_model, "FPU");
707 char* ASEs = cpu_info.ExtractField("ASEs implemented");
708 has_msa_ = HasListItem(ASEs, "msa");
709 delete[] cpu_model;
710 delete[] ASEs;
711 #ifdef V8_HOST_ARCH_MIPS
712 is_fp64_mode_ = __detect_fp64_mode();
713 architecture_ = __detect_mips_arch_revision();
714 #endif
715
716 #elif V8_HOST_ARCH_ARM64
717 #ifdef V8_OS_WIN
718 // Windows makes high-resolution thread timing information available in
719 // user-space.
720 has_non_stop_time_stamp_counter_ = true;
721
722 #elif V8_OS_LINUX
723 // Try to extract the list of CPU features from ELF hwcaps.
724 uint32_t hwcaps = ReadELFHWCaps();
725 if (hwcaps != 0) {
726 has_jscvt_ = (hwcaps & HWCAP_JSCVT) != 0;
727 } else {
728 // Try to fallback to "Features" CPUInfo field
729 CPUInfo cpu_info;
730 char* features = cpu_info.ExtractField("Features");
731 has_jscvt_ = HasListItem(features, "jscvt");
732 delete[] features;
733 }
734 #endif // V8_OS_WIN
735
736 #elif V8_HOST_ARCH_PPC || V8_HOST_ARCH_PPC64
737
738 #ifndef USE_SIMULATOR
739 #if V8_OS_LINUX
740 // Read processor info from /proc/self/auxv.
741 char* auxv_cpu_type = nullptr;
742 FILE* fp = fopen("/proc/self/auxv", "r");
743 if (fp != nullptr) {
744 #if V8_TARGET_ARCH_PPC64
745 Elf64_auxv_t entry;
746 #else
747 Elf32_auxv_t entry;
748 #endif
749 for (;;) {
750 size_t n = fread(&entry, sizeof(entry), 1, fp);
751 if (n == 0 || entry.a_type == AT_NULL) {
752 break;
753 }
754 switch (entry.a_type) {
755 case AT_PLATFORM:
756 auxv_cpu_type = reinterpret_cast<char*>(entry.a_un.a_val);
757 break;
758 case AT_ICACHEBSIZE:
759 icache_line_size_ = entry.a_un.a_val;
760 break;
761 case AT_DCACHEBSIZE:
762 dcache_line_size_ = entry.a_un.a_val;
763 break;
764 }
765 }
766 fclose(fp);
767 }
768
769 part_ = -1;
770 if (auxv_cpu_type) {
771 if (strcmp(auxv_cpu_type, "power9") == 0) {
772 part_ = PPC_POWER9;
773 } else if (strcmp(auxv_cpu_type, "power8") == 0) {
774 part_ = PPC_POWER8;
775 } else if (strcmp(auxv_cpu_type, "power7") == 0) {
776 part_ = PPC_POWER7;
777 } else if (strcmp(auxv_cpu_type, "power6") == 0) {
778 part_ = PPC_POWER6;
779 } else if (strcmp(auxv_cpu_type, "power5") == 0) {
780 part_ = PPC_POWER5;
781 } else if (strcmp(auxv_cpu_type, "ppc970") == 0) {
782 part_ = PPC_G5;
783 } else if (strcmp(auxv_cpu_type, "ppc7450") == 0) {
784 part_ = PPC_G4;
785 } else if (strcmp(auxv_cpu_type, "pa6t") == 0) {
786 part_ = PPC_PA6T;
787 }
788 }
789
790 #elif V8_OS_AIX
791 switch (_system_configuration.implementation) {
792 case POWER_9:
793 part_ = PPC_POWER9;
794 break;
795 case POWER_8:
796 part_ = PPC_POWER8;
797 break;
798 case POWER_7:
799 part_ = PPC_POWER7;
800 break;
801 case POWER_6:
802 part_ = PPC_POWER6;
803 break;
804 case POWER_5:
805 part_ = PPC_POWER5;
806 break;
807 }
808 #endif // V8_OS_AIX
809 #endif // !USE_SIMULATOR
810 #endif // V8_HOST_ARCH_PPC || V8_HOST_ARCH_PPC64
811 }
812
813 } // namespace base
814 } // namespace v8
815