1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
4 *
5 * Derived from MIPS:
6 * Copyright (C) 2000, 2001 Kanoj Sarcar
7 * Copyright (C) 2000, 2001 Ralf Baechle
8 * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
9 * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
10 */
11 #include <linux/acpi.h>
12 #include <linux/cpu.h>
13 #include <linux/cpumask.h>
14 #include <linux/init.h>
15 #include <linux/interrupt.h>
16 #include <linux/profile.h>
17 #include <linux/seq_file.h>
18 #include <linux/smp.h>
19 #include <linux/threads.h>
20 #include <linux/export.h>
21 #include <linux/syscore_ops.h>
22 #include <linux/time.h>
23 #include <linux/tracepoint.h>
24 #include <linux/sched/hotplug.h>
25 #include <linux/sched/task_stack.h>
26
27 #include <asm/cpu.h>
28 #include <asm/idle.h>
29 #include <asm/loongson.h>
30 #include <asm/mmu_context.h>
31 #include <asm/numa.h>
32 #include <asm/paravirt.h>
33 #include <asm/processor.h>
34 #include <asm/setup.h>
35 #include <asm/time.h>
36
37 int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
38 EXPORT_SYMBOL(__cpu_number_map);
39
40 int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
41 EXPORT_SYMBOL(__cpu_logical_map);
42
43 /* Representing the threads (siblings) of each logical CPU */
44 cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
45 EXPORT_SYMBOL(cpu_sibling_map);
46
47 /* Representing the core map of multi-core chips of each logical CPU */
48 cpumask_t cpu_core_map[NR_CPUS] __read_mostly;
49 EXPORT_SYMBOL(cpu_core_map);
50
51 static DECLARE_COMPLETION(cpu_starting);
52 static DECLARE_COMPLETION(cpu_running);
53
54 /*
55 * A logcal cpu mask containing only one VPE per core to
56 * reduce the number of IPIs on large MT systems.
57 */
58 cpumask_t cpu_foreign_map[NR_CPUS] __read_mostly;
59 EXPORT_SYMBOL(cpu_foreign_map);
60
61 /* representing cpus for which sibling maps can be computed */
62 static cpumask_t cpu_sibling_setup_map;
63
64 /* representing cpus for which core maps can be computed */
65 static cpumask_t cpu_core_setup_map;
66
67 struct secondary_data cpuboot_data;
68 static DEFINE_PER_CPU(int, cpu_state);
69
70 static const char *ipi_types[NR_IPI] __tracepoint_string = {
71 [IPI_RESCHEDULE] = "Rescheduling interrupts",
72 [IPI_CALL_FUNCTION] = "Function call interrupts",
73 };
74
show_ipi_list(struct seq_file * p,int prec)75 void show_ipi_list(struct seq_file *p, int prec)
76 {
77 unsigned int cpu, i;
78
79 for (i = 0; i < NR_IPI; i++) {
80 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i, prec >= 4 ? " " : "");
81 for_each_online_cpu(cpu)
82 seq_printf(p, "%10u ", per_cpu(irq_stat, cpu).ipi_irqs[i]);
83 seq_printf(p, " LoongArch %d %s\n", i + 1, ipi_types[i]);
84 }
85 }
86
set_cpu_core_map(int cpu)87 static inline void set_cpu_core_map(int cpu)
88 {
89 int i;
90
91 cpumask_set_cpu(cpu, &cpu_core_setup_map);
92
93 for_each_cpu(i, &cpu_core_setup_map) {
94 if (cpu_data[cpu].package == cpu_data[i].package) {
95 cpumask_set_cpu(i, &cpu_core_map[cpu]);
96 cpumask_set_cpu(cpu, &cpu_core_map[i]);
97 }
98 }
99 }
100
set_cpu_sibling_map(int cpu)101 static inline void set_cpu_sibling_map(int cpu)
102 {
103 int i;
104
105 cpumask_set_cpu(cpu, &cpu_sibling_setup_map);
106
107 for_each_cpu(i, &cpu_sibling_setup_map) {
108 if (cpus_are_siblings(cpu, i)) {
109 cpumask_set_cpu(i, &cpu_sibling_map[cpu]);
110 cpumask_set_cpu(cpu, &cpu_sibling_map[i]);
111 }
112 }
113 }
114
clear_cpu_sibling_map(int cpu)115 static inline void clear_cpu_sibling_map(int cpu)
116 {
117 int i;
118
119 for_each_cpu(i, &cpu_sibling_setup_map) {
120 if (cpus_are_siblings(cpu, i)) {
121 cpumask_clear_cpu(i, &cpu_sibling_map[cpu]);
122 cpumask_clear_cpu(cpu, &cpu_sibling_map[i]);
123 }
124 }
125
126 cpumask_clear_cpu(cpu, &cpu_sibling_setup_map);
127 }
128
129 /*
130 * Calculate a new cpu_foreign_map mask whenever a
131 * new cpu appears or disappears.
132 */
calculate_cpu_foreign_map(void)133 void calculate_cpu_foreign_map(void)
134 {
135 int i, k, core_present;
136 cpumask_t temp_foreign_map;
137
138 /* Re-calculate the mask */
139 cpumask_clear(&temp_foreign_map);
140 for_each_online_cpu(i) {
141 core_present = 0;
142 for_each_cpu(k, &temp_foreign_map)
143 if (cpus_are_siblings(i, k))
144 core_present = 1;
145 if (!core_present)
146 cpumask_set_cpu(i, &temp_foreign_map);
147 }
148
149 for_each_online_cpu(i)
150 cpumask_andnot(&cpu_foreign_map[i],
151 &temp_foreign_map, &cpu_sibling_map[i]);
152 }
153
154 /* Send mailbox buffer via Mail_Send */
csr_mail_send(uint64_t data,int cpu,int mailbox)155 static void csr_mail_send(uint64_t data, int cpu, int mailbox)
156 {
157 uint64_t val;
158
159 /* Send high 32 bits */
160 val = IOCSR_MBUF_SEND_BLOCKING;
161 val |= (IOCSR_MBUF_SEND_BOX_HI(mailbox) << IOCSR_MBUF_SEND_BOX_SHIFT);
162 val |= (cpu << IOCSR_MBUF_SEND_CPU_SHIFT);
163 val |= (data & IOCSR_MBUF_SEND_H32_MASK);
164 iocsr_write64(val, LOONGARCH_IOCSR_MBUF_SEND);
165
166 /* Send low 32 bits */
167 val = IOCSR_MBUF_SEND_BLOCKING;
168 val |= (IOCSR_MBUF_SEND_BOX_LO(mailbox) << IOCSR_MBUF_SEND_BOX_SHIFT);
169 val |= (cpu << IOCSR_MBUF_SEND_CPU_SHIFT);
170 val |= (data << IOCSR_MBUF_SEND_BUF_SHIFT);
171 iocsr_write64(val, LOONGARCH_IOCSR_MBUF_SEND);
172 };
173
ipi_read_clear(int cpu)174 static u32 ipi_read_clear(int cpu)
175 {
176 u32 action;
177
178 /* Load the ipi register to figure out what we're supposed to do */
179 action = iocsr_read32(LOONGARCH_IOCSR_IPI_STATUS);
180 /* Clear the ipi register to clear the interrupt */
181 iocsr_write32(action, LOONGARCH_IOCSR_IPI_CLEAR);
182 wbflush();
183
184 return action;
185 }
186
ipi_write_action(int cpu,u32 action)187 static void ipi_write_action(int cpu, u32 action)
188 {
189 uint32_t val;
190
191 val = IOCSR_IPI_SEND_BLOCKING | action;
192 val |= (cpu << IOCSR_IPI_SEND_CPU_SHIFT);
193 iocsr_write32(val, LOONGARCH_IOCSR_IPI_SEND);
194 }
195
loongson_send_ipi_single(int cpu,unsigned int action)196 static void loongson_send_ipi_single(int cpu, unsigned int action)
197 {
198 ipi_write_action(cpu_logical_map(cpu), (u32)action);
199 }
200
loongson_send_ipi_mask(const struct cpumask * mask,unsigned int action)201 static void loongson_send_ipi_mask(const struct cpumask *mask, unsigned int action)
202 {
203 unsigned int i;
204
205 for_each_cpu(i, mask)
206 ipi_write_action(cpu_logical_map(i), (u32)action);
207 }
208
209 /*
210 * This function sends a 'reschedule' IPI to another CPU.
211 * it goes straight through and wastes no time serializing
212 * anything. Worst case is that we lose a reschedule ...
213 */
arch_smp_send_reschedule(int cpu)214 void arch_smp_send_reschedule(int cpu)
215 {
216 mp_ops.send_ipi_single(cpu, ACTION_RESCHEDULE);
217 }
218 EXPORT_SYMBOL_GPL(arch_smp_send_reschedule);
219
loongson_ipi_interrupt(int irq,void * dev)220 static irqreturn_t loongson_ipi_interrupt(int irq, void *dev)
221 {
222 unsigned int action;
223 unsigned int cpu = smp_processor_id();
224
225 action = ipi_read_clear(cpu_logical_map(cpu));
226
227 if (action & SMP_RESCHEDULE) {
228 scheduler_ipi();
229 per_cpu(irq_stat, cpu).ipi_irqs[IPI_RESCHEDULE]++;
230 }
231
232 if (action & SMP_CALL_FUNCTION) {
233 generic_smp_call_function_interrupt();
234 per_cpu(irq_stat, cpu).ipi_irqs[IPI_CALL_FUNCTION]++;
235 }
236
237 return IRQ_HANDLED;
238 }
239
loongson_init_ipi(void)240 static void loongson_init_ipi(void)
241 {
242 int r, ipi_irq;
243
244 ipi_irq = get_percpu_irq(INT_IPI);
245 if (ipi_irq < 0)
246 panic("IPI IRQ mapping failed\n");
247
248 irq_set_percpu_devid(ipi_irq);
249 r = request_percpu_irq(ipi_irq, loongson_ipi_interrupt, "IPI", &irq_stat);
250 if (r < 0)
251 panic("IPI IRQ request failed\n");
252 }
253
254 struct smp_ops mp_ops = {
255 .init_ipi = loongson_init_ipi,
256 .send_ipi_single = loongson_send_ipi_single,
257 .send_ipi_mask = loongson_send_ipi_mask,
258 };
259
fdt_smp_setup(void)260 static void __init fdt_smp_setup(void)
261 {
262 #ifdef CONFIG_OF
263 unsigned int cpu, cpuid;
264 struct device_node *node = NULL;
265
266 for_each_of_cpu_node(node) {
267 if (!of_device_is_available(node))
268 continue;
269
270 cpuid = of_get_cpu_hwid(node, 0);
271 if (cpuid >= nr_cpu_ids)
272 continue;
273
274 if (cpuid == loongson_sysconf.boot_cpu_id) {
275 cpu = 0;
276 } else {
277 cpu = cpumask_next_zero(-1, cpu_present_mask);
278 }
279
280 num_processors++;
281 set_cpu_possible(cpu, true);
282 set_cpu_present(cpu, true);
283 __cpu_number_map[cpuid] = cpu;
284 __cpu_logical_map[cpu] = cpuid;
285
286 early_numa_add_cpu(cpu, 0);
287 set_cpuid_to_node(cpuid, 0);
288 }
289
290 loongson_sysconf.nr_cpus = num_processors;
291 set_bit(0, loongson_sysconf.cores_io_master);
292 #endif
293 }
294
loongson_smp_setup(void)295 void __init loongson_smp_setup(void)
296 {
297 fdt_smp_setup();
298
299 if (loongson_sysconf.cores_per_package == 0)
300 loongson_sysconf.cores_per_package = num_processors;
301
302 cpu_data[0].core = cpu_logical_map(0) % loongson_sysconf.cores_per_package;
303 cpu_data[0].package = cpu_logical_map(0) / loongson_sysconf.cores_per_package;
304
305 pv_ipi_init();
306 iocsr_write32(0xffffffff, LOONGARCH_IOCSR_IPI_EN);
307 pr_info("Detected %i available CPU(s)\n", loongson_sysconf.nr_cpus);
308 }
309
loongson_prepare_cpus(unsigned int max_cpus)310 void __init loongson_prepare_cpus(unsigned int max_cpus)
311 {
312 int i = 0;
313
314 parse_acpi_topology();
315
316 for (i = 0; i < loongson_sysconf.nr_cpus; i++) {
317 set_cpu_present(i, true);
318 csr_mail_send(0, __cpu_logical_map[i], 0);
319 cpu_data[i].global_id = __cpu_logical_map[i];
320 }
321
322 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
323 }
324
325 /*
326 * Setup the PC, SP, and TP of a secondary processor and start it running!
327 */
loongson_boot_secondary(int cpu,struct task_struct * idle)328 void loongson_boot_secondary(int cpu, struct task_struct *idle)
329 {
330 unsigned long entry;
331
332 pr_info("Booting CPU#%d...\n", cpu);
333
334 entry = __pa_symbol((unsigned long)&smpboot_entry);
335 cpuboot_data.stack = (unsigned long)__KSTK_TOS(idle);
336 cpuboot_data.thread_info = (unsigned long)task_thread_info(idle);
337
338 csr_mail_send(entry, cpu_logical_map(cpu), 0);
339
340 loongson_send_ipi_single(cpu, ACTION_BOOT_CPU);
341 }
342
343 /*
344 * SMP init and finish on secondary CPUs
345 */
loongson_init_secondary(void)346 void loongson_init_secondary(void)
347 {
348 unsigned int cpu = smp_processor_id();
349 unsigned int imask = ECFGF_IP0 | ECFGF_IP1 | ECFGF_IP2 |
350 ECFGF_IPI | ECFGF_PMC | ECFGF_TIMER | ECFGF_SIP0;
351
352 change_csr_ecfg(ECFG0_IM, imask);
353
354 iocsr_write32(0xffffffff, LOONGARCH_IOCSR_IPI_EN);
355
356 #ifdef CONFIG_NUMA
357 numa_add_cpu(cpu);
358 #endif
359 per_cpu(cpu_state, cpu) = CPU_ONLINE;
360 cpu_data[cpu].package =
361 cpu_logical_map(cpu) / loongson_sysconf.cores_per_package;
362 cpu_data[cpu].core = pptt_enabled ? cpu_data[cpu].core :
363 cpu_logical_map(cpu) % loongson_sysconf.cores_per_package;
364 }
365
loongson_smp_finish(void)366 void loongson_smp_finish(void)
367 {
368 local_irq_enable();
369 iocsr_write64(0, LOONGARCH_IOCSR_MBUF0);
370 pr_info("CPU#%d finished\n", smp_processor_id());
371 }
372
373 #ifdef CONFIG_HOTPLUG_CPU
374
loongson_cpu_disable(void)375 int loongson_cpu_disable(void)
376 {
377 unsigned long flags;
378 unsigned int cpu = smp_processor_id();
379
380 if (io_master(cpu))
381 return -EBUSY;
382
383 #ifdef CONFIG_NUMA
384 numa_remove_cpu(cpu);
385 #endif
386 set_cpu_online(cpu, false);
387 clear_cpu_sibling_map(cpu);
388 calculate_cpu_foreign_map();
389 local_irq_save(flags);
390 irq_migrate_all_off_this_cpu();
391 clear_csr_ecfg(ECFG0_IM);
392 local_irq_restore(flags);
393 local_flush_tlb_all();
394
395 return 0;
396 }
397
loongson_cpu_die(unsigned int cpu)398 void loongson_cpu_die(unsigned int cpu)
399 {
400 while (per_cpu(cpu_state, cpu) != CPU_DEAD)
401 cpu_relax();
402
403 mb();
404 }
405
arch_cpu_idle_dead(void)406 void __noreturn arch_cpu_idle_dead(void)
407 {
408 register uint64_t addr;
409 register void (*init_fn)(void);
410
411 idle_task_exit();
412 local_irq_enable();
413 set_csr_ecfg(ECFGF_IPI);
414 __this_cpu_write(cpu_state, CPU_DEAD);
415
416 __smp_mb();
417 do {
418 __asm__ __volatile__("idle 0\n\t");
419 addr = iocsr_read64(LOONGARCH_IOCSR_MBUF0);
420 } while (addr == 0);
421
422 local_irq_disable();
423 init_fn = (void *)TO_CACHE(addr);
424 iocsr_write32(0xffffffff, LOONGARCH_IOCSR_IPI_CLEAR);
425
426 init_fn();
427 BUG();
428 }
429
430 #endif
431
432 /*
433 * Power management
434 */
435 #ifdef CONFIG_PM
436
loongson_ipi_suspend(void)437 static int loongson_ipi_suspend(void)
438 {
439 return 0;
440 }
441
loongson_ipi_resume(void)442 static void loongson_ipi_resume(void)
443 {
444 iocsr_write32(0xffffffff, LOONGARCH_IOCSR_IPI_EN);
445 }
446
447 static struct syscore_ops loongson_ipi_syscore_ops = {
448 .resume = loongson_ipi_resume,
449 .suspend = loongson_ipi_suspend,
450 };
451
452 /*
453 * Enable boot cpu ipi before enabling nonboot cpus
454 * during syscore_resume.
455 */
ipi_pm_init(void)456 static int __init ipi_pm_init(void)
457 {
458 register_syscore_ops(&loongson_ipi_syscore_ops);
459 return 0;
460 }
461
462 core_initcall(ipi_pm_init);
463 #endif
464
465 /* Preload SMP state for boot cpu */
smp_prepare_boot_cpu(void)466 void smp_prepare_boot_cpu(void)
467 {
468 unsigned int cpu, node, rr_node;
469
470 set_cpu_possible(0, true);
471 set_cpu_online(0, true);
472 set_my_cpu_offset(per_cpu_offset(0));
473 numa_add_cpu(0);
474
475 rr_node = first_node(node_online_map);
476 for_each_possible_cpu(cpu) {
477 node = early_cpu_to_node(cpu);
478
479 /*
480 * The mapping between present cpus and nodes has been
481 * built during MADT and SRAT parsing.
482 *
483 * If possible cpus = present cpus here, early_cpu_to_node
484 * will return valid node.
485 *
486 * If possible cpus > present cpus here (e.g. some possible
487 * cpus will be added by cpu-hotplug later), for possible but
488 * not present cpus, early_cpu_to_node will return NUMA_NO_NODE,
489 * and we just map them to online nodes in round-robin way.
490 * Once hotplugged, new correct mapping will be built for them.
491 */
492 if (node != NUMA_NO_NODE)
493 set_cpu_numa_node(cpu, node);
494 else {
495 set_cpu_numa_node(cpu, rr_node);
496 rr_node = next_node_in(rr_node, node_online_map);
497 }
498 }
499 }
500
501 /* called from main before smp_init() */
smp_prepare_cpus(unsigned int max_cpus)502 void __init smp_prepare_cpus(unsigned int max_cpus)
503 {
504 init_new_context(current, &init_mm);
505 current_thread_info()->cpu = 0;
506 loongson_prepare_cpus(max_cpus);
507 set_cpu_sibling_map(0);
508 set_cpu_core_map(0);
509 calculate_cpu_foreign_map();
510 #ifndef CONFIG_HOTPLUG_CPU
511 init_cpu_present(cpu_possible_mask);
512 #endif
513 }
514
__cpu_up(unsigned int cpu,struct task_struct * tidle)515 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
516 {
517 loongson_boot_secondary(cpu, tidle);
518
519 /* Wait for CPU to start and be ready to sync counters */
520 if (!wait_for_completion_timeout(&cpu_starting,
521 msecs_to_jiffies(5000))) {
522 pr_crit("CPU%u: failed to start\n", cpu);
523 return -EIO;
524 }
525
526 /* Wait for CPU to finish startup & mark itself online before return */
527 wait_for_completion(&cpu_running);
528
529 return 0;
530 }
531
532 /*
533 * First C code run on the secondary CPUs after being started up by
534 * the master.
535 */
start_secondary(void)536 asmlinkage void start_secondary(void)
537 {
538 unsigned int cpu;
539
540 sync_counter();
541 cpu = raw_smp_processor_id();
542 set_my_cpu_offset(per_cpu_offset(cpu));
543
544 cpu_probe();
545 constant_clockevent_init();
546 loongson_init_secondary();
547
548 set_cpu_sibling_map(cpu);
549 set_cpu_core_map(cpu);
550
551 notify_cpu_starting(cpu);
552
553 /* Notify boot CPU that we're starting */
554 complete(&cpu_starting);
555
556 /* The CPU is running, now mark it online */
557 set_cpu_online(cpu, true);
558
559 calculate_cpu_foreign_map();
560
561 /*
562 * Notify boot CPU that we're up & online and it can safely return
563 * from __cpu_up()
564 */
565 complete(&cpu_running);
566
567 /*
568 * irq will be enabled in loongson_smp_finish(), enabling it too
569 * early is dangerous.
570 */
571 WARN_ON_ONCE(!irqs_disabled());
572 loongson_smp_finish();
573
574 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
575 }
576
smp_cpus_done(unsigned int max_cpus)577 void __init smp_cpus_done(unsigned int max_cpus)
578 {
579 }
580
stop_this_cpu(void * dummy)581 static void stop_this_cpu(void *dummy)
582 {
583 set_cpu_online(smp_processor_id(), false);
584 calculate_cpu_foreign_map();
585 local_irq_disable();
586 while (true);
587 }
588
smp_send_stop(void)589 void smp_send_stop(void)
590 {
591 smp_call_function(stop_this_cpu, NULL, 0);
592 }
593
594 #ifdef CONFIG_PROFILING
setup_profiling_timer(unsigned int multiplier)595 int setup_profiling_timer(unsigned int multiplier)
596 {
597 return 0;
598 }
599 #endif
600
flush_tlb_all_ipi(void * info)601 static void flush_tlb_all_ipi(void *info)
602 {
603 local_flush_tlb_all();
604 }
605
flush_tlb_all(void)606 void flush_tlb_all(void)
607 {
608 on_each_cpu(flush_tlb_all_ipi, NULL, 1);
609 }
610
flush_tlb_mm_ipi(void * mm)611 static void flush_tlb_mm_ipi(void *mm)
612 {
613 local_flush_tlb_mm((struct mm_struct *)mm);
614 }
615
flush_tlb_mm(struct mm_struct * mm)616 void flush_tlb_mm(struct mm_struct *mm)
617 {
618 if (atomic_read(&mm->mm_users) == 0)
619 return; /* happens as a result of exit_mmap() */
620
621 preempt_disable();
622
623 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
624 on_each_cpu_mask(mm_cpumask(mm), flush_tlb_mm_ipi, mm, 1);
625 } else {
626 unsigned int cpu;
627
628 for_each_online_cpu(cpu) {
629 if (cpu != smp_processor_id() && cpu_context(cpu, mm))
630 cpu_context(cpu, mm) = 0;
631 }
632 local_flush_tlb_mm(mm);
633 }
634
635 preempt_enable();
636 }
637
638 struct flush_tlb_data {
639 struct vm_area_struct *vma;
640 unsigned long addr1;
641 unsigned long addr2;
642 };
643
flush_tlb_range_ipi(void * info)644 static void flush_tlb_range_ipi(void *info)
645 {
646 struct flush_tlb_data *fd = info;
647
648 local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
649 }
650
flush_tlb_range(struct vm_area_struct * vma,unsigned long start,unsigned long end)651 void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
652 {
653 struct mm_struct *mm = vma->vm_mm;
654
655 preempt_disable();
656 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
657 struct flush_tlb_data fd = {
658 .vma = vma,
659 .addr1 = start,
660 .addr2 = end,
661 };
662
663 on_each_cpu_mask(mm_cpumask(mm), flush_tlb_range_ipi, &fd, 1);
664 } else {
665 unsigned int cpu;
666
667 for_each_online_cpu(cpu) {
668 if (cpu != smp_processor_id() && cpu_context(cpu, mm))
669 cpu_context(cpu, mm) = 0;
670 }
671 local_flush_tlb_range(vma, start, end);
672 }
673 preempt_enable();
674 }
675
flush_tlb_kernel_range_ipi(void * info)676 static void flush_tlb_kernel_range_ipi(void *info)
677 {
678 struct flush_tlb_data *fd = info;
679
680 local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
681 }
682
flush_tlb_kernel_range(unsigned long start,unsigned long end)683 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
684 {
685 struct flush_tlb_data fd = {
686 .addr1 = start,
687 .addr2 = end,
688 };
689
690 on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1);
691 }
692
flush_tlb_page_ipi(void * info)693 static void flush_tlb_page_ipi(void *info)
694 {
695 struct flush_tlb_data *fd = info;
696
697 local_flush_tlb_page(fd->vma, fd->addr1);
698 }
699
flush_tlb_page(struct vm_area_struct * vma,unsigned long page)700 void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
701 {
702 preempt_disable();
703 if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
704 struct flush_tlb_data fd = {
705 .vma = vma,
706 .addr1 = page,
707 };
708
709 on_each_cpu_mask(mm_cpumask(vma->vm_mm), flush_tlb_page_ipi, &fd, 1);
710 } else {
711 unsigned int cpu;
712
713 for_each_online_cpu(cpu) {
714 if (cpu != smp_processor_id() && cpu_context(cpu, vma->vm_mm))
715 cpu_context(cpu, vma->vm_mm) = 0;
716 }
717 local_flush_tlb_page(vma, page);
718 }
719 preempt_enable();
720 }
721 EXPORT_SYMBOL(flush_tlb_page);
722
flush_tlb_one_ipi(void * info)723 static void flush_tlb_one_ipi(void *info)
724 {
725 unsigned long vaddr = (unsigned long) info;
726
727 local_flush_tlb_one(vaddr);
728 }
729
flush_tlb_one(unsigned long vaddr)730 void flush_tlb_one(unsigned long vaddr)
731 {
732 on_each_cpu(flush_tlb_one_ipi, (void *)vaddr, 1);
733 }
734 EXPORT_SYMBOL(flush_tlb_one);
735