xref: /linux/drivers/clk/meson/s4-pll.h (revision e787c9c5)
1 /* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
2 /*
3  * Copyright (c) 2022-2023 Amlogic, inc. All rights reserved
4  * Author: Yu Tu <yu.tu@amlogic.com>
5  */
6 
7 #ifndef __MESON_S4_PLL_H__
8 #define __MESON_S4_PLL_H__
9 
10 #define ANACTRL_FIXPLL_CTRL0                       0x040
11 #define ANACTRL_FIXPLL_CTRL1                       0x044
12 #define ANACTRL_FIXPLL_CTRL3                       0x04c
13 #define ANACTRL_GP0PLL_CTRL0                       0x080
14 #define ANACTRL_GP0PLL_CTRL1                       0x084
15 #define ANACTRL_GP0PLL_CTRL2                       0x088
16 #define ANACTRL_GP0PLL_CTRL3                       0x08c
17 #define ANACTRL_GP0PLL_CTRL4                       0x090
18 #define ANACTRL_GP0PLL_CTRL5                       0x094
19 #define ANACTRL_GP0PLL_CTRL6                       0x098
20 #define ANACTRL_HIFIPLL_CTRL0                      0x100
21 #define ANACTRL_HIFIPLL_CTRL1                      0x104
22 #define ANACTRL_HIFIPLL_CTRL2                      0x108
23 #define ANACTRL_HIFIPLL_CTRL3                      0x10c
24 #define ANACTRL_HIFIPLL_CTRL4                      0x110
25 #define ANACTRL_HIFIPLL_CTRL5                      0x114
26 #define ANACTRL_HIFIPLL_CTRL6                      0x118
27 #define ANACTRL_MPLL_CTRL0                         0x180
28 #define ANACTRL_MPLL_CTRL1                         0x184
29 #define ANACTRL_MPLL_CTRL2                         0x188
30 #define ANACTRL_MPLL_CTRL3                         0x18c
31 #define ANACTRL_MPLL_CTRL4                         0x190
32 #define ANACTRL_MPLL_CTRL5                         0x194
33 #define ANACTRL_MPLL_CTRL6                         0x198
34 #define ANACTRL_MPLL_CTRL7                         0x19c
35 #define ANACTRL_MPLL_CTRL8                         0x1a0
36 #define ANACTRL_HDMIPLL_CTRL0                      0x1c0
37 
38 #endif /* __MESON_S4_PLL_H__ */
39