1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * MAX3420 Device Controller driver for USB.
4 *
5 * Author: Jaswinder Singh Brar <jaswinder.singh@linaro.org>
6 * (C) Copyright 2019-2020 Linaro Ltd
7 *
8 * Based on:
9 * o MAX3420E datasheet
10 * https://datasheets.maximintegrated.com/en/ds/MAX3420E.pdf
11 * o MAX342{0,1}E Programming Guides
12 * https://pdfserv.maximintegrated.com/en/an/AN3598.pdf
13 * https://pdfserv.maximintegrated.com/en/an/AN3785.pdf
14 */
15
16 #include <linux/delay.h>
17 #include <linux/device.h>
18 #include <linux/interrupt.h>
19 #include <linux/io.h>
20 #include <linux/module.h>
21 #include <linux/bitfield.h>
22 #include <linux/of.h>
23 #include <linux/of_irq.h>
24 #include <linux/prefetch.h>
25 #include <linux/usb/ch9.h>
26 #include <linux/usb/gadget.h>
27 #include <linux/spi/spi.h>
28 #include <linux/gpio/consumer.h>
29
30 #define MAX3420_MAX_EPS 4
31 #define MAX3420_EP_MAX_PACKET 64 /* Same for all Endpoints */
32 #define MAX3420_EPNAME_SIZE 16 /* Buffer size for endpoint name */
33
34 #define MAX3420_ACKSTAT BIT(0)
35
36 #define MAX3420_SPI_DIR_RD 0 /* read register from MAX3420 */
37 #define MAX3420_SPI_DIR_WR 1 /* write register to MAX3420 */
38
39 /* SPI commands: */
40 #define MAX3420_SPI_DIR_SHIFT 1
41 #define MAX3420_SPI_REG_SHIFT 3
42
43 #define MAX3420_REG_EP0FIFO 0
44 #define MAX3420_REG_EP1FIFO 1
45 #define MAX3420_REG_EP2FIFO 2
46 #define MAX3420_REG_EP3FIFO 3
47 #define MAX3420_REG_SUDFIFO 4
48 #define MAX3420_REG_EP0BC 5
49 #define MAX3420_REG_EP1BC 6
50 #define MAX3420_REG_EP2BC 7
51 #define MAX3420_REG_EP3BC 8
52
53 #define MAX3420_REG_EPSTALLS 9
54 #define ACKSTAT BIT(6)
55 #define STLSTAT BIT(5)
56 #define STLEP3IN BIT(4)
57 #define STLEP2IN BIT(3)
58 #define STLEP1OUT BIT(2)
59 #define STLEP0OUT BIT(1)
60 #define STLEP0IN BIT(0)
61
62 #define MAX3420_REG_CLRTOGS 10
63 #define EP3DISAB BIT(7)
64 #define EP2DISAB BIT(6)
65 #define EP1DISAB BIT(5)
66 #define CTGEP3IN BIT(4)
67 #define CTGEP2IN BIT(3)
68 #define CTGEP1OUT BIT(2)
69
70 #define MAX3420_REG_EPIRQ 11
71 #define MAX3420_REG_EPIEN 12
72 #define SUDAVIRQ BIT(5)
73 #define IN3BAVIRQ BIT(4)
74 #define IN2BAVIRQ BIT(3)
75 #define OUT1DAVIRQ BIT(2)
76 #define OUT0DAVIRQ BIT(1)
77 #define IN0BAVIRQ BIT(0)
78
79 #define MAX3420_REG_USBIRQ 13
80 #define MAX3420_REG_USBIEN 14
81 #define OSCOKIRQ BIT(0)
82 #define RWUDNIRQ BIT(1)
83 #define BUSACTIRQ BIT(2)
84 #define URESIRQ BIT(3)
85 #define SUSPIRQ BIT(4)
86 #define NOVBUSIRQ BIT(5)
87 #define VBUSIRQ BIT(6)
88 #define URESDNIRQ BIT(7)
89
90 #define MAX3420_REG_USBCTL 15
91 #define HOSCSTEN BIT(7)
92 #define VBGATE BIT(6)
93 #define CHIPRES BIT(5)
94 #define PWRDOWN BIT(4)
95 #define CONNECT BIT(3)
96 #define SIGRWU BIT(2)
97
98 #define MAX3420_REG_CPUCTL 16
99 #define IE BIT(0)
100
101 #define MAX3420_REG_PINCTL 17
102 #define EP3INAK BIT(7)
103 #define EP2INAK BIT(6)
104 #define EP0INAK BIT(5)
105 #define FDUPSPI BIT(4)
106 #define INTLEVEL BIT(3)
107 #define POSINT BIT(2)
108 #define GPXB BIT(1)
109 #define GPXA BIT(0)
110
111 #define MAX3420_REG_REVISION 18
112
113 #define MAX3420_REG_FNADDR 19
114 #define FNADDR_MASK 0x7f
115
116 #define MAX3420_REG_IOPINS 20
117 #define MAX3420_REG_IOPINS2 21
118 #define MAX3420_REG_GPINIRQ 22
119 #define MAX3420_REG_GPINIEN 23
120 #define MAX3420_REG_GPINPOL 24
121 #define MAX3420_REG_HIRQ 25
122 #define MAX3420_REG_HIEN 26
123 #define MAX3420_REG_MODE 27
124 #define MAX3420_REG_PERADDR 28
125 #define MAX3420_REG_HCTL 29
126 #define MAX3420_REG_HXFR 30
127 #define MAX3420_REG_HRSL 31
128
129 #define ENABLE_IRQ BIT(0)
130 #define IOPIN_UPDATE BIT(1)
131 #define REMOTE_WAKEUP BIT(2)
132 #define CONNECT_HOST GENMASK(4, 3)
133 #define HCONNECT (1 << 3)
134 #define HDISCONNECT (3 << 3)
135 #define UDC_START GENMASK(6, 5)
136 #define START (1 << 5)
137 #define STOP (3 << 5)
138 #define ENABLE_EP GENMASK(8, 7)
139 #define ENABLE (1 << 7)
140 #define DISABLE (3 << 7)
141 #define STALL_EP GENMASK(10, 9)
142 #define STALL (1 << 9)
143 #define UNSTALL (3 << 9)
144
145 #define MAX3420_CMD(c) FIELD_PREP(GENMASK(7, 3), c)
146 #define MAX3420_SPI_CMD_RD(c) (MAX3420_CMD(c) | (0 << 1))
147 #define MAX3420_SPI_CMD_WR(c) (MAX3420_CMD(c) | (1 << 1))
148
149 struct max3420_req {
150 struct usb_request usb_req;
151 struct list_head queue;
152 struct max3420_ep *ep;
153 };
154
155 struct max3420_ep {
156 struct usb_ep ep_usb;
157 struct max3420_udc *udc;
158 struct list_head queue;
159 char name[MAX3420_EPNAME_SIZE];
160 unsigned int maxpacket;
161 spinlock_t lock;
162 int halted;
163 u32 todo;
164 int id;
165 };
166
167 struct max3420_udc {
168 struct usb_gadget gadget;
169 struct max3420_ep ep[MAX3420_MAX_EPS];
170 struct usb_gadget_driver *driver;
171 struct task_struct *thread_task;
172 int remote_wkp, is_selfpowered;
173 bool vbus_active, softconnect;
174 struct usb_ctrlrequest setup;
175 struct mutex spi_bus_mutex;
176 struct max3420_req ep0req;
177 struct spi_device *spi;
178 struct device *dev;
179 spinlock_t lock;
180 bool suspended;
181 u8 ep0buf[64];
182 u32 todo;
183 };
184
185 #define to_max3420_req(r) container_of((r), struct max3420_req, usb_req)
186 #define to_max3420_ep(e) container_of((e), struct max3420_ep, ep_usb)
187 #define to_udc(g) container_of((g), struct max3420_udc, gadget)
188
189 #define DRIVER_DESC "MAX3420 USB Device-Mode Driver"
190 static const char driver_name[] = "max3420-udc";
191
192 /* Control endpoint configuration.*/
193 static const struct usb_endpoint_descriptor ep0_desc = {
194 .bEndpointAddress = USB_DIR_OUT,
195 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
196 .wMaxPacketSize = cpu_to_le16(MAX3420_EP_MAX_PACKET),
197 };
198
spi_ack_ctrl(struct max3420_udc * udc)199 static void spi_ack_ctrl(struct max3420_udc *udc)
200 {
201 struct spi_device *spi = udc->spi;
202 struct spi_transfer transfer;
203 struct spi_message msg;
204 u8 txdata[1];
205
206 memset(&transfer, 0, sizeof(transfer));
207
208 spi_message_init(&msg);
209
210 txdata[0] = MAX3420_ACKSTAT;
211 transfer.tx_buf = txdata;
212 transfer.len = 1;
213
214 spi_message_add_tail(&transfer, &msg);
215 spi_sync(spi, &msg);
216 }
217
spi_rd8_ack(struct max3420_udc * udc,u8 reg,int actstat)218 static u8 spi_rd8_ack(struct max3420_udc *udc, u8 reg, int actstat)
219 {
220 struct spi_device *spi = udc->spi;
221 struct spi_transfer transfer;
222 struct spi_message msg;
223 u8 txdata[2], rxdata[2];
224
225 memset(&transfer, 0, sizeof(transfer));
226
227 spi_message_init(&msg);
228
229 txdata[0] = MAX3420_SPI_CMD_RD(reg) | (actstat ? MAX3420_ACKSTAT : 0);
230 transfer.tx_buf = txdata;
231 transfer.rx_buf = rxdata;
232 transfer.len = 2;
233
234 spi_message_add_tail(&transfer, &msg);
235 spi_sync(spi, &msg);
236
237 return rxdata[1];
238 }
239
spi_rd8(struct max3420_udc * udc,u8 reg)240 static u8 spi_rd8(struct max3420_udc *udc, u8 reg)
241 {
242 return spi_rd8_ack(udc, reg, 0);
243 }
244
spi_wr8_ack(struct max3420_udc * udc,u8 reg,u8 val,int actstat)245 static void spi_wr8_ack(struct max3420_udc *udc, u8 reg, u8 val, int actstat)
246 {
247 struct spi_device *spi = udc->spi;
248 struct spi_transfer transfer;
249 struct spi_message msg;
250 u8 txdata[2];
251
252 memset(&transfer, 0, sizeof(transfer));
253
254 spi_message_init(&msg);
255
256 txdata[0] = MAX3420_SPI_CMD_WR(reg) | (actstat ? MAX3420_ACKSTAT : 0);
257 txdata[1] = val;
258
259 transfer.tx_buf = txdata;
260 transfer.len = 2;
261
262 spi_message_add_tail(&transfer, &msg);
263 spi_sync(spi, &msg);
264 }
265
spi_wr8(struct max3420_udc * udc,u8 reg,u8 val)266 static void spi_wr8(struct max3420_udc *udc, u8 reg, u8 val)
267 {
268 spi_wr8_ack(udc, reg, val, 0);
269 }
270
spi_rd_buf(struct max3420_udc * udc,u8 reg,void * buf,u8 len)271 static void spi_rd_buf(struct max3420_udc *udc, u8 reg, void *buf, u8 len)
272 {
273 struct spi_device *spi = udc->spi;
274 struct spi_transfer transfer;
275 struct spi_message msg;
276 u8 local_buf[MAX3420_EP_MAX_PACKET + 1] = {};
277
278 memset(&transfer, 0, sizeof(transfer));
279
280 spi_message_init(&msg);
281
282 local_buf[0] = MAX3420_SPI_CMD_RD(reg);
283 transfer.tx_buf = &local_buf[0];
284 transfer.rx_buf = &local_buf[0];
285 transfer.len = len + 1;
286
287 spi_message_add_tail(&transfer, &msg);
288 spi_sync(spi, &msg);
289
290 memcpy(buf, &local_buf[1], len);
291 }
292
spi_wr_buf(struct max3420_udc * udc,u8 reg,void * buf,u8 len)293 static void spi_wr_buf(struct max3420_udc *udc, u8 reg, void *buf, u8 len)
294 {
295 struct spi_device *spi = udc->spi;
296 struct spi_transfer transfer;
297 struct spi_message msg;
298 u8 local_buf[MAX3420_EP_MAX_PACKET + 1] = {};
299
300 memset(&transfer, 0, sizeof(transfer));
301
302 spi_message_init(&msg);
303
304 local_buf[0] = MAX3420_SPI_CMD_WR(reg);
305 memcpy(&local_buf[1], buf, len);
306
307 transfer.tx_buf = local_buf;
308 transfer.len = len + 1;
309
310 spi_message_add_tail(&transfer, &msg);
311 spi_sync(spi, &msg);
312 }
313
spi_max3420_enable(struct max3420_ep * ep)314 static int spi_max3420_enable(struct max3420_ep *ep)
315 {
316 struct max3420_udc *udc = ep->udc;
317 unsigned long flags;
318 u8 epdis, epien;
319 int todo;
320
321 spin_lock_irqsave(&ep->lock, flags);
322 todo = ep->todo & ENABLE_EP;
323 ep->todo &= ~ENABLE_EP;
324 spin_unlock_irqrestore(&ep->lock, flags);
325
326 if (!todo || ep->id == 0)
327 return false;
328
329 epien = spi_rd8(udc, MAX3420_REG_EPIEN);
330 epdis = spi_rd8(udc, MAX3420_REG_CLRTOGS);
331
332 if (todo == ENABLE) {
333 epdis &= ~BIT(ep->id + 4);
334 epien |= BIT(ep->id + 1);
335 } else {
336 epdis |= BIT(ep->id + 4);
337 epien &= ~BIT(ep->id + 1);
338 }
339
340 spi_wr8(udc, MAX3420_REG_CLRTOGS, epdis);
341 spi_wr8(udc, MAX3420_REG_EPIEN, epien);
342
343 return true;
344 }
345
spi_max3420_stall(struct max3420_ep * ep)346 static int spi_max3420_stall(struct max3420_ep *ep)
347 {
348 struct max3420_udc *udc = ep->udc;
349 unsigned long flags;
350 u8 epstalls;
351 int todo;
352
353 spin_lock_irqsave(&ep->lock, flags);
354 todo = ep->todo & STALL_EP;
355 ep->todo &= ~STALL_EP;
356 spin_unlock_irqrestore(&ep->lock, flags);
357
358 if (!todo || ep->id == 0)
359 return false;
360
361 epstalls = spi_rd8(udc, MAX3420_REG_EPSTALLS);
362 if (todo == STALL) {
363 ep->halted = 1;
364 epstalls |= BIT(ep->id + 1);
365 } else {
366 u8 clrtogs;
367
368 ep->halted = 0;
369 epstalls &= ~BIT(ep->id + 1);
370 clrtogs = spi_rd8(udc, MAX3420_REG_CLRTOGS);
371 clrtogs |= BIT(ep->id + 1);
372 spi_wr8(udc, MAX3420_REG_CLRTOGS, clrtogs);
373 }
374 spi_wr8(udc, MAX3420_REG_EPSTALLS, epstalls | ACKSTAT);
375
376 return true;
377 }
378
spi_max3420_rwkup(struct max3420_udc * udc)379 static int spi_max3420_rwkup(struct max3420_udc *udc)
380 {
381 unsigned long flags;
382 int wake_remote;
383 u8 usbctl;
384
385 spin_lock_irqsave(&udc->lock, flags);
386 wake_remote = udc->todo & REMOTE_WAKEUP;
387 udc->todo &= ~REMOTE_WAKEUP;
388 spin_unlock_irqrestore(&udc->lock, flags);
389
390 if (!wake_remote || !udc->suspended)
391 return false;
392
393 /* Set Remote-WkUp Signal*/
394 usbctl = spi_rd8(udc, MAX3420_REG_USBCTL);
395 usbctl |= SIGRWU;
396 spi_wr8(udc, MAX3420_REG_USBCTL, usbctl);
397
398 msleep_interruptible(5);
399
400 /* Clear Remote-WkUp Signal*/
401 usbctl = spi_rd8(udc, MAX3420_REG_USBCTL);
402 usbctl &= ~SIGRWU;
403 spi_wr8(udc, MAX3420_REG_USBCTL, usbctl);
404
405 udc->suspended = false;
406
407 return true;
408 }
409
410 static void max3420_nuke(struct max3420_ep *ep, int status);
__max3420_stop(struct max3420_udc * udc)411 static void __max3420_stop(struct max3420_udc *udc)
412 {
413 u8 val;
414 int i;
415
416 /* clear all pending requests */
417 for (i = 1; i < MAX3420_MAX_EPS; i++)
418 max3420_nuke(&udc->ep[i], -ECONNRESET);
419
420 /* Disable IRQ to CPU */
421 spi_wr8(udc, MAX3420_REG_CPUCTL, 0);
422
423 val = spi_rd8(udc, MAX3420_REG_USBCTL);
424 val |= PWRDOWN;
425 if (udc->is_selfpowered)
426 val &= ~HOSCSTEN;
427 else
428 val |= HOSCSTEN;
429 spi_wr8(udc, MAX3420_REG_USBCTL, val);
430 }
431
__max3420_start(struct max3420_udc * udc)432 static void __max3420_start(struct max3420_udc *udc)
433 {
434 u8 val;
435
436 /* Need this delay if bus-powered,
437 * but even for self-powered it helps stability
438 */
439 msleep_interruptible(250);
440
441 /* configure SPI */
442 spi_wr8(udc, MAX3420_REG_PINCTL, FDUPSPI);
443
444 /* Chip Reset */
445 spi_wr8(udc, MAX3420_REG_USBCTL, CHIPRES);
446 msleep_interruptible(5);
447 spi_wr8(udc, MAX3420_REG_USBCTL, 0);
448
449 /* Poll for OSC to stabilize */
450 while (1) {
451 val = spi_rd8(udc, MAX3420_REG_USBIRQ);
452 if (val & OSCOKIRQ)
453 break;
454 cond_resched();
455 }
456
457 /* Enable PULL-UP only when Vbus detected */
458 val = spi_rd8(udc, MAX3420_REG_USBCTL);
459 val |= VBGATE | CONNECT;
460 spi_wr8(udc, MAX3420_REG_USBCTL, val);
461
462 val = URESDNIRQ | URESIRQ;
463 if (udc->is_selfpowered)
464 val |= NOVBUSIRQ;
465 spi_wr8(udc, MAX3420_REG_USBIEN, val);
466
467 /* Enable only EP0 interrupts */
468 val = IN0BAVIRQ | OUT0DAVIRQ | SUDAVIRQ;
469 spi_wr8(udc, MAX3420_REG_EPIEN, val);
470
471 /* Enable IRQ to CPU */
472 spi_wr8(udc, MAX3420_REG_CPUCTL, IE);
473 }
474
max3420_start(struct max3420_udc * udc)475 static int max3420_start(struct max3420_udc *udc)
476 {
477 unsigned long flags;
478 int todo;
479
480 spin_lock_irqsave(&udc->lock, flags);
481 todo = udc->todo & UDC_START;
482 udc->todo &= ~UDC_START;
483 spin_unlock_irqrestore(&udc->lock, flags);
484
485 if (!todo)
486 return false;
487
488 if (udc->vbus_active && udc->softconnect)
489 __max3420_start(udc);
490 else
491 __max3420_stop(udc);
492
493 return true;
494 }
495
max3420_vbus_handler(int irq,void * dev_id)496 static irqreturn_t max3420_vbus_handler(int irq, void *dev_id)
497 {
498 struct max3420_udc *udc = dev_id;
499 unsigned long flags;
500
501 spin_lock_irqsave(&udc->lock, flags);
502 /* its a vbus change interrupt */
503 udc->vbus_active = !udc->vbus_active;
504 udc->todo |= UDC_START;
505 usb_udc_vbus_handler(&udc->gadget, udc->vbus_active);
506 usb_gadget_set_state(&udc->gadget, udc->vbus_active
507 ? USB_STATE_POWERED : USB_STATE_NOTATTACHED);
508 spin_unlock_irqrestore(&udc->lock, flags);
509
510 if (udc->thread_task)
511 wake_up_process(udc->thread_task);
512
513 return IRQ_HANDLED;
514 }
515
max3420_irq_handler(int irq,void * dev_id)516 static irqreturn_t max3420_irq_handler(int irq, void *dev_id)
517 {
518 struct max3420_udc *udc = dev_id;
519 struct spi_device *spi = udc->spi;
520 unsigned long flags;
521
522 spin_lock_irqsave(&udc->lock, flags);
523 if ((udc->todo & ENABLE_IRQ) == 0) {
524 disable_irq_nosync(spi->irq);
525 udc->todo |= ENABLE_IRQ;
526 }
527 spin_unlock_irqrestore(&udc->lock, flags);
528
529 if (udc->thread_task)
530 wake_up_process(udc->thread_task);
531
532 return IRQ_HANDLED;
533 }
534
max3420_getstatus(struct max3420_udc * udc)535 static void max3420_getstatus(struct max3420_udc *udc)
536 {
537 struct max3420_ep *ep;
538 u16 status = 0;
539
540 switch (udc->setup.bRequestType & USB_RECIP_MASK) {
541 case USB_RECIP_DEVICE:
542 /* Get device status */
543 status = udc->gadget.is_selfpowered << USB_DEVICE_SELF_POWERED;
544 status |= (udc->remote_wkp << USB_DEVICE_REMOTE_WAKEUP);
545 break;
546 case USB_RECIP_INTERFACE:
547 if (udc->driver->setup(&udc->gadget, &udc->setup) < 0)
548 goto stall;
549 break;
550 case USB_RECIP_ENDPOINT:
551 ep = &udc->ep[udc->setup.wIndex & USB_ENDPOINT_NUMBER_MASK];
552 if (udc->setup.wIndex & USB_DIR_IN) {
553 if (!ep->ep_usb.caps.dir_in)
554 goto stall;
555 } else {
556 if (!ep->ep_usb.caps.dir_out)
557 goto stall;
558 }
559 if (ep->halted)
560 status = 1 << USB_ENDPOINT_HALT;
561 break;
562 default:
563 goto stall;
564 }
565
566 status = cpu_to_le16(status);
567 spi_wr_buf(udc, MAX3420_REG_EP0FIFO, &status, 2);
568 spi_wr8_ack(udc, MAX3420_REG_EP0BC, 2, 1);
569 return;
570 stall:
571 dev_err(udc->dev, "Can't respond to getstatus request\n");
572 spi_wr8(udc, MAX3420_REG_EPSTALLS, STLEP0IN | STLEP0OUT | STLSTAT);
573 }
574
max3420_set_clear_feature(struct max3420_udc * udc)575 static void max3420_set_clear_feature(struct max3420_udc *udc)
576 {
577 struct max3420_ep *ep;
578 int set = udc->setup.bRequest == USB_REQ_SET_FEATURE;
579 unsigned long flags;
580 int id;
581
582 switch (udc->setup.bRequestType) {
583 case USB_RECIP_DEVICE:
584 if (udc->setup.wValue != USB_DEVICE_REMOTE_WAKEUP)
585 break;
586
587 if (udc->setup.bRequest == USB_REQ_SET_FEATURE)
588 udc->remote_wkp = 1;
589 else
590 udc->remote_wkp = 0;
591
592 return spi_ack_ctrl(udc);
593
594 case USB_RECIP_ENDPOINT:
595 if (udc->setup.wValue != USB_ENDPOINT_HALT)
596 break;
597
598 id = udc->setup.wIndex & USB_ENDPOINT_NUMBER_MASK;
599 ep = &udc->ep[id];
600
601 spin_lock_irqsave(&ep->lock, flags);
602 ep->todo &= ~STALL_EP;
603 if (set)
604 ep->todo |= STALL;
605 else
606 ep->todo |= UNSTALL;
607 spin_unlock_irqrestore(&ep->lock, flags);
608
609 spi_max3420_stall(ep);
610 return;
611 default:
612 break;
613 }
614
615 dev_err(udc->dev, "Can't respond to SET/CLEAR FEATURE\n");
616 spi_wr8(udc, MAX3420_REG_EPSTALLS, STLEP0IN | STLEP0OUT | STLSTAT);
617 }
618
max3420_handle_setup(struct max3420_udc * udc)619 static void max3420_handle_setup(struct max3420_udc *udc)
620 {
621 struct usb_ctrlrequest setup;
622
623 spi_rd_buf(udc, MAX3420_REG_SUDFIFO, (void *)&setup, 8);
624
625 udc->setup = setup;
626 udc->setup.wValue = cpu_to_le16(setup.wValue);
627 udc->setup.wIndex = cpu_to_le16(setup.wIndex);
628 udc->setup.wLength = cpu_to_le16(setup.wLength);
629
630 switch (udc->setup.bRequest) {
631 case USB_REQ_GET_STATUS:
632 /* Data+Status phase form udc */
633 if ((udc->setup.bRequestType &
634 (USB_DIR_IN | USB_TYPE_MASK)) !=
635 (USB_DIR_IN | USB_TYPE_STANDARD)) {
636 break;
637 }
638 return max3420_getstatus(udc);
639 case USB_REQ_SET_ADDRESS:
640 /* Status phase from udc */
641 if (udc->setup.bRequestType != (USB_DIR_OUT |
642 USB_TYPE_STANDARD | USB_RECIP_DEVICE)) {
643 break;
644 }
645 spi_rd8_ack(udc, MAX3420_REG_FNADDR, 1);
646 dev_dbg(udc->dev, "Assigned Address=%d\n", udc->setup.wValue);
647 return;
648 case USB_REQ_CLEAR_FEATURE:
649 case USB_REQ_SET_FEATURE:
650 /* Requests with no data phase, status phase from udc */
651 if ((udc->setup.bRequestType & USB_TYPE_MASK)
652 != USB_TYPE_STANDARD)
653 break;
654 return max3420_set_clear_feature(udc);
655 default:
656 break;
657 }
658
659 if (udc->driver->setup(&udc->gadget, &setup) < 0) {
660 /* Stall EP0 */
661 spi_wr8(udc, MAX3420_REG_EPSTALLS,
662 STLEP0IN | STLEP0OUT | STLSTAT);
663 }
664 }
665
max3420_req_done(struct max3420_req * req,int status)666 static void max3420_req_done(struct max3420_req *req, int status)
667 {
668 struct max3420_ep *ep = req->ep;
669 struct max3420_udc *udc = ep->udc;
670
671 if (req->usb_req.status == -EINPROGRESS)
672 req->usb_req.status = status;
673 else
674 status = req->usb_req.status;
675
676 if (status && status != -ESHUTDOWN)
677 dev_err(udc->dev, "%s done %p, status %d\n",
678 ep->ep_usb.name, req, status);
679
680 if (req->usb_req.complete)
681 req->usb_req.complete(&ep->ep_usb, &req->usb_req);
682 }
683
max3420_do_data(struct max3420_udc * udc,int ep_id,int in)684 static int max3420_do_data(struct max3420_udc *udc, int ep_id, int in)
685 {
686 struct max3420_ep *ep = &udc->ep[ep_id];
687 struct max3420_req *req;
688 int done, length, psz;
689 void *buf;
690
691 if (list_empty(&ep->queue))
692 return false;
693
694 req = list_first_entry(&ep->queue, struct max3420_req, queue);
695 buf = req->usb_req.buf + req->usb_req.actual;
696
697 psz = ep->ep_usb.maxpacket;
698 length = req->usb_req.length - req->usb_req.actual;
699 length = min(length, psz);
700
701 if (length == 0) {
702 done = 1;
703 goto xfer_done;
704 }
705
706 done = 0;
707 if (in) {
708 prefetch(buf);
709 spi_wr_buf(udc, MAX3420_REG_EP0FIFO + ep_id, buf, length);
710 spi_wr8(udc, MAX3420_REG_EP0BC + ep_id, length);
711 if (length < psz)
712 done = 1;
713 } else {
714 psz = spi_rd8(udc, MAX3420_REG_EP0BC + ep_id);
715 length = min(length, psz);
716 prefetchw(buf);
717 spi_rd_buf(udc, MAX3420_REG_EP0FIFO + ep_id, buf, length);
718 if (length < ep->ep_usb.maxpacket)
719 done = 1;
720 }
721
722 req->usb_req.actual += length;
723
724 if (req->usb_req.actual == req->usb_req.length)
725 done = 1;
726
727 xfer_done:
728 if (done) {
729 unsigned long flags;
730
731 spin_lock_irqsave(&ep->lock, flags);
732 list_del_init(&req->queue);
733 spin_unlock_irqrestore(&ep->lock, flags);
734
735 if (ep_id == 0)
736 spi_ack_ctrl(udc);
737
738 max3420_req_done(req, 0);
739 }
740
741 return true;
742 }
743
max3420_handle_irqs(struct max3420_udc * udc)744 static int max3420_handle_irqs(struct max3420_udc *udc)
745 {
746 u8 epien, epirq, usbirq, usbien, reg[4];
747 bool ret = false;
748
749 spi_rd_buf(udc, MAX3420_REG_EPIRQ, reg, 4);
750 epirq = reg[0];
751 epien = reg[1];
752 usbirq = reg[2];
753 usbien = reg[3];
754
755 usbirq &= usbien;
756 epirq &= epien;
757
758 if (epirq & SUDAVIRQ) {
759 spi_wr8(udc, MAX3420_REG_EPIRQ, SUDAVIRQ);
760 max3420_handle_setup(udc);
761 return true;
762 }
763
764 if (usbirq & VBUSIRQ) {
765 spi_wr8(udc, MAX3420_REG_USBIRQ, VBUSIRQ);
766 dev_dbg(udc->dev, "Cable plugged in\n");
767 return true;
768 }
769
770 if (usbirq & NOVBUSIRQ) {
771 spi_wr8(udc, MAX3420_REG_USBIRQ, NOVBUSIRQ);
772 dev_dbg(udc->dev, "Cable pulled out\n");
773 return true;
774 }
775
776 if (usbirq & URESIRQ) {
777 spi_wr8(udc, MAX3420_REG_USBIRQ, URESIRQ);
778 dev_dbg(udc->dev, "USB Reset - Start\n");
779 return true;
780 }
781
782 if (usbirq & URESDNIRQ) {
783 spi_wr8(udc, MAX3420_REG_USBIRQ, URESDNIRQ);
784 dev_dbg(udc->dev, "USB Reset - END\n");
785 spi_wr8(udc, MAX3420_REG_USBIEN, URESDNIRQ | URESIRQ);
786 spi_wr8(udc, MAX3420_REG_EPIEN, SUDAVIRQ | IN0BAVIRQ
787 | OUT0DAVIRQ);
788 return true;
789 }
790
791 if (usbirq & SUSPIRQ) {
792 spi_wr8(udc, MAX3420_REG_USBIRQ, SUSPIRQ);
793 dev_dbg(udc->dev, "USB Suspend - Enter\n");
794 udc->suspended = true;
795 return true;
796 }
797
798 if (usbirq & BUSACTIRQ) {
799 spi_wr8(udc, MAX3420_REG_USBIRQ, BUSACTIRQ);
800 dev_dbg(udc->dev, "USB Suspend - Exit\n");
801 udc->suspended = false;
802 return true;
803 }
804
805 if (usbirq & RWUDNIRQ) {
806 spi_wr8(udc, MAX3420_REG_USBIRQ, RWUDNIRQ);
807 dev_dbg(udc->dev, "Asked Host to wakeup\n");
808 return true;
809 }
810
811 if (usbirq & OSCOKIRQ) {
812 spi_wr8(udc, MAX3420_REG_USBIRQ, OSCOKIRQ);
813 dev_dbg(udc->dev, "Osc stabilized, start work\n");
814 return true;
815 }
816
817 if (epirq & OUT0DAVIRQ && max3420_do_data(udc, 0, 0)) {
818 spi_wr8_ack(udc, MAX3420_REG_EPIRQ, OUT0DAVIRQ, 1);
819 ret = true;
820 }
821
822 if (epirq & IN0BAVIRQ && max3420_do_data(udc, 0, 1))
823 ret = true;
824
825 if (epirq & OUT1DAVIRQ && max3420_do_data(udc, 1, 0)) {
826 spi_wr8_ack(udc, MAX3420_REG_EPIRQ, OUT1DAVIRQ, 1);
827 ret = true;
828 }
829
830 if (epirq & IN2BAVIRQ && max3420_do_data(udc, 2, 1))
831 ret = true;
832
833 if (epirq & IN3BAVIRQ && max3420_do_data(udc, 3, 1))
834 ret = true;
835
836 return ret;
837 }
838
max3420_thread(void * dev_id)839 static int max3420_thread(void *dev_id)
840 {
841 struct max3420_udc *udc = dev_id;
842 struct spi_device *spi = udc->spi;
843 int i, loop_again = 1;
844 unsigned long flags;
845
846 while (!kthread_should_stop()) {
847 if (!loop_again) {
848 ktime_t kt = ns_to_ktime(1000 * 1000 * 250); /* 250ms */
849
850 set_current_state(TASK_INTERRUPTIBLE);
851
852 spin_lock_irqsave(&udc->lock, flags);
853 if (udc->todo & ENABLE_IRQ) {
854 enable_irq(spi->irq);
855 udc->todo &= ~ENABLE_IRQ;
856 }
857 spin_unlock_irqrestore(&udc->lock, flags);
858
859 schedule_hrtimeout(&kt, HRTIMER_MODE_REL);
860 }
861 loop_again = 0;
862
863 mutex_lock(&udc->spi_bus_mutex);
864
865 /* If bus-vbus_active and disconnected */
866 if (!udc->vbus_active || !udc->softconnect)
867 goto loop;
868
869 if (max3420_start(udc)) {
870 loop_again = 1;
871 goto loop;
872 }
873
874 if (max3420_handle_irqs(udc)) {
875 loop_again = 1;
876 goto loop;
877 }
878
879 if (spi_max3420_rwkup(udc)) {
880 loop_again = 1;
881 goto loop;
882 }
883
884 max3420_do_data(udc, 0, 1); /* get done with the EP0 ZLP */
885
886 for (i = 1; i < MAX3420_MAX_EPS; i++) {
887 struct max3420_ep *ep = &udc->ep[i];
888
889 if (spi_max3420_enable(ep))
890 loop_again = 1;
891 if (spi_max3420_stall(ep))
892 loop_again = 1;
893 }
894 loop:
895 mutex_unlock(&udc->spi_bus_mutex);
896 }
897
898 set_current_state(TASK_RUNNING);
899 dev_info(udc->dev, "SPI thread exiting\n");
900 return 0;
901 }
902
max3420_ep_set_halt(struct usb_ep * _ep,int stall)903 static int max3420_ep_set_halt(struct usb_ep *_ep, int stall)
904 {
905 struct max3420_ep *ep = to_max3420_ep(_ep);
906 struct max3420_udc *udc = ep->udc;
907 unsigned long flags;
908
909 spin_lock_irqsave(&ep->lock, flags);
910
911 ep->todo &= ~STALL_EP;
912 if (stall)
913 ep->todo |= STALL;
914 else
915 ep->todo |= UNSTALL;
916
917 spin_unlock_irqrestore(&ep->lock, flags);
918
919 wake_up_process(udc->thread_task);
920
921 dev_dbg(udc->dev, "%sStall %s\n", stall ? "" : "Un", ep->name);
922 return 0;
923 }
924
__max3420_ep_enable(struct max3420_ep * ep,const struct usb_endpoint_descriptor * desc)925 static int __max3420_ep_enable(struct max3420_ep *ep,
926 const struct usb_endpoint_descriptor *desc)
927 {
928 unsigned int maxp = usb_endpoint_maxp(desc);
929 unsigned long flags;
930
931 spin_lock_irqsave(&ep->lock, flags);
932 ep->ep_usb.desc = desc;
933 ep->ep_usb.maxpacket = maxp;
934
935 ep->todo &= ~ENABLE_EP;
936 ep->todo |= ENABLE;
937 spin_unlock_irqrestore(&ep->lock, flags);
938
939 return 0;
940 }
941
max3420_ep_enable(struct usb_ep * _ep,const struct usb_endpoint_descriptor * desc)942 static int max3420_ep_enable(struct usb_ep *_ep,
943 const struct usb_endpoint_descriptor *desc)
944 {
945 struct max3420_ep *ep = to_max3420_ep(_ep);
946 struct max3420_udc *udc = ep->udc;
947
948 __max3420_ep_enable(ep, desc);
949
950 wake_up_process(udc->thread_task);
951
952 return 0;
953 }
954
max3420_nuke(struct max3420_ep * ep,int status)955 static void max3420_nuke(struct max3420_ep *ep, int status)
956 {
957 struct max3420_req *req, *r;
958 unsigned long flags;
959
960 spin_lock_irqsave(&ep->lock, flags);
961
962 list_for_each_entry_safe(req, r, &ep->queue, queue) {
963 list_del_init(&req->queue);
964
965 spin_unlock_irqrestore(&ep->lock, flags);
966 max3420_req_done(req, status);
967 spin_lock_irqsave(&ep->lock, flags);
968 }
969
970 spin_unlock_irqrestore(&ep->lock, flags);
971 }
972
__max3420_ep_disable(struct max3420_ep * ep)973 static void __max3420_ep_disable(struct max3420_ep *ep)
974 {
975 struct max3420_udc *udc = ep->udc;
976 unsigned long flags;
977
978 spin_lock_irqsave(&ep->lock, flags);
979
980 ep->ep_usb.desc = NULL;
981
982 ep->todo &= ~ENABLE_EP;
983 ep->todo |= DISABLE;
984
985 spin_unlock_irqrestore(&ep->lock, flags);
986
987 dev_dbg(udc->dev, "Disabled %s\n", ep->name);
988 }
989
max3420_ep_disable(struct usb_ep * _ep)990 static int max3420_ep_disable(struct usb_ep *_ep)
991 {
992 struct max3420_ep *ep = to_max3420_ep(_ep);
993 struct max3420_udc *udc = ep->udc;
994
995 max3420_nuke(ep, -ESHUTDOWN);
996
997 __max3420_ep_disable(ep);
998
999 wake_up_process(udc->thread_task);
1000
1001 return 0;
1002 }
1003
max3420_alloc_request(struct usb_ep * _ep,gfp_t gfp_flags)1004 static struct usb_request *max3420_alloc_request(struct usb_ep *_ep,
1005 gfp_t gfp_flags)
1006 {
1007 struct max3420_ep *ep = to_max3420_ep(_ep);
1008 struct max3420_req *req;
1009
1010 req = kzalloc(sizeof(*req), gfp_flags);
1011 if (!req)
1012 return NULL;
1013
1014 req->ep = ep;
1015
1016 return &req->usb_req;
1017 }
1018
max3420_free_request(struct usb_ep * _ep,struct usb_request * _req)1019 static void max3420_free_request(struct usb_ep *_ep, struct usb_request *_req)
1020 {
1021 kfree(to_max3420_req(_req));
1022 }
1023
max3420_ep_queue(struct usb_ep * _ep,struct usb_request * _req,gfp_t ignored)1024 static int max3420_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1025 gfp_t ignored)
1026 {
1027 struct max3420_req *req = to_max3420_req(_req);
1028 struct max3420_ep *ep = to_max3420_ep(_ep);
1029 struct max3420_udc *udc = ep->udc;
1030 unsigned long flags;
1031
1032 _req->status = -EINPROGRESS;
1033 _req->actual = 0;
1034
1035 spin_lock_irqsave(&ep->lock, flags);
1036 list_add_tail(&req->queue, &ep->queue);
1037 spin_unlock_irqrestore(&ep->lock, flags);
1038
1039 wake_up_process(udc->thread_task);
1040 return 0;
1041 }
1042
max3420_ep_dequeue(struct usb_ep * _ep,struct usb_request * _req)1043 static int max3420_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1044 {
1045 struct max3420_req *t = NULL;
1046 struct max3420_req *req = to_max3420_req(_req);
1047 struct max3420_req *iter;
1048 struct max3420_ep *ep = to_max3420_ep(_ep);
1049 unsigned long flags;
1050
1051 spin_lock_irqsave(&ep->lock, flags);
1052
1053 /* Pluck the descriptor from queue */
1054 list_for_each_entry(iter, &ep->queue, queue) {
1055 if (iter != req)
1056 continue;
1057 list_del_init(&req->queue);
1058 t = iter;
1059 break;
1060 }
1061
1062 spin_unlock_irqrestore(&ep->lock, flags);
1063
1064 if (t)
1065 max3420_req_done(req, -ECONNRESET);
1066
1067 return 0;
1068 }
1069
1070 static const struct usb_ep_ops max3420_ep_ops = {
1071 .enable = max3420_ep_enable,
1072 .disable = max3420_ep_disable,
1073 .alloc_request = max3420_alloc_request,
1074 .free_request = max3420_free_request,
1075 .queue = max3420_ep_queue,
1076 .dequeue = max3420_ep_dequeue,
1077 .set_halt = max3420_ep_set_halt,
1078 };
1079
max3420_wakeup(struct usb_gadget * gadget)1080 static int max3420_wakeup(struct usb_gadget *gadget)
1081 {
1082 struct max3420_udc *udc = to_udc(gadget);
1083 unsigned long flags;
1084 int ret = -EINVAL;
1085
1086 spin_lock_irqsave(&udc->lock, flags);
1087
1088 /* Only if wakeup allowed by host */
1089 if (udc->remote_wkp) {
1090 udc->todo |= REMOTE_WAKEUP;
1091 ret = 0;
1092 }
1093
1094 spin_unlock_irqrestore(&udc->lock, flags);
1095
1096 if (udc->thread_task)
1097 wake_up_process(udc->thread_task);
1098 return ret;
1099 }
1100
max3420_udc_start(struct usb_gadget * gadget,struct usb_gadget_driver * driver)1101 static int max3420_udc_start(struct usb_gadget *gadget,
1102 struct usb_gadget_driver *driver)
1103 {
1104 struct max3420_udc *udc = to_udc(gadget);
1105 unsigned long flags;
1106
1107 spin_lock_irqsave(&udc->lock, flags);
1108 /* hook up the driver */
1109 udc->driver = driver;
1110 udc->gadget.speed = USB_SPEED_FULL;
1111
1112 udc->gadget.is_selfpowered = udc->is_selfpowered;
1113 udc->remote_wkp = 0;
1114 udc->softconnect = true;
1115 udc->todo |= UDC_START;
1116 spin_unlock_irqrestore(&udc->lock, flags);
1117
1118 if (udc->thread_task)
1119 wake_up_process(udc->thread_task);
1120
1121 return 0;
1122 }
1123
max3420_udc_stop(struct usb_gadget * gadget)1124 static int max3420_udc_stop(struct usb_gadget *gadget)
1125 {
1126 struct max3420_udc *udc = to_udc(gadget);
1127 unsigned long flags;
1128
1129 spin_lock_irqsave(&udc->lock, flags);
1130 udc->is_selfpowered = udc->gadget.is_selfpowered;
1131 udc->gadget.speed = USB_SPEED_UNKNOWN;
1132 udc->driver = NULL;
1133 udc->softconnect = false;
1134 udc->todo |= UDC_START;
1135 spin_unlock_irqrestore(&udc->lock, flags);
1136
1137 if (udc->thread_task)
1138 wake_up_process(udc->thread_task);
1139
1140 return 0;
1141 }
1142
1143 static const struct usb_gadget_ops max3420_udc_ops = {
1144 .udc_start = max3420_udc_start,
1145 .udc_stop = max3420_udc_stop,
1146 .wakeup = max3420_wakeup,
1147 };
1148
max3420_eps_init(struct max3420_udc * udc)1149 static void max3420_eps_init(struct max3420_udc *udc)
1150 {
1151 int idx;
1152
1153 INIT_LIST_HEAD(&udc->gadget.ep_list);
1154
1155 for (idx = 0; idx < MAX3420_MAX_EPS; idx++) {
1156 struct max3420_ep *ep = &udc->ep[idx];
1157
1158 spin_lock_init(&ep->lock);
1159 INIT_LIST_HEAD(&ep->queue);
1160
1161 ep->udc = udc;
1162 ep->id = idx;
1163 ep->halted = 0;
1164 ep->maxpacket = 0;
1165 ep->ep_usb.name = ep->name;
1166 ep->ep_usb.ops = &max3420_ep_ops;
1167 usb_ep_set_maxpacket_limit(&ep->ep_usb, MAX3420_EP_MAX_PACKET);
1168
1169 if (idx == 0) { /* For EP0 */
1170 ep->ep_usb.desc = &ep0_desc;
1171 ep->ep_usb.maxpacket = usb_endpoint_maxp(&ep0_desc);
1172 ep->ep_usb.caps.type_control = true;
1173 ep->ep_usb.caps.dir_in = true;
1174 ep->ep_usb.caps.dir_out = true;
1175 snprintf(ep->name, MAX3420_EPNAME_SIZE, "ep0");
1176 continue;
1177 }
1178
1179 if (idx == 1) { /* EP1 is OUT */
1180 ep->ep_usb.caps.dir_in = false;
1181 ep->ep_usb.caps.dir_out = true;
1182 snprintf(ep->name, MAX3420_EPNAME_SIZE, "ep1-bulk-out");
1183 } else { /* EP2 & EP3 are IN */
1184 ep->ep_usb.caps.dir_in = true;
1185 ep->ep_usb.caps.dir_out = false;
1186 snprintf(ep->name, MAX3420_EPNAME_SIZE,
1187 "ep%d-bulk-in", idx);
1188 }
1189 ep->ep_usb.caps.type_iso = false;
1190 ep->ep_usb.caps.type_int = false;
1191 ep->ep_usb.caps.type_bulk = true;
1192
1193 list_add_tail(&ep->ep_usb.ep_list,
1194 &udc->gadget.ep_list);
1195 }
1196 }
1197
max3420_probe(struct spi_device * spi)1198 static int max3420_probe(struct spi_device *spi)
1199 {
1200 struct max3420_udc *udc;
1201 int err, irq;
1202 u8 reg[8];
1203
1204 if (spi->controller->flags & SPI_CONTROLLER_HALF_DUPLEX) {
1205 dev_err(&spi->dev, "UDC needs full duplex to work\n");
1206 return -EINVAL;
1207 }
1208
1209 spi->mode = SPI_MODE_3;
1210 spi->bits_per_word = 8;
1211
1212 err = spi_setup(spi);
1213 if (err) {
1214 dev_err(&spi->dev, "Unable to setup SPI bus\n");
1215 return -EFAULT;
1216 }
1217
1218 udc = devm_kzalloc(&spi->dev, sizeof(*udc), GFP_KERNEL);
1219 if (!udc)
1220 return -ENOMEM;
1221
1222 udc->spi = spi;
1223
1224 udc->remote_wkp = 0;
1225
1226 /* Setup gadget structure */
1227 udc->gadget.ops = &max3420_udc_ops;
1228 udc->gadget.max_speed = USB_SPEED_FULL;
1229 udc->gadget.speed = USB_SPEED_UNKNOWN;
1230 udc->gadget.ep0 = &udc->ep[0].ep_usb;
1231 udc->gadget.name = driver_name;
1232
1233 spin_lock_init(&udc->lock);
1234 mutex_init(&udc->spi_bus_mutex);
1235
1236 udc->ep0req.ep = &udc->ep[0];
1237 udc->ep0req.usb_req.buf = udc->ep0buf;
1238 INIT_LIST_HEAD(&udc->ep0req.queue);
1239
1240 /* setup Endpoints */
1241 max3420_eps_init(udc);
1242
1243 /* configure SPI */
1244 spi_rd_buf(udc, MAX3420_REG_EPIRQ, reg, 8);
1245 spi_wr8(udc, MAX3420_REG_PINCTL, FDUPSPI);
1246
1247 err = usb_add_gadget_udc(&spi->dev, &udc->gadget);
1248 if (err)
1249 return err;
1250
1251 udc->dev = &udc->gadget.dev;
1252
1253 spi_set_drvdata(spi, udc);
1254
1255 irq = of_irq_get_byname(spi->dev.of_node, "udc");
1256 err = devm_request_irq(&spi->dev, irq, max3420_irq_handler, 0,
1257 "max3420", udc);
1258 if (err < 0)
1259 goto del_gadget;
1260
1261 udc->thread_task = kthread_create(max3420_thread, udc,
1262 "max3420-thread");
1263 if (IS_ERR(udc->thread_task)) {
1264 err = PTR_ERR(udc->thread_task);
1265 goto del_gadget;
1266 }
1267
1268 irq = of_irq_get_byname(spi->dev.of_node, "vbus");
1269 if (irq <= 0) { /* no vbus irq implies self-powered design */
1270 udc->is_selfpowered = 1;
1271 udc->vbus_active = true;
1272 udc->todo |= UDC_START;
1273 usb_udc_vbus_handler(&udc->gadget, udc->vbus_active);
1274 usb_gadget_set_state(&udc->gadget, USB_STATE_POWERED);
1275 max3420_start(udc);
1276 } else {
1277 udc->is_selfpowered = 0;
1278 /* Detect current vbus status */
1279 spi_rd_buf(udc, MAX3420_REG_EPIRQ, reg, 8);
1280 if (reg[7] != 0xff)
1281 udc->vbus_active = true;
1282
1283 err = devm_request_irq(&spi->dev, irq,
1284 max3420_vbus_handler, 0, "vbus", udc);
1285 if (err < 0)
1286 goto del_gadget;
1287 }
1288
1289 return 0;
1290
1291 del_gadget:
1292 usb_del_gadget_udc(&udc->gadget);
1293 return err;
1294 }
1295
max3420_remove(struct spi_device * spi)1296 static void max3420_remove(struct spi_device *spi)
1297 {
1298 struct max3420_udc *udc = spi_get_drvdata(spi);
1299 unsigned long flags;
1300
1301 usb_del_gadget_udc(&udc->gadget);
1302
1303 spin_lock_irqsave(&udc->lock, flags);
1304
1305 kthread_stop(udc->thread_task);
1306
1307 spin_unlock_irqrestore(&udc->lock, flags);
1308 }
1309
1310 static const struct of_device_id max3420_udc_of_match[] = {
1311 { .compatible = "maxim,max3420-udc"},
1312 { .compatible = "maxim,max3421-udc"},
1313 {},
1314 };
1315 MODULE_DEVICE_TABLE(of, max3420_udc_of_match);
1316
1317 static struct spi_driver max3420_driver = {
1318 .driver = {
1319 .name = "max3420-udc",
1320 .of_match_table = max3420_udc_of_match,
1321 },
1322 .probe = max3420_probe,
1323 .remove = max3420_remove,
1324 };
1325
1326 module_spi_driver(max3420_driver);
1327
1328 MODULE_DESCRIPTION(DRIVER_DESC);
1329 MODULE_AUTHOR("Jassi Brar <jaswinder.singh@linaro.org>");
1330 MODULE_LICENSE("GPL");
1331