1/*	$NetBSD: atomic_cas.S,v 1.13 2014/02/21 16:21:02 martin Exp $	*/
2
3/*-
4 * Copyright (c) 2007, 2008 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Andrew Doran and Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#include <sys/param.h>
33#include "atomic_op_asm.h"
34
35#if defined(_HARDKERNEL)
36
37#include <machine/psl.h>
38
39#include "opt_multiprocessor.h"
40
41#define	DISABLE_INTERRUPTS						 \
42	rd	%psr, %o4			/* disable interrupts */;\
43	or	%o4, PSR_PIL, %o5					;\
44	wr	%o5, 0, %psr						;\
45	nop								;\
46	nop								;\
47	nop
48
49#define	RESTORE_INTERRUPTS						 \
50	wr	%o4, 0, %psr			/* enable interrupts */	;\
51	nop								;\
52	nop								;\
53	nop
54
55#else	/* _HARDKERNEL */
56
57#define	MULTIPROCESSOR	1
58#define	DISABLE_INTERRUPTS		/* nothing */
59#define	RESTORE_INTERRUPTS		/* nothing */
60
61#endif	/* _HARDKERNEL */
62
63#if defined(MULTIPROCESSOR)
64	.section .bss
65	.align	1024
66#ifdef __PIC__
67	.globl _C_LABEL(_atomic_cas_locktab)
68#endif
69OTYPE(_C_LABEL(_atomic_cas_locktab))
70_C_LABEL(_atomic_cas_locktab):
71	.space	1024
72
73#ifdef __PIC__
74/* o4 is not used for PSR in PIC cases, so we can use it here */
75#define GETLOCKTAB							\
76	PIC_PROLOGUE(%o3,%o4)						;\
77	set _C_LABEL(_atomic_cas_locktab), %o4				;\
78	ld [%o3 + %o4], %o3
79#else
80#define GETLOCKTAB							\
81	sethi	%hi(_C_LABEL(_atomic_cas_locktab)), %o3
82#endif
83
84#define	ACQUIRE_INTERLOCK						 \
85	DISABLE_INTERRUPTS						;\
86	srl	%o0, 3, %o5			/* get lock address */	;\
87	and	%o5, 1023, %o5						;\
88	GETLOCKTAB							;\
89	add	%o5, %o3, %o5						;\
90									;\
91	/* %o5 has interlock address */					;\
92									;\
931:	ldstub	[%o5], %o3			/* acquire lock */	;\
94	tst	%o3							;\
95	bz,a	2f							;\
96	 nop								;\
97	nop								;\
98	nop								;\
99	b,a	1b				/* spin	*/		;\
100	 nop								;\
101	/* We now hold the interlock */					;\
1022:
103
104#define	RELEASE_INTERLOCK						 \
105	stb	%g0, [%o5]			/* release interlock */	;\
106	RESTORE_INTERRUPTS
107
108#else /* ! MULTIPROCESSOR */
109
110#define	ACQUIRE_INTERLOCK	DISABLE_INTERRUPTS
111
112#define	RELEASE_INTERLOCK	RESTORE_INTERRUPTS
113
114#endif /* MULTIPROCESSOR */
115
116	.text
117
118/*
119 * The v7 and v8 SPARC doesn't have compare-and-swap, so we block interrupts
120 * and use an interlock.
121 *
122 * XXX On single CPU systems, this should use a restartable sequence:
123 * XXX there we don't need the overhead of interlocking.
124 *
125 * XXX NOTE!  The interlock trick only works if EVERYTHING writes to
126 * XXX the memory cell through this code path!
127 */
128ENTRY(_atomic_cas_32)
129	ACQUIRE_INTERLOCK
130	! %o4 has saved PSR value
131	! %o5 has interlock address
132
133	ld	[%o0], %o3			! get old value
134	cmp	%o1, %o3			! old == new?
135	beq,a	3f				! yes, do the store
136	 st	%o2, [%o0]			! (in the delay slot)
137
1383:	RELEASE_INTERLOCK
139
140	retl
141	 mov	%o3, %o0			! return old value
142
143ATOMIC_OP_ALIAS(atomic_cas_32,_atomic_cas_32)
144ATOMIC_OP_ALIAS(atomic_cas_uint,_atomic_cas_32)
145STRONG_ALIAS(_atomic_cas_uint,_atomic_cas_32)
146ATOMIC_OP_ALIAS(atomic_cas_ulong,_atomic_cas_32)
147STRONG_ALIAS(_atomic_cas_ulong,_atomic_cas_32)
148ATOMIC_OP_ALIAS(atomic_cas_ptr,_atomic_cas_32)
149STRONG_ALIAS(_atomic_cas_ptr,_atomic_cas_32)
150STRONG_ALIAS(__sync_val_compare_and_swap_4,_atomic_cas_32)
151
152ATOMIC_OP_ALIAS(atomic_cas_32_ni,_atomic_cas_32)
153STRONG_ALIAS(_atomic_cas_32_ni,_atomic_cas_32)
154ATOMIC_OP_ALIAS(atomic_cas_uint_ni,_atomic_cas_32)
155STRONG_ALIAS(_atomic_cas_uint_ni,_atomic_cas_32)
156ATOMIC_OP_ALIAS(atomic_cas_ulong_ni,_atomic_cas_32)
157STRONG_ALIAS(_atomic_cas_ulong_ni,_atomic_cas_32)
158ATOMIC_OP_ALIAS(atomic_cas_ptr_ni,_atomic_cas_32)
159STRONG_ALIAS(_atomic_cas_ptr_ni,_atomic_cas_32)
160