1; RUN: llc -mtriple=arm-eabi -mattr=+vfp2 %s -o - \ 2; RUN: | FileCheck %s -check-prefix=VFP2 3 4; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - \ 5; RUN: | FileCheck %s -check-prefix=NEON 6 7; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - \ 8; RUN: | FileCheck %s -check-prefix=A8 9 10; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 -regalloc=basic %s -o - \ 11; RUN: | FileCheck %s -check-prefix=A8 12 13; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math %s -o - \ 14; RUN: | FileCheck %s -check-prefix=A8U 15 16; RUN: llc -mtriple=arm-darwin -mcpu=cortex-a8 %s -o - \ 17; RUN: | FileCheck %s -check-prefix=A8U 18 19define float @t1(float %acc, float %a, float %b) nounwind { 20entry: 21; VFP2-LABEL: t1: 22; VFP2: vnmla.f32 23 24; NEON-LABEL: t1: 25; NEON: vnmla.f32 26 27; A8U-LABEL: t1: 28; A8U: vnmul.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}} 29; A8U: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}} 30 31; A8-LABEL: t1: 32; A8: vnmul.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}} 33; A8: vsub.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}} 34 %0 = fmul float %a, %b 35 %1 = fsub float -0.0, %0 36 %2 = fsub float %1, %acc 37 ret float %2 38} 39 40define float @t2(float %acc, float %a, float %b) nounwind { 41entry: 42; VFP2-LABEL: t2: 43; VFP2: vnmla.f32 44 45; NEON-LABEL: t2: 46; NEON: vnmla.f32 47 48; A8U-LABEL: t2: 49; A8U: vnmul.f32 s{{[01234]}}, s{{[01234]}}, s{{[01234]}} 50; A8U: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}} 51 52; A8-LABEL: t2: 53; A8: vnmul.f32 s{{[01234]}}, s{{[01234]}}, s{{[01234]}} 54; A8: vsub.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}} 55 %0 = fmul float %a, %b 56 %1 = fmul float -1.0, %0 57 %2 = fsub float %1, %acc 58 ret float %2 59} 60 61define double @t3(double %acc, double %a, double %b) nounwind { 62entry: 63; VFP2-LABEL: t3: 64; VFP2: vnmla.f64 65 66; NEON-LABEL: t3: 67; NEON: vnmla.f64 68 69; A8U-LABEL: t3: 70; A8U: vnmul.f64 d 71; A8U: vsub.f64 d 72 73; A8-LABEL: t3: 74; A8: vnmul.f64 d 75; A8: vsub.f64 d 76 %0 = fmul double %a, %b 77 %1 = fsub double -0.0, %0 78 %2 = fsub double %1, %acc 79 ret double %2 80} 81 82define double @t4(double %acc, double %a, double %b) nounwind { 83entry: 84; VFP2-LABEL: t4: 85; VFP2: vnmla.f64 86 87; NEON-LABEL: t4: 88; NEON: vnmla.f64 89 90; A8U-LABEL: t4: 91; A8U: vnmul.f64 d 92; A8U: vsub.f64 d 93 94; A8-LABEL: t4: 95; A8: vnmul.f64 d 96; A8: vsub.f64 d 97 %0 = fmul double %a, %b 98 %1 = fmul double -1.0, %0 99 %2 = fsub double %1, %acc 100 ret double %2 101} 102