1; RUN: llc -O3 -mcpu=pwr7 < %s | FileCheck %s 2; RUN: llc -O3 -print-after=codegenprepare -mcpu=ppc64 < %s >%t 2>&1 && FileCheck --check-prefix=CHECK-NoAA <%t %s 3; RUN: llc -O3 -print-after=codegenprepare -mcpu=pwr7 < %s >%t 2>&1 && FileCheck --check-prefix=CHECK-UseAA <%t %s 4target datalayout = "E-m:e-i64:64-n32:64" 5target triple = "powerpc64-unknown-linux-gnu" 6 7; Following test cases test enabling SeparateConstOffsetFromGEP pass in the PPC 8; backend. If useAA() returns true, it will lower a GEP with multiple indices 9; into GEPs with a single index, otherwise it will lower it into a 10; "ptrtoint+arithmetics+inttoptr" form. 11 12%struct = type { i32, i32, i32, i32, [20 x i32] } 13 14; Check that when two complex GEPs are used in two basic blocks, LLVM can 15; elimilate the common subexpression for the second use. 16define void @test_GEP_CSE([240 x %struct]* %string, i32* %adj, i32 %lib, i64 %idxprom) { 17 %liberties = getelementptr [240 x %struct]* %string, i64 1, i64 %idxprom, i32 3 18 %1 = load i32* %liberties, align 4 19 %cmp = icmp eq i32 %1, %lib 20 br i1 %cmp, label %if.then, label %if.end 21 22if.then: ; preds = %entry 23 %origin = getelementptr [240 x %struct]* %string, i64 1, i64 %idxprom, i32 2 24 %2 = load i32* %origin, align 4 25 store i32 %2, i32* %adj, align 4 26 br label %if.end 27 28if.end: ; preds = %if.then, %entry 29 ret void 30} 31 32; CHECK-NoAA-LABEL: @test_GEP_CSE( 33; CHECK-NoAA: [[PTR0:%[a-zA-Z0-9]+]] = ptrtoint [240 x %struct]* %string to i64 34; CHECK-NoAA: [[PTR1:%[a-zA-Z0-9]+]] = mul i64 %idxprom, 96 35; CHECK-NoAA: [[PTR2:%[a-zA-Z0-9]+]] = add i64 [[PTR0]], [[PTR1]] 36; CHECK-NoAA: add i64 [[PTR2]], 23052 37; CHECK-NoAA: inttoptr 38; CHECK-NoAA: if.then: 39; CHECK-NoAA-NOT: ptrtoint 40; CHECK-NoAA-NOT: mul 41; CHECK-NoAA: add i64 [[PTR2]], 23048 42; CHECK-NoAA: inttoptr 43 44; CHECK-UseAA-LABEL: @test_GEP_CSE( 45; CHECK-UseAA: [[PTR0:%[a-zA-Z0-9]+]] = bitcast [240 x %struct]* %string to i8* 46; CHECK-UseAA: [[IDX:%[a-zA-Z0-9]+]] = mul i64 %idxprom, 96 47; CHECK-UseAA: [[PTR1:%[a-zA-Z0-9]+]] = getelementptr i8* [[PTR0]], i64 [[IDX]] 48; CHECK-UseAA: getelementptr i8* [[PTR1]], i64 23052 49; CHECK-UseAA: bitcast 50; CHECK-UseAA: if.then: 51; CHECK-UseAA: getelementptr i8* [[PTR1]], i64 23048 52; CHECK-UseAA: bitcast 53 54%class.my = type { i32, [128 x i32], i32, [256 x %struct.pt]} 55%struct.pt = type { %struct.point*, i32, i32 } 56%struct.point = type { i32, i32 } 57 58; Check when a GEP is used across two basic block, LLVM can sink the address 59; calculation and code gen can generate a better addressing mode for the second 60; use. 61define void @test_GEP_across_BB(%class.my* %this, i64 %idx) { 62 %1 = getelementptr %class.my* %this, i64 0, i32 3, i64 %idx, i32 1 63 %2 = load i32* %1, align 4 64 %3 = getelementptr %class.my* %this, i64 0, i32 3, i64 %idx, i32 2 65 %4 = load i32* %3, align 4 66 %5 = icmp eq i32 %2, %4 67 br i1 %5, label %if.true, label %exit 68 69if.true: 70 %6 = shl i32 %4, 1 71 store i32 %6, i32* %3, align 4 72 br label %exit 73 74exit: 75 %7 = add nsw i32 %4, 1 76 store i32 %7, i32* %1, align 4 77 ret void 78} 79; CHECK-LABEL: test_GEP_across_BB: 80; CHECK-NOT: lwzu 81; CHECK: blr 82 83; CHECK-NoAA-LABEL: test_GEP_across_BB( 84; CHECK-NoAA: add i64 [[TMP:%[a-zA-Z0-9]+]], 528 85; CHECK-NoAA: add i64 [[TMP]], 532 86; CHECK-NoAA: if.true: 87; CHECK-NoAA: {{%sunk[a-zA-Z0-9]+}} = add i64 [[TMP]], 532 88; CHECK-NoAA: exit: 89; CHECK-NoAA: {{%sunk[a-zA-Z0-9]+}} = add i64 [[TMP]], 528 90 91; CHECK-UseAA-LABEL: test_GEP_across_BB( 92; CHECK-UseAA: [[PTR0:%[a-zA-Z0-9]+]] = getelementptr 93; CHECK-UseAA: getelementptr i8* [[PTR0]], i64 528 94; CHECK-UseAA: getelementptr i8* [[PTR0]], i64 532 95; CHECK-UseAA: if.true: 96; CHECK-UseAA: {{%sunk[a-zA-Z0-9]+}} = getelementptr i8* [[PTR0]], i64 532 97; CHECK-UseAA: exit: 98; CHECK-UseAA: {{%sunk[a-zA-Z0-9]+}} = getelementptr i8* [[PTR0]], i64 528 99 100%struct.S = type { float, double } 101@struct_array = global [1024 x %struct.S] zeroinitializer, align 16 102 103; The following two test cases check we can extract constant from indices of 104; struct type. 105; The constant offsets are from indices "i64 %idxprom" and "i32 1". As the 106; alloca size of %struct.S is 16, and "i32 1" is the 2rd element whose field 107; offset is 8, the total constant offset is (5 * 16 + 8) = 88. 108define double* @test-struct_1(i32 %i) { 109entry: 110 %add = add nsw i32 %i, 5 111 %idxprom = sext i32 %add to i64 112 %p = getelementptr [1024 x %struct.S]* @struct_array, i64 0, i64 %idxprom, i32 1 113 ret double* %p 114} 115; CHECK-NoAA-LABEL: @test-struct_1( 116; CHECK-NoAA-NOT: getelementptr 117; CHECK-NoAA: add i64 %{{[a-zA-Z0-9]+}}, 88 118 119; CHECK-UseAA-LABEL: @test-struct_1( 120; CHECK-UseAA: getelementptr i8* %{{[a-zA-Z0-9]+}}, i64 88 121 122%struct3 = type { i64, i32 } 123%struct2 = type { %struct3, i32 } 124%struct1 = type { i64, %struct2 } 125%struct0 = type { i32, i32, i64*, [100 x %struct1] } 126 127; The constant offsets are from indices "i32 3", "i64 %arrayidx" and "i32 1". 128; "i32 3" is the 4th element whose field offset is 16. The alloca size of 129; %struct1 is 32. "i32 1" is the 2rd element whose field offset is 8. So the 130; total constant offset is 16 + (-2 * 32) + 8 = -40 131define %struct2* @test-struct_2(%struct0* %ptr, i64 %idx) { 132entry: 133 %arrayidx = add nsw i64 %idx, -2 134 %ptr2 = getelementptr %struct0* %ptr, i64 0, i32 3, i64 %arrayidx, i32 1 135 ret %struct2* %ptr2 136} 137; CHECK-NoAA-LABEL: @test-struct_2( 138; CHECK-NoAA-NOT: = getelementptr 139; CHECK-NoAA: add i64 %{{[a-zA-Z0-9]+}}, -40 140 141; CHECK-UseAA-LABEL: @test-struct_2( 142; CHECK-UseAA: getelementptr i8* %{{[a-zA-Z0-9]+}}, i64 -40 143 144; Test that when a index is added from two constant, SeparateConstOffsetFromGEP 145; pass does not generate incorrect result. 146define void @test_const_add([3 x i32]* %in) { 147 %inc = add nsw i32 2, 1 148 %idxprom = sext i32 %inc to i64 149 %arrayidx = getelementptr [3 x i32]* %in, i64 %idxprom, i64 2 150 store i32 0, i32* %arrayidx, align 4 151 ret void 152} 153; CHECK-LABEL: test_const_add: 154; CHECK: li [[REG:[0-9]+]], 0 155; CHECK: stw [[REG]], 44(3) 156; CHECK: blr 157 158