1ifeq (,$(findstring __symbian__,$(shell $(gcc_compile_bare) -dM -E - </dev/null))) 2 3ARM_ISA:=$(findstring __ARM_ARCH_ISA_ARM,$(shell $(gcc_compile_bare) -dM -E - </dev/null)) 4THUMB1_ISA:=$(findstring __ARM_ARCH_ISA_THUMB 1,$(shell $(gcc_compile_bare) -dM -E - </dev/null)) 5 6# The condition here must match the one in gcc/config/arm/elf.h and 7# libgcc/config/arm/lib1funcs.S. _arm_muldf3 and _arm_mulsf3 must be included 8# first so that the weak multiplication symbols in the corresponding files are 9# chosen over the global symbols that _arm_muldivdf3 and _arm_muldivsf3 10# inclusion create when only multiplication is used, thus avoiding pulling in 11# useless division code. 12ifneq (__ARM_ARCH_ISA_THUMB 1,$(ARM_ISA)$(THUMB1_ISA)) 13LIB1ASMFUNCS += _arm_muldf3 _arm_mulsf3 14endif 15endif # !__symbian__ 16 17# For most CPUs we have an assembly soft-float implementations. 18# However this is not true for ARMv6M. Here we want to use the soft-fp C 19# implementation. The soft-fp code is only build for ARMv6M. This pulls 20# in the asm implementation for other CPUs. 21LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func \ 22 _call_via_rX _interwork_call_via_rX \ 23 _lshrdi3 _ashrdi3 _ashldi3 \ 24 _arm_negdf2 _arm_addsubdf3 _arm_muldivdf3 _arm_cmpdf2 _arm_unorddf2 \ 25 _arm_fixdfsi _arm_fixunsdfsi \ 26 _arm_truncdfsf2 _arm_negsf2 _arm_addsubsf3 _arm_muldivsf3 \ 27 _arm_cmpsf2 _arm_unordsf2 _arm_fixsfsi _arm_fixunssfsi \ 28 _arm_floatdidf _arm_floatdisf _arm_floatundidf _arm_floatundisf \ 29 _clzsi2 _clzdi2 _ctzsi2 30 31# Currently there is a bug somewhere in GCC's alias analysis 32# or scheduling code that is breaking _fpmul_parts in fp-bit.c. 33# Disabling function inlining is a workaround for this problem. 34HOST_LIBGCC2_CFLAGS += -fno-inline 35