1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Instruction opcode table for or1k.
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5
6 Copyright (C) 1996-2020 Free Software Foundation, Inc.
7
8 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9
10 This file is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
13 any later version.
14
15 It is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
18 License for more details.
19
20 You should have received a copy of the GNU General Public License along
21 with this program; if not, write to the Free Software Foundation, Inc.,
22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
23
24 */
25
26 #include "sysdep.h"
27 #include "ansidecl.h"
28 #include "bfd.h"
29 #include "symcat.h"
30 #include "or1k-desc.h"
31 #include "or1k-opc.h"
32 #include "libiberty.h"
33
34 /* -- opc.c */
35
36 /* Special check to ensure that instruction exists for given machine. */
37
38 int
or1k_cgen_insn_supported(CGEN_CPU_DESC cd,const CGEN_INSN * insn)39 or1k_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
40 {
41 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
42
43 /* No mach attribute? Assume it's supported for all machs. */
44 if (machs == 0)
45 return 1;
46
47 return ((machs & cd->machs) != 0);
48 }
49
50 /* -- */
51 /* The hash functions are recorded here to help keep assembler code out of
52 the disassembler and vice versa. */
53
54 static int asm_hash_insn_p (const CGEN_INSN *);
55 static unsigned int asm_hash_insn (const char *);
56 static int dis_hash_insn_p (const CGEN_INSN *);
57 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
58
59 /* Instruction formats. */
60
61 #define F(f) & or1k_cgen_ifld_table[OR1K_##f]
62 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
63 0, 0, 0x0, { { 0 } }
64 };
65
66 static const CGEN_IFMT ifmt_l_j ATTRIBUTE_UNUSED = {
67 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_DISP26) }, { 0 } }
68 };
69
70 static const CGEN_IFMT ifmt_l_adrp ATTRIBUTE_UNUSED = {
71 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_DISP21) }, { 0 } }
72 };
73
74 static const CGEN_IFMT ifmt_l_jr ATTRIBUTE_UNUSED = {
75 32, 32, 0xffff07ff, { { F (F_OPCODE) }, { F (F_RESV_25_10) }, { F (F_R3) }, { F (F_RESV_10_11) }, { 0 } }
76 };
77
78 static const CGEN_IFMT ifmt_l_trap ATTRIBUTE_UNUSED = {
79 32, 32, 0xffff0000, { { F (F_OPCODE) }, { F (F_OP_25_5) }, { F (F_RESV_20_5) }, { F (F_UIMM16) }, { 0 } }
80 };
81
82 static const CGEN_IFMT ifmt_l_msync ATTRIBUTE_UNUSED = {
83 32, 32, 0xffffffff, { { F (F_OPCODE) }, { F (F_OP_25_5) }, { F (F_RESV_20_21) }, { 0 } }
84 };
85
86 static const CGEN_IFMT ifmt_l_rfe ATTRIBUTE_UNUSED = {
87 32, 32, 0xffffffff, { { F (F_OPCODE) }, { F (F_RESV_25_26) }, { 0 } }
88 };
89
90 static const CGEN_IFMT ifmt_l_nop_imm ATTRIBUTE_UNUSED = {
91 32, 32, 0xffff0000, { { F (F_OPCODE) }, { F (F_OP_25_2) }, { F (F_RESV_23_8) }, { F (F_UIMM16) }, { 0 } }
92 };
93
94 static const CGEN_IFMT ifmt_l_movhi ATTRIBUTE_UNUSED = {
95 32, 32, 0xfc1f0000, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_RESV_20_4) }, { F (F_OP_16_1) }, { F (F_UIMM16) }, { 0 } }
96 };
97
98 static const CGEN_IFMT ifmt_l_macrc ATTRIBUTE_UNUSED = {
99 32, 32, 0xfc1fffff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_RESV_20_4) }, { F (F_OP_16_1) }, { F (F_UIMM16) }, { 0 } }
100 };
101
102 static const CGEN_IFMT ifmt_l_mfspr ATTRIBUTE_UNUSED = {
103 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_UIMM16) }, { 0 } }
104 };
105
106 static const CGEN_IFMT ifmt_l_mtspr ATTRIBUTE_UNUSED = {
107 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R2) }, { F (F_R3) }, { F (F_UIMM16_SPLIT) }, { 0 } }
108 };
109
110 static const CGEN_IFMT ifmt_l_lwz ATTRIBUTE_UNUSED = {
111 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
112 };
113
114 static const CGEN_IFMT ifmt_l_sw ATTRIBUTE_UNUSED = {
115 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R2) }, { F (F_R3) }, { F (F_SIMM16_SPLIT) }, { 0 } }
116 };
117
118 static const CGEN_IFMT ifmt_l_swa ATTRIBUTE_UNUSED = {
119 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R2) }, { F (F_R3) }, { F (F_SIMM16) }, { 0 } }
120 };
121
122 static const CGEN_IFMT ifmt_l_sll ATTRIBUTE_UNUSED = {
123 32, 32, 0xfc0007ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_2) }, { F (F_RESV_5_2) }, { F (F_OP_3_4) }, { 0 } }
124 };
125
126 static const CGEN_IFMT ifmt_l_slli ATTRIBUTE_UNUSED = {
127 32, 32, 0xfc00ffc0, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV_15_8) }, { F (F_OP_7_2) }, { F (F_UIMM6) }, { 0 } }
128 };
129
130 static const CGEN_IFMT ifmt_l_and ATTRIBUTE_UNUSED = {
131 32, 32, 0xfc0007ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_7) }, { F (F_OP_3_4) }, { 0 } }
132 };
133
134 static const CGEN_IFMT ifmt_l_muld ATTRIBUTE_UNUSED = {
135 32, 32, 0xffe007ff, { { F (F_OPCODE) }, { F (F_RESV_25_5) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_7) }, { F (F_OP_3_4) }, { 0 } }
136 };
137
138 static const CGEN_IFMT ifmt_l_exths ATTRIBUTE_UNUSED = {
139 32, 32, 0xfc00ffff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV_15_6) }, { F (F_OP_9_4) }, { F (F_RESV_5_2) }, { F (F_OP_3_4) }, { 0 } }
140 };
141
142 static const CGEN_IFMT ifmt_l_cmov ATTRIBUTE_UNUSED = {
143 32, 32, 0xfc0007ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_1) }, { F (F_OP_9_2) }, { F (F_RESV_7_4) }, { F (F_OP_3_4) }, { 0 } }
144 };
145
146 static const CGEN_IFMT ifmt_l_sfgts ATTRIBUTE_UNUSED = {
147 32, 32, 0xffe007ff, { { F (F_OPCODE) }, { F (F_OP_25_5) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_11) }, { 0 } }
148 };
149
150 static const CGEN_IFMT ifmt_l_sfgtsi ATTRIBUTE_UNUSED = {
151 32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_OP_25_5) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
152 };
153
154 static const CGEN_IFMT ifmt_l_mac ATTRIBUTE_UNUSED = {
155 32, 32, 0xffe007ff, { { F (F_OPCODE) }, { F (F_OP_25_5) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_7) }, { F (F_OP_3_4) }, { 0 } }
156 };
157
158 static const CGEN_IFMT ifmt_l_maci ATTRIBUTE_UNUSED = {
159 32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_RESV_25_5) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
160 };
161
162 static const CGEN_IFMT ifmt_lf_add_s ATTRIBUTE_UNUSED = {
163 32, 32, 0xfc0007ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } }
164 };
165
166 static const CGEN_IFMT ifmt_lf_add_d32 ATTRIBUTE_UNUSED = {
167 32, 32, 0xfc0000ff, { { F (F_OPCODE) }, { F (F_RDD32) }, { F (F_RAD32) }, { F (F_RBD32) }, { F (F_OP_7_8) }, { 0 } }
168 };
169
170 static const CGEN_IFMT ifmt_lf_itof_s ATTRIBUTE_UNUSED = {
171 32, 32, 0xfc00ffff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } }
172 };
173
174 static const CGEN_IFMT ifmt_lf_itof_d32 ATTRIBUTE_UNUSED = {
175 32, 32, 0xfc00f9ff, { { F (F_OPCODE) }, { F (F_R3) }, { F (F_RDD32) }, { F (F_RAD32) }, { F (F_RESV_8_1) }, { F (F_OP_7_8) }, { 0 } }
176 };
177
178 static const CGEN_IFMT ifmt_lf_ftoi_s ATTRIBUTE_UNUSED = {
179 32, 32, 0xfc00ffff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } }
180 };
181
182 static const CGEN_IFMT ifmt_lf_ftoi_d32 ATTRIBUTE_UNUSED = {
183 32, 32, 0xfc00f9ff, { { F (F_OPCODE) }, { F (F_R3) }, { F (F_RDD32) }, { F (F_RAD32) }, { F (F_RESV_8_1) }, { F (F_OP_7_8) }, { 0 } }
184 };
185
186 static const CGEN_IFMT ifmt_lf_sfeq_s ATTRIBUTE_UNUSED = {
187 32, 32, 0xffe007ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } }
188 };
189
190 static const CGEN_IFMT ifmt_lf_sfeq_d32 ATTRIBUTE_UNUSED = {
191 32, 32, 0xffe004ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_RESV_10_1) }, { F (F_RAD32) }, { F (F_RBD32) }, { F (F_OP_7_8) }, { 0 } }
192 };
193
194 static const CGEN_IFMT ifmt_lf_cust1_s ATTRIBUTE_UNUSED = {
195 32, 32, 0xffe007ff, { { F (F_OPCODE) }, { F (F_RESV_25_5) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } }
196 };
197
198 static const CGEN_IFMT ifmt_lf_cust1_d32 ATTRIBUTE_UNUSED = {
199 32, 32, 0xffe004ff, { { F (F_OPCODE) }, { F (F_RESV_25_5) }, { F (F_RESV_10_1) }, { F (F_RAD32) }, { F (F_RBD32) }, { F (F_OP_7_8) }, { 0 } }
200 };
201
202 #undef F
203
204 #define A(a) (1 << CGEN_INSN_##a)
205 #define OPERAND(op) OR1K_OPERAND_##op
206 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
207 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
208
209 /* The instruction table. */
210
211 static const CGEN_OPCODE or1k_cgen_insn_opcode_table[MAX_INSNS] =
212 {
213 /* Special null first entry.
214 A `num' value of zero is thus invalid.
215 Also, the special `invalid' insn resides here. */
216 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
217 /* l.j ${disp26} */
218 {
219 { 0, 0, 0, 0 },
220 { { MNEM, ' ', OP (DISP26), 0 } },
221 & ifmt_l_j, { 0x0 }
222 },
223 /* l.adrp $rD,${disp21} */
224 {
225 { 0, 0, 0, 0 },
226 { { MNEM, ' ', OP (RD), ',', OP (DISP21), 0 } },
227 & ifmt_l_adrp, { 0x8000000 }
228 },
229 /* l.jal ${disp26} */
230 {
231 { 0, 0, 0, 0 },
232 { { MNEM, ' ', OP (DISP26), 0 } },
233 & ifmt_l_j, { 0x4000000 }
234 },
235 /* l.jr $rB */
236 {
237 { 0, 0, 0, 0 },
238 { { MNEM, ' ', OP (RB), 0 } },
239 & ifmt_l_jr, { 0x44000000 }
240 },
241 /* l.jalr $rB */
242 {
243 { 0, 0, 0, 0 },
244 { { MNEM, ' ', OP (RB), 0 } },
245 & ifmt_l_jr, { 0x48000000 }
246 },
247 /* l.bnf ${disp26} */
248 {
249 { 0, 0, 0, 0 },
250 { { MNEM, ' ', OP (DISP26), 0 } },
251 & ifmt_l_j, { 0xc000000 }
252 },
253 /* l.bf ${disp26} */
254 {
255 { 0, 0, 0, 0 },
256 { { MNEM, ' ', OP (DISP26), 0 } },
257 & ifmt_l_j, { 0x10000000 }
258 },
259 /* l.trap ${uimm16} */
260 {
261 { 0, 0, 0, 0 },
262 { { MNEM, ' ', OP (UIMM16), 0 } },
263 & ifmt_l_trap, { 0x21000000 }
264 },
265 /* l.sys ${uimm16} */
266 {
267 { 0, 0, 0, 0 },
268 { { MNEM, ' ', OP (UIMM16), 0 } },
269 & ifmt_l_trap, { 0x20000000 }
270 },
271 /* l.msync */
272 {
273 { 0, 0, 0, 0 },
274 { { MNEM, 0 } },
275 & ifmt_l_msync, { 0x22000000 }
276 },
277 /* l.psync */
278 {
279 { 0, 0, 0, 0 },
280 { { MNEM, 0 } },
281 & ifmt_l_msync, { 0x22800000 }
282 },
283 /* l.csync */
284 {
285 { 0, 0, 0, 0 },
286 { { MNEM, 0 } },
287 & ifmt_l_msync, { 0x23000000 }
288 },
289 /* l.rfe */
290 {
291 { 0, 0, 0, 0 },
292 { { MNEM, 0 } },
293 & ifmt_l_rfe, { 0x24000000 }
294 },
295 /* l.nop ${uimm16} */
296 {
297 { 0, 0, 0, 0 },
298 { { MNEM, ' ', OP (UIMM16), 0 } },
299 & ifmt_l_nop_imm, { 0x15000000 }
300 },
301 /* l.nop */
302 {
303 { 0, 0, 0, 0 },
304 { { MNEM, 0 } },
305 & ifmt_l_nop_imm, { 0x15000000 }
306 },
307 /* l.movhi $rD,$uimm16 */
308 {
309 { 0, 0, 0, 0 },
310 { { MNEM, ' ', OP (RD), ',', OP (UIMM16), 0 } },
311 & ifmt_l_movhi, { 0x18000000 }
312 },
313 /* l.macrc $rD */
314 {
315 { 0, 0, 0, 0 },
316 { { MNEM, ' ', OP (RD), 0 } },
317 & ifmt_l_macrc, { 0x18010000 }
318 },
319 /* l.mfspr $rD,$rA,${uimm16} */
320 {
321 { 0, 0, 0, 0 },
322 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM16), 0 } },
323 & ifmt_l_mfspr, { 0xb4000000 }
324 },
325 /* l.mtspr $rA,$rB,${uimm16-split} */
326 {
327 { 0, 0, 0, 0 },
328 { { MNEM, ' ', OP (RA), ',', OP (RB), ',', OP (UIMM16_SPLIT), 0 } },
329 & ifmt_l_mtspr, { 0xc0000000 }
330 },
331 /* l.lwz $rD,${simm16}($rA) */
332 {
333 { 0, 0, 0, 0 },
334 { { MNEM, ' ', OP (RD), ',', OP (SIMM16), '(', OP (RA), ')', 0 } },
335 & ifmt_l_lwz, { 0x84000000 }
336 },
337 /* l.lws $rD,${simm16}($rA) */
338 {
339 { 0, 0, 0, 0 },
340 { { MNEM, ' ', OP (RD), ',', OP (SIMM16), '(', OP (RA), ')', 0 } },
341 & ifmt_l_lwz, { 0x88000000 }
342 },
343 /* l.lwa $rD,${simm16}($rA) */
344 {
345 { 0, 0, 0, 0 },
346 { { MNEM, ' ', OP (RD), ',', OP (SIMM16), '(', OP (RA), ')', 0 } },
347 & ifmt_l_lwz, { 0x6c000000 }
348 },
349 /* l.lbz $rD,${simm16}($rA) */
350 {
351 { 0, 0, 0, 0 },
352 { { MNEM, ' ', OP (RD), ',', OP (SIMM16), '(', OP (RA), ')', 0 } },
353 & ifmt_l_lwz, { 0x8c000000 }
354 },
355 /* l.lbs $rD,${simm16}($rA) */
356 {
357 { 0, 0, 0, 0 },
358 { { MNEM, ' ', OP (RD), ',', OP (SIMM16), '(', OP (RA), ')', 0 } },
359 & ifmt_l_lwz, { 0x90000000 }
360 },
361 /* l.lhz $rD,${simm16}($rA) */
362 {
363 { 0, 0, 0, 0 },
364 { { MNEM, ' ', OP (RD), ',', OP (SIMM16), '(', OP (RA), ')', 0 } },
365 & ifmt_l_lwz, { 0x94000000 }
366 },
367 /* l.lhs $rD,${simm16}($rA) */
368 {
369 { 0, 0, 0, 0 },
370 { { MNEM, ' ', OP (RD), ',', OP (SIMM16), '(', OP (RA), ')', 0 } },
371 & ifmt_l_lwz, { 0x98000000 }
372 },
373 /* l.sw ${simm16-split}($rA),$rB */
374 {
375 { 0, 0, 0, 0 },
376 { { MNEM, ' ', OP (SIMM16_SPLIT), '(', OP (RA), ')', ',', OP (RB), 0 } },
377 & ifmt_l_sw, { 0xd4000000 }
378 },
379 /* l.sb ${simm16-split}($rA),$rB */
380 {
381 { 0, 0, 0, 0 },
382 { { MNEM, ' ', OP (SIMM16_SPLIT), '(', OP (RA), ')', ',', OP (RB), 0 } },
383 & ifmt_l_sw, { 0xd8000000 }
384 },
385 /* l.sh ${simm16-split}($rA),$rB */
386 {
387 { 0, 0, 0, 0 },
388 { { MNEM, ' ', OP (SIMM16_SPLIT), '(', OP (RA), ')', ',', OP (RB), 0 } },
389 & ifmt_l_sw, { 0xdc000000 }
390 },
391 /* l.swa ${simm16-split}($rA),$rB */
392 {
393 { 0, 0, 0, 0 },
394 { { MNEM, ' ', OP (SIMM16_SPLIT), '(', OP (RA), ')', ',', OP (RB), 0 } },
395 & ifmt_l_swa, { 0xcc000000 }
396 },
397 /* l.sll $rD,$rA,$rB */
398 {
399 { 0, 0, 0, 0 },
400 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
401 & ifmt_l_sll, { 0xe0000008 }
402 },
403 /* l.slli $rD,$rA,${uimm6} */
404 {
405 { 0, 0, 0, 0 },
406 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM6), 0 } },
407 & ifmt_l_slli, { 0xb8000000 }
408 },
409 /* l.srl $rD,$rA,$rB */
410 {
411 { 0, 0, 0, 0 },
412 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
413 & ifmt_l_sll, { 0xe0000048 }
414 },
415 /* l.srli $rD,$rA,${uimm6} */
416 {
417 { 0, 0, 0, 0 },
418 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM6), 0 } },
419 & ifmt_l_slli, { 0xb8000040 }
420 },
421 /* l.sra $rD,$rA,$rB */
422 {
423 { 0, 0, 0, 0 },
424 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
425 & ifmt_l_sll, { 0xe0000088 }
426 },
427 /* l.srai $rD,$rA,${uimm6} */
428 {
429 { 0, 0, 0, 0 },
430 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM6), 0 } },
431 & ifmt_l_slli, { 0xb8000080 }
432 },
433 /* l.ror $rD,$rA,$rB */
434 {
435 { 0, 0, 0, 0 },
436 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
437 & ifmt_l_sll, { 0xe00000c8 }
438 },
439 /* l.rori $rD,$rA,${uimm6} */
440 {
441 { 0, 0, 0, 0 },
442 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM6), 0 } },
443 & ifmt_l_slli, { 0xb80000c0 }
444 },
445 /* l.and $rD,$rA,$rB */
446 {
447 { 0, 0, 0, 0 },
448 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
449 & ifmt_l_and, { 0xe0000003 }
450 },
451 /* l.or $rD,$rA,$rB */
452 {
453 { 0, 0, 0, 0 },
454 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
455 & ifmt_l_and, { 0xe0000004 }
456 },
457 /* l.xor $rD,$rA,$rB */
458 {
459 { 0, 0, 0, 0 },
460 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
461 & ifmt_l_and, { 0xe0000005 }
462 },
463 /* l.add $rD,$rA,$rB */
464 {
465 { 0, 0, 0, 0 },
466 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
467 & ifmt_l_and, { 0xe0000000 }
468 },
469 /* l.sub $rD,$rA,$rB */
470 {
471 { 0, 0, 0, 0 },
472 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
473 & ifmt_l_and, { 0xe0000002 }
474 },
475 /* l.addc $rD,$rA,$rB */
476 {
477 { 0, 0, 0, 0 },
478 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
479 & ifmt_l_and, { 0xe0000001 }
480 },
481 /* l.mul $rD,$rA,$rB */
482 {
483 { 0, 0, 0, 0 },
484 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
485 & ifmt_l_and, { 0xe0000306 }
486 },
487 /* l.muld $rA,$rB */
488 {
489 { 0, 0, 0, 0 },
490 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
491 & ifmt_l_muld, { 0xe0000307 }
492 },
493 /* l.mulu $rD,$rA,$rB */
494 {
495 { 0, 0, 0, 0 },
496 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
497 & ifmt_l_and, { 0xe000030b }
498 },
499 /* l.muldu $rA,$rB */
500 {
501 { 0, 0, 0, 0 },
502 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
503 & ifmt_l_muld, { 0xe000030d }
504 },
505 /* l.div $rD,$rA,$rB */
506 {
507 { 0, 0, 0, 0 },
508 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
509 & ifmt_l_and, { 0xe0000309 }
510 },
511 /* l.divu $rD,$rA,$rB */
512 {
513 { 0, 0, 0, 0 },
514 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
515 & ifmt_l_and, { 0xe000030a }
516 },
517 /* l.ff1 $rD,$rA */
518 {
519 { 0, 0, 0, 0 },
520 { { MNEM, ' ', OP (RD), ',', OP (RA), 0 } },
521 & ifmt_l_and, { 0xe000000f }
522 },
523 /* l.fl1 $rD,$rA */
524 {
525 { 0, 0, 0, 0 },
526 { { MNEM, ' ', OP (RD), ',', OP (RA), 0 } },
527 & ifmt_l_and, { 0xe000010f }
528 },
529 /* l.andi $rD,$rA,$uimm16 */
530 {
531 { 0, 0, 0, 0 },
532 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM16), 0 } },
533 & ifmt_l_mfspr, { 0xa4000000 }
534 },
535 /* l.ori $rD,$rA,$uimm16 */
536 {
537 { 0, 0, 0, 0 },
538 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM16), 0 } },
539 & ifmt_l_mfspr, { 0xa8000000 }
540 },
541 /* l.xori $rD,$rA,$simm16 */
542 {
543 { 0, 0, 0, 0 },
544 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (SIMM16), 0 } },
545 & ifmt_l_lwz, { 0xac000000 }
546 },
547 /* l.addi $rD,$rA,$simm16 */
548 {
549 { 0, 0, 0, 0 },
550 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (SIMM16), 0 } },
551 & ifmt_l_lwz, { 0x9c000000 }
552 },
553 /* l.addic $rD,$rA,$simm16 */
554 {
555 { 0, 0, 0, 0 },
556 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (SIMM16), 0 } },
557 & ifmt_l_lwz, { 0xa0000000 }
558 },
559 /* l.muli $rD,$rA,$simm16 */
560 {
561 { 0, 0, 0, 0 },
562 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (SIMM16), 0 } },
563 & ifmt_l_lwz, { 0xb0000000 }
564 },
565 /* l.exths $rD,$rA */
566 {
567 { 0, 0, 0, 0 },
568 { { MNEM, ' ', OP (RD), ',', OP (RA), 0 } },
569 & ifmt_l_exths, { 0xe000000c }
570 },
571 /* l.extbs $rD,$rA */
572 {
573 { 0, 0, 0, 0 },
574 { { MNEM, ' ', OP (RD), ',', OP (RA), 0 } },
575 & ifmt_l_exths, { 0xe000004c }
576 },
577 /* l.exthz $rD,$rA */
578 {
579 { 0, 0, 0, 0 },
580 { { MNEM, ' ', OP (RD), ',', OP (RA), 0 } },
581 & ifmt_l_exths, { 0xe000008c }
582 },
583 /* l.extbz $rD,$rA */
584 {
585 { 0, 0, 0, 0 },
586 { { MNEM, ' ', OP (RD), ',', OP (RA), 0 } },
587 & ifmt_l_exths, { 0xe00000cc }
588 },
589 /* l.extws $rD,$rA */
590 {
591 { 0, 0, 0, 0 },
592 { { MNEM, ' ', OP (RD), ',', OP (RA), 0 } },
593 & ifmt_l_exths, { 0xe000000d }
594 },
595 /* l.extwz $rD,$rA */
596 {
597 { 0, 0, 0, 0 },
598 { { MNEM, ' ', OP (RD), ',', OP (RA), 0 } },
599 & ifmt_l_exths, { 0xe000004d }
600 },
601 /* l.cmov $rD,$rA,$rB */
602 {
603 { 0, 0, 0, 0 },
604 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
605 & ifmt_l_cmov, { 0xe000000e }
606 },
607 /* l.sfgts $rA,$rB */
608 {
609 { 0, 0, 0, 0 },
610 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
611 & ifmt_l_sfgts, { 0xe5400000 }
612 },
613 /* l.sfgtsi $rA,$simm16 */
614 {
615 { 0, 0, 0, 0 },
616 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } },
617 & ifmt_l_sfgtsi, { 0xbd400000 }
618 },
619 /* l.sfgtu $rA,$rB */
620 {
621 { 0, 0, 0, 0 },
622 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
623 & ifmt_l_sfgts, { 0xe4400000 }
624 },
625 /* l.sfgtui $rA,$simm16 */
626 {
627 { 0, 0, 0, 0 },
628 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } },
629 & ifmt_l_sfgtsi, { 0xbc400000 }
630 },
631 /* l.sfges $rA,$rB */
632 {
633 { 0, 0, 0, 0 },
634 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
635 & ifmt_l_sfgts, { 0xe5600000 }
636 },
637 /* l.sfgesi $rA,$simm16 */
638 {
639 { 0, 0, 0, 0 },
640 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } },
641 & ifmt_l_sfgtsi, { 0xbd600000 }
642 },
643 /* l.sfgeu $rA,$rB */
644 {
645 { 0, 0, 0, 0 },
646 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
647 & ifmt_l_sfgts, { 0xe4600000 }
648 },
649 /* l.sfgeui $rA,$simm16 */
650 {
651 { 0, 0, 0, 0 },
652 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } },
653 & ifmt_l_sfgtsi, { 0xbc600000 }
654 },
655 /* l.sflts $rA,$rB */
656 {
657 { 0, 0, 0, 0 },
658 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
659 & ifmt_l_sfgts, { 0xe5800000 }
660 },
661 /* l.sfltsi $rA,$simm16 */
662 {
663 { 0, 0, 0, 0 },
664 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } },
665 & ifmt_l_sfgtsi, { 0xbd800000 }
666 },
667 /* l.sfltu $rA,$rB */
668 {
669 { 0, 0, 0, 0 },
670 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
671 & ifmt_l_sfgts, { 0xe4800000 }
672 },
673 /* l.sfltui $rA,$simm16 */
674 {
675 { 0, 0, 0, 0 },
676 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } },
677 & ifmt_l_sfgtsi, { 0xbc800000 }
678 },
679 /* l.sfles $rA,$rB */
680 {
681 { 0, 0, 0, 0 },
682 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
683 & ifmt_l_sfgts, { 0xe5a00000 }
684 },
685 /* l.sflesi $rA,$simm16 */
686 {
687 { 0, 0, 0, 0 },
688 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } },
689 & ifmt_l_sfgtsi, { 0xbda00000 }
690 },
691 /* l.sfleu $rA,$rB */
692 {
693 { 0, 0, 0, 0 },
694 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
695 & ifmt_l_sfgts, { 0xe4a00000 }
696 },
697 /* l.sfleui $rA,$simm16 */
698 {
699 { 0, 0, 0, 0 },
700 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } },
701 & ifmt_l_sfgtsi, { 0xbca00000 }
702 },
703 /* l.sfeq $rA,$rB */
704 {
705 { 0, 0, 0, 0 },
706 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
707 & ifmt_l_sfgts, { 0xe4000000 }
708 },
709 /* l.sfeqi $rA,$simm16 */
710 {
711 { 0, 0, 0, 0 },
712 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } },
713 & ifmt_l_sfgtsi, { 0xbc000000 }
714 },
715 /* l.sfne $rA,$rB */
716 {
717 { 0, 0, 0, 0 },
718 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
719 & ifmt_l_sfgts, { 0xe4200000 }
720 },
721 /* l.sfnei $rA,$simm16 */
722 {
723 { 0, 0, 0, 0 },
724 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } },
725 & ifmt_l_sfgtsi, { 0xbc200000 }
726 },
727 /* l.mac $rA,$rB */
728 {
729 { 0, 0, 0, 0 },
730 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
731 & ifmt_l_mac, { 0xc4000001 }
732 },
733 /* l.maci $rA,${simm16} */
734 {
735 { 0, 0, 0, 0 },
736 { { MNEM, ' ', OP (RA), ',', OP (SIMM16), 0 } },
737 & ifmt_l_maci, { 0x4c000000 }
738 },
739 /* l.macu $rA,$rB */
740 {
741 { 0, 0, 0, 0 },
742 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
743 & ifmt_l_mac, { 0xc4000003 }
744 },
745 /* l.msb $rA,$rB */
746 {
747 { 0, 0, 0, 0 },
748 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
749 & ifmt_l_mac, { 0xc4000002 }
750 },
751 /* l.msbu $rA,$rB */
752 {
753 { 0, 0, 0, 0 },
754 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
755 & ifmt_l_mac, { 0xc4000004 }
756 },
757 /* l.cust1 */
758 {
759 { 0, 0, 0, 0 },
760 { { MNEM, 0 } },
761 & ifmt_l_rfe, { 0x70000000 }
762 },
763 /* l.cust2 */
764 {
765 { 0, 0, 0, 0 },
766 { { MNEM, 0 } },
767 & ifmt_l_rfe, { 0x74000000 }
768 },
769 /* l.cust3 */
770 {
771 { 0, 0, 0, 0 },
772 { { MNEM, 0 } },
773 & ifmt_l_rfe, { 0x78000000 }
774 },
775 /* l.cust4 */
776 {
777 { 0, 0, 0, 0 },
778 { { MNEM, 0 } },
779 & ifmt_l_rfe, { 0x7c000000 }
780 },
781 /* l.cust5 */
782 {
783 { 0, 0, 0, 0 },
784 { { MNEM, 0 } },
785 & ifmt_l_rfe, { 0xf0000000 }
786 },
787 /* l.cust6 */
788 {
789 { 0, 0, 0, 0 },
790 { { MNEM, 0 } },
791 & ifmt_l_rfe, { 0xf4000000 }
792 },
793 /* l.cust7 */
794 {
795 { 0, 0, 0, 0 },
796 { { MNEM, 0 } },
797 & ifmt_l_rfe, { 0xf8000000 }
798 },
799 /* l.cust8 */
800 {
801 { 0, 0, 0, 0 },
802 { { MNEM, 0 } },
803 & ifmt_l_rfe, { 0xfc000000 }
804 },
805 /* lf.add.s $rDSF,$rASF,$rBSF */
806 {
807 { 0, 0, 0, 0 },
808 { { MNEM, ' ', OP (RDSF), ',', OP (RASF), ',', OP (RBSF), 0 } },
809 & ifmt_lf_add_s, { 0xc8000000 }
810 },
811 /* lf.add.d $rDD32F,$rAD32F,$rBD32F */
812 {
813 { 0, 0, 0, 0 },
814 { { MNEM, ' ', OP (RDD32F), ',', OP (RAD32F), ',', OP (RBD32F), 0 } },
815 & ifmt_lf_add_d32, { 0xc8000010 }
816 },
817 /* lf.sub.s $rDSF,$rASF,$rBSF */
818 {
819 { 0, 0, 0, 0 },
820 { { MNEM, ' ', OP (RDSF), ',', OP (RASF), ',', OP (RBSF), 0 } },
821 & ifmt_lf_add_s, { 0xc8000001 }
822 },
823 /* lf.sub.d $rDD32F,$rAD32F,$rBD32F */
824 {
825 { 0, 0, 0, 0 },
826 { { MNEM, ' ', OP (RDD32F), ',', OP (RAD32F), ',', OP (RBD32F), 0 } },
827 & ifmt_lf_add_d32, { 0xc8000011 }
828 },
829 /* lf.mul.s $rDSF,$rASF,$rBSF */
830 {
831 { 0, 0, 0, 0 },
832 { { MNEM, ' ', OP (RDSF), ',', OP (RASF), ',', OP (RBSF), 0 } },
833 & ifmt_lf_add_s, { 0xc8000002 }
834 },
835 /* lf.mul.d $rDD32F,$rAD32F,$rBD32F */
836 {
837 { 0, 0, 0, 0 },
838 { { MNEM, ' ', OP (RDD32F), ',', OP (RAD32F), ',', OP (RBD32F), 0 } },
839 & ifmt_lf_add_d32, { 0xc8000012 }
840 },
841 /* lf.div.s $rDSF,$rASF,$rBSF */
842 {
843 { 0, 0, 0, 0 },
844 { { MNEM, ' ', OP (RDSF), ',', OP (RASF), ',', OP (RBSF), 0 } },
845 & ifmt_lf_add_s, { 0xc8000003 }
846 },
847 /* lf.div.d $rDD32F,$rAD32F,$rBD32F */
848 {
849 { 0, 0, 0, 0 },
850 { { MNEM, ' ', OP (RDD32F), ',', OP (RAD32F), ',', OP (RBD32F), 0 } },
851 & ifmt_lf_add_d32, { 0xc8000013 }
852 },
853 /* lf.rem.s $rDSF,$rASF,$rBSF */
854 {
855 { 0, 0, 0, 0 },
856 { { MNEM, ' ', OP (RDSF), ',', OP (RASF), ',', OP (RBSF), 0 } },
857 & ifmt_lf_add_s, { 0xc8000006 }
858 },
859 /* lf.rem.d $rDD32F,$rAD32F,$rBD32F */
860 {
861 { 0, 0, 0, 0 },
862 { { MNEM, ' ', OP (RDD32F), ',', OP (RAD32F), ',', OP (RBD32F), 0 } },
863 & ifmt_lf_add_d32, { 0xc8000016 }
864 },
865 /* lf.itof.s $rDSF,$rA */
866 {
867 { 0, 0, 0, 0 },
868 { { MNEM, ' ', OP (RDSF), ',', OP (RA), 0 } },
869 & ifmt_lf_itof_s, { 0xc8000004 }
870 },
871 /* lf.itof.d $rDD32F,$rADI */
872 {
873 { 0, 0, 0, 0 },
874 { { MNEM, ' ', OP (RDD32F), ',', OP (RADI), 0 } },
875 & ifmt_lf_itof_d32, { 0xc8000014 }
876 },
877 /* lf.ftoi.s $rD,$rASF */
878 {
879 { 0, 0, 0, 0 },
880 { { MNEM, ' ', OP (RD), ',', OP (RASF), 0 } },
881 & ifmt_lf_ftoi_s, { 0xc8000005 }
882 },
883 /* lf.ftoi.d $rDDI,$rAD32F */
884 {
885 { 0, 0, 0, 0 },
886 { { MNEM, ' ', OP (RDDI), ',', OP (RAD32F), 0 } },
887 & ifmt_lf_ftoi_d32, { 0xc8000015 }
888 },
889 /* lf.sfeq.s $rASF,$rBSF */
890 {
891 { 0, 0, 0, 0 },
892 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
893 & ifmt_lf_sfeq_s, { 0xc8000008 }
894 },
895 /* lf.sfeq.d $rAD32F,$rBD32F */
896 {
897 { 0, 0, 0, 0 },
898 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
899 & ifmt_lf_sfeq_d32, { 0xc8000018 }
900 },
901 /* lf.sfne.s $rASF,$rBSF */
902 {
903 { 0, 0, 0, 0 },
904 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
905 & ifmt_lf_sfeq_s, { 0xc8000009 }
906 },
907 /* lf.sfne.d $rAD32F,$rBD32F */
908 {
909 { 0, 0, 0, 0 },
910 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
911 & ifmt_lf_sfeq_d32, { 0xc8000019 }
912 },
913 /* lf.sfge.s $rASF,$rBSF */
914 {
915 { 0, 0, 0, 0 },
916 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
917 & ifmt_lf_sfeq_s, { 0xc800000b }
918 },
919 /* lf.sfge.d $rAD32F,$rBD32F */
920 {
921 { 0, 0, 0, 0 },
922 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
923 & ifmt_lf_sfeq_d32, { 0xc800001b }
924 },
925 /* lf.sfgt.s $rASF,$rBSF */
926 {
927 { 0, 0, 0, 0 },
928 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
929 & ifmt_lf_sfeq_s, { 0xc800000a }
930 },
931 /* lf.sfgt.d $rAD32F,$rBD32F */
932 {
933 { 0, 0, 0, 0 },
934 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
935 & ifmt_lf_sfeq_d32, { 0xc800001a }
936 },
937 /* lf.sflt.s $rASF,$rBSF */
938 {
939 { 0, 0, 0, 0 },
940 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
941 & ifmt_lf_sfeq_s, { 0xc800000c }
942 },
943 /* lf.sflt.d $rAD32F,$rBD32F */
944 {
945 { 0, 0, 0, 0 },
946 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
947 & ifmt_lf_sfeq_d32, { 0xc800001c }
948 },
949 /* lf.sfle.s $rASF,$rBSF */
950 {
951 { 0, 0, 0, 0 },
952 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
953 & ifmt_lf_sfeq_s, { 0xc800000d }
954 },
955 /* lf.sfle.d $rAD32F,$rBD32F */
956 {
957 { 0, 0, 0, 0 },
958 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
959 & ifmt_lf_sfeq_d32, { 0xc800001d }
960 },
961 /* lf.sfueq.s $rASF,$rBSF */
962 {
963 { 0, 0, 0, 0 },
964 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
965 & ifmt_lf_sfeq_s, { 0xc8000028 }
966 },
967 /* lf.sfueq.d $rAD32F,$rBD32F */
968 {
969 { 0, 0, 0, 0 },
970 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
971 & ifmt_lf_sfeq_d32, { 0xc8000038 }
972 },
973 /* lf.sfune.s $rASF,$rBSF */
974 {
975 { 0, 0, 0, 0 },
976 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
977 & ifmt_lf_sfeq_s, { 0xc8000029 }
978 },
979 /* lf.sfune.d $rAD32F,$rBD32F */
980 {
981 { 0, 0, 0, 0 },
982 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
983 & ifmt_lf_sfeq_d32, { 0xc8000039 }
984 },
985 /* lf.sfugt.s $rASF,$rBSF */
986 {
987 { 0, 0, 0, 0 },
988 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
989 & ifmt_lf_sfeq_s, { 0xc800002a }
990 },
991 /* lf.sfugt.d $rAD32F,$rBD32F */
992 {
993 { 0, 0, 0, 0 },
994 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
995 & ifmt_lf_sfeq_d32, { 0xc800003a }
996 },
997 /* lf.sfuge.s $rASF,$rBSF */
998 {
999 { 0, 0, 0, 0 },
1000 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
1001 & ifmt_lf_sfeq_s, { 0xc800002b }
1002 },
1003 /* lf.sfuge.d $rAD32F,$rBD32F */
1004 {
1005 { 0, 0, 0, 0 },
1006 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
1007 & ifmt_lf_sfeq_d32, { 0xc800003b }
1008 },
1009 /* lf.sfult.s $rASF,$rBSF */
1010 {
1011 { 0, 0, 0, 0 },
1012 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
1013 & ifmt_lf_sfeq_s, { 0xc800002c }
1014 },
1015 /* lf.sfult.d $rAD32F,$rBD32F */
1016 {
1017 { 0, 0, 0, 0 },
1018 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
1019 & ifmt_lf_sfeq_d32, { 0xc800003c }
1020 },
1021 /* lf.sfule.s $rASF,$rBSF */
1022 {
1023 { 0, 0, 0, 0 },
1024 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
1025 & ifmt_lf_sfeq_s, { 0xc800002d }
1026 },
1027 /* lf.sfule.d $rAD32F,$rBD32F */
1028 {
1029 { 0, 0, 0, 0 },
1030 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
1031 & ifmt_lf_sfeq_d32, { 0xc800003d }
1032 },
1033 /* lf.sfun.s $rASF,$rBSF */
1034 {
1035 { 0, 0, 0, 0 },
1036 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
1037 & ifmt_lf_sfeq_s, { 0xc800002e }
1038 },
1039 /* lf.sfun.d $rAD32F,$rBD32F */
1040 {
1041 { 0, 0, 0, 0 },
1042 { { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
1043 & ifmt_lf_sfeq_d32, { 0xc800003e }
1044 },
1045 /* lf.madd.s $rDSF,$rASF,$rBSF */
1046 {
1047 { 0, 0, 0, 0 },
1048 { { MNEM, ' ', OP (RDSF), ',', OP (RASF), ',', OP (RBSF), 0 } },
1049 & ifmt_lf_add_s, { 0xc8000007 }
1050 },
1051 /* lf.madd.d $rDD32F,$rAD32F,$rBD32F */
1052 {
1053 { 0, 0, 0, 0 },
1054 { { MNEM, ' ', OP (RDD32F), ',', OP (RAD32F), ',', OP (RBD32F), 0 } },
1055 & ifmt_lf_add_d32, { 0xc8000017 }
1056 },
1057 /* lf.cust1.s $rASF,$rBSF */
1058 {
1059 { 0, 0, 0, 0 },
1060 { { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
1061 & ifmt_lf_cust1_s, { 0xc80000d0 }
1062 },
1063 /* lf.cust1.d */
1064 {
1065 { 0, 0, 0, 0 },
1066 { { MNEM, 0 } },
1067 & ifmt_lf_cust1_d32, { 0xc80000e0 }
1068 },
1069 };
1070
1071 #undef A
1072 #undef OPERAND
1073 #undef MNEM
1074 #undef OP
1075
1076 /* Formats for ALIAS macro-insns. */
1077
1078 #define F(f) & or1k_cgen_ifld_table[OR1K_##f]
1079 #undef F
1080
1081 /* Each non-simple macro entry points to an array of expansion possibilities. */
1082
1083 #define A(a) (1 << CGEN_INSN_##a)
1084 #define OPERAND(op) OR1K_OPERAND_##op
1085 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
1086 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
1087
1088 /* The macro instruction table. */
1089
1090 static const CGEN_IBASE or1k_cgen_macro_insn_table[] =
1091 {
1092 };
1093
1094 /* The macro instruction opcode table. */
1095
1096 static const CGEN_OPCODE or1k_cgen_macro_insn_opcode_table[] =
1097 {
1098 };
1099
1100 #undef A
1101 #undef OPERAND
1102 #undef MNEM
1103 #undef OP
1104
1105 #ifndef CGEN_ASM_HASH_P
1106 #define CGEN_ASM_HASH_P(insn) 1
1107 #endif
1108
1109 #ifndef CGEN_DIS_HASH_P
1110 #define CGEN_DIS_HASH_P(insn) 1
1111 #endif
1112
1113 /* Return non-zero if INSN is to be added to the hash table.
1114 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
1115
1116 static int
asm_hash_insn_p(const CGEN_INSN * insn ATTRIBUTE_UNUSED)1117 asm_hash_insn_p (const CGEN_INSN *insn ATTRIBUTE_UNUSED)
1118 {
1119 return CGEN_ASM_HASH_P (insn);
1120 }
1121
1122 static int
dis_hash_insn_p(const CGEN_INSN * insn)1123 dis_hash_insn_p (const CGEN_INSN *insn)
1124 {
1125 /* If building the hash table and the NO-DIS attribute is present,
1126 ignore. */
1127 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
1128 return 0;
1129 return CGEN_DIS_HASH_P (insn);
1130 }
1131
1132 #ifndef CGEN_ASM_HASH
1133 #define CGEN_ASM_HASH_SIZE 127
1134 #ifdef CGEN_MNEMONIC_OPERANDS
1135 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
1136 #else
1137 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
1138 #endif
1139 #endif
1140
1141 /* It doesn't make much sense to provide a default here,
1142 but while this is under development we do.
1143 BUFFER is a pointer to the bytes of the insn, target order.
1144 VALUE is the first base_insn_bitsize bits as an int in host order. */
1145
1146 #ifndef CGEN_DIS_HASH
1147 #define CGEN_DIS_HASH_SIZE 256
1148 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
1149 #endif
1150
1151 /* The result is the hash value of the insn.
1152 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
1153
1154 static unsigned int
asm_hash_insn(const char * mnem)1155 asm_hash_insn (const char *mnem)
1156 {
1157 return CGEN_ASM_HASH (mnem);
1158 }
1159
1160 /* BUF is a pointer to the bytes of the insn, target order.
1161 VALUE is the first base_insn_bitsize bits as an int in host order. */
1162
1163 static unsigned int
dis_hash_insn(const char * buf ATTRIBUTE_UNUSED,CGEN_INSN_INT value ATTRIBUTE_UNUSED)1164 dis_hash_insn (const char *buf ATTRIBUTE_UNUSED,
1165 CGEN_INSN_INT value ATTRIBUTE_UNUSED)
1166 {
1167 return CGEN_DIS_HASH (buf, value);
1168 }
1169
1170 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */
1171
1172 static void
set_fields_bitsize(CGEN_FIELDS * fields,int size)1173 set_fields_bitsize (CGEN_FIELDS *fields, int size)
1174 {
1175 CGEN_FIELDS_BITSIZE (fields) = size;
1176 }
1177
1178 /* Function to call before using the operand instance table.
1179 This plugs the opcode entries and macro instructions into the cpu table. */
1180
1181 void
or1k_cgen_init_opcode_table(CGEN_CPU_DESC cd)1182 or1k_cgen_init_opcode_table (CGEN_CPU_DESC cd)
1183 {
1184 int i;
1185 int num_macros = (sizeof (or1k_cgen_macro_insn_table) /
1186 sizeof (or1k_cgen_macro_insn_table[0]));
1187 const CGEN_IBASE *ib = & or1k_cgen_macro_insn_table[0];
1188 const CGEN_OPCODE *oc = & or1k_cgen_macro_insn_opcode_table[0];
1189 CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
1190
1191 /* This test has been added to avoid a warning generated
1192 if memset is called with a third argument of value zero. */
1193 if (num_macros >= 1)
1194 memset (insns, 0, num_macros * sizeof (CGEN_INSN));
1195 for (i = 0; i < num_macros; ++i)
1196 {
1197 insns[i].base = &ib[i];
1198 insns[i].opcode = &oc[i];
1199 or1k_cgen_build_insn_regex (& insns[i]);
1200 }
1201 cd->macro_insn_table.init_entries = insns;
1202 cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
1203 cd->macro_insn_table.num_init_entries = num_macros;
1204
1205 oc = & or1k_cgen_insn_opcode_table[0];
1206 insns = (CGEN_INSN *) cd->insn_table.init_entries;
1207 for (i = 0; i < MAX_INSNS; ++i)
1208 {
1209 insns[i].opcode = &oc[i];
1210 or1k_cgen_build_insn_regex (& insns[i]);
1211 }
1212
1213 cd->sizeof_fields = sizeof (CGEN_FIELDS);
1214 cd->set_fields_bitsize = set_fields_bitsize;
1215
1216 cd->asm_hash_p = asm_hash_insn_p;
1217 cd->asm_hash = asm_hash_insn;
1218 cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
1219
1220 cd->dis_hash_p = dis_hash_insn_p;
1221 cd->dis_hash = dis_hash_insn;
1222 cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
1223 }
1224