1 /* Simulator pseudo baseclass. 2 3 Copyright 1997-2020 Free Software Foundation, Inc. 4 5 Contributed by Cygnus Support. 6 7 This file is part of GDB, the GNU debugger. 8 9 This program is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 3 of the License, or 12 (at your option) any later version. 13 14 This program is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 21 22 23 /* Simulator state pseudo baseclass. 24 25 Each simulator is required to have the file ``sim-main.h''. That 26 file includes ``sim-basics.h'', defines the base type ``sim_cia'' 27 (the data type that contains complete current instruction address 28 information), include ``sim-base.h'': 29 30 #include "sim-basics.h" 31 /-* If `sim_cia' is not an integral value (e.g. a struct), define 32 CIA_ADDR to return the integral value. *-/ 33 /-* typedef struct {...} sim_cia; *-/ 34 /-* #define CIA_ADDR(cia) (...) *-/ 35 #include "sim-base.h" 36 37 finally, two data types `struct _sim_cpu' and `struct sim_state' 38 are defined: 39 40 struct _sim_cpu { 41 ... simulator specific members ... 42 sim_cpu_base base; 43 }; 44 45 struct sim_state { 46 sim_cpu *cpu[MAX_NR_PROCESSORS]; 47 ... simulator specific members ... 48 sim_state_base base; 49 }; 50 51 Note that `base' appears last. This makes `base.magic' appear last 52 in the entire struct and helps catch miscompilation errors. */ 53 54 55 #ifndef SIM_BASE_H 56 #define SIM_BASE_H 57 58 #ifdef __cplusplus 59 extern "C" { 60 #endif 61 62 /* Pre-declare certain types. */ 63 64 /* typedef <target-dependant> sim_cia; */ 65 #ifndef NULL_CIA 66 #define NULL_CIA ((sim_cia) 0) 67 #endif 68 /* Return the current instruction address as a number. 69 Some targets treat the current instruction address as a struct 70 (e.g. for delay slot handling). */ 71 #ifndef CIA_ADDR 72 #define CIA_ADDR(cia) (cia) 73 typedef address_word sim_cia; 74 #endif 75 #ifndef INVALID_INSTRUCTION_ADDRESS 76 #define INVALID_INSTRUCTION_ADDRESS ((address_word)0 - 1) 77 #endif 78 79 /* TODO: Probably should just delete SIM_CPU. */ 80 typedef struct _sim_cpu SIM_CPU; 81 typedef struct _sim_cpu sim_cpu; 82 83 #include "sim-module.h" 84 85 #include "sim-arange.h" 86 #include "sim-trace.h" 87 #include "sim-core.h" 88 #include "sim-events.h" 89 #include "sim-profile.h" 90 #include "sim-model.h" 91 #include "sim-io.h" 92 #include "sim-engine.h" 93 #include "sim-watch.h" 94 #include "sim-memopt.h" 95 #include "sim-cpu.h" 96 #include "sim-assert.h" 97 98 99 /* We require all sims to dynamically allocate cpus. See comment up top about 100 struct sim_state. */ 101 #if (WITH_SMP) 102 # define STATE_CPU(sd, n) ((sd)->cpu[n]) 103 #else 104 # define STATE_CPU(sd, n) ((sd)->cpu[0]) 105 #endif 106 107 108 typedef struct { 109 110 /* Simulator's argv[0]. */ 111 const char *my_name; 112 #define STATE_MY_NAME(sd) ((sd)->base.my_name) 113 114 /* Who opened the simulator. */ 115 SIM_OPEN_KIND open_kind; 116 #define STATE_OPEN_KIND(sd) ((sd)->base.open_kind) 117 118 /* The host callbacks. */ 119 struct host_callback_struct *callback; 120 #define STATE_CALLBACK(sd) ((sd)->base.callback) 121 122 /* The type of simulation environment (user/operating). */ 123 enum sim_environment environment; 124 #define STATE_ENVIRONMENT(sd) ((sd)->base.environment) 125 126 #if 0 /* FIXME: Not ready yet. */ 127 /* Stuff defined in sim-config.h. */ 128 struct sim_config config; 129 #define STATE_CONFIG(sd) ((sd)->base.config) 130 #endif 131 132 /* List of installed module `init' handlers. */ 133 struct module_list *modules; 134 #define STATE_MODULES(sd) ((sd)->base.modules) 135 136 /* Supported options. */ 137 struct option_list *options; 138 #define STATE_OPTIONS(sd) ((sd)->base.options) 139 140 /* Non-zero if -v specified. */ 141 int verbose_p; 142 #define STATE_VERBOSE_P(sd) ((sd)->base.verbose_p) 143 144 /* Non cpu-specific trace data. See sim-trace.h. */ 145 TRACE_DATA trace_data; 146 #define STATE_TRACE_DATA(sd) (& (sd)->base.trace_data) 147 148 /* If non NULL, the BFD architecture specified on the command line */ 149 const struct bfd_arch_info *architecture; 150 #define STATE_ARCHITECTURE(sd) ((sd)->base.architecture) 151 152 /* If non NULL, the bfd target specified on the command line */ 153 const char *target; 154 #define STATE_TARGET(sd) ((sd)->base.target) 155 156 /* In standalone simulator, this is the program's arguments passed 157 on the command line. */ 158 char **prog_argv; 159 #define STATE_PROG_ARGV(sd) ((sd)->base.prog_argv) 160 161 /* The program's bfd. */ 162 struct bfd *prog_bfd; 163 #define STATE_PROG_BFD(sd) ((sd)->base.prog_bfd) 164 165 /* Symbol table for prog_bfd */ 166 struct bfd_symbol **prog_syms; 167 #define STATE_PROG_SYMS(sd) ((sd)->base.prog_syms) 168 169 /* Number of prog_syms symbols. */ 170 long prog_syms_count; 171 #define STATE_PROG_SYMS_COUNT(sd) ((sd)->base.prog_syms_count) 172 173 /* The program's text section. */ 174 struct bfd_section *text_section; 175 /* Starting and ending text section addresses from the bfd. */ 176 bfd_vma text_start, text_end; 177 #define STATE_TEXT_SECTION(sd) ((sd)->base.text_section) 178 #define STATE_TEXT_START(sd) ((sd)->base.text_start) 179 #define STATE_TEXT_END(sd) ((sd)->base.text_end) 180 181 /* Start address, set when the program is loaded from the bfd. */ 182 bfd_vma start_addr; 183 #define STATE_START_ADDR(sd) ((sd)->base.start_addr) 184 185 /* Size of the simulator's cache, if any. 186 This is not the target's cache. It is the cache the simulator uses 187 to process instructions. */ 188 unsigned int scache_size; 189 #define STATE_SCACHE_SIZE(sd) ((sd)->base.scache_size) 190 191 /* core memory bus */ 192 #define STATE_CORE(sd) (&(sd)->base.core) 193 sim_core core; 194 195 /* Record of memory sections added via the memory-options interface. */ 196 #define STATE_MEMOPT(sd) ((sd)->base.memopt) 197 sim_memopt *memopt; 198 199 /* event handler */ 200 #define STATE_EVENTS(sd) (&(sd)->base.events) 201 sim_events events; 202 203 /* generic halt/resume engine */ 204 sim_engine engine; 205 #define STATE_ENGINE(sd) (&(sd)->base.engine) 206 207 /* generic watchpoint support */ 208 sim_watchpoints watchpoints; 209 #define STATE_WATCHPOINTS(sd) (&(sd)->base.watchpoints) 210 211 #if WITH_HW 212 struct sim_hw *hw; 213 #define STATE_HW(sd) ((sd)->base.hw) 214 #endif 215 216 /* Should image loads be performed using the LMA or VMA? Older 217 simulators use the VMA while newer simulators prefer the LMA. */ 218 int load_at_lma_p; 219 #define STATE_LOAD_AT_LMA_P(SD) ((SD)->base.load_at_lma_p) 220 221 /* Marker for those wanting to do sanity checks. 222 This should remain the last member of this struct to help catch 223 miscompilation errors. */ 224 int magic; 225 #define SIM_MAGIC_NUMBER 0x4242 226 #define STATE_MAGIC(sd) ((sd)->base.magic) 227 } sim_state_base; 228 229 /* Functions for allocating/freeing a sim_state. */ 230 SIM_DESC sim_state_alloc (SIM_OPEN_KIND kind, host_callback *callback); 231 void sim_state_free (SIM_DESC); 232 233 #ifdef __cplusplus 234 } 235 #endif 236 237 #endif /* SIM_BASE_H */ 238