1 /* $NetBSD: mainbus.c,v 1.30 2021/08/07 16:18:40 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.30 2021/08/07 16:18:40 thorpej Exp $");
34
35 #include "opt_algor_p4032.h"
36 #include "opt_algor_p5064.h"
37 #include "opt_algor_p6032.h"
38
39 #include "opt_pci.h"
40
41 #include <sys/param.h>
42 #include <sys/bus.h>
43 #include <sys/conf.h>
44 #include <sys/device.h>
45 #include <sys/malloc.h>
46 #include <sys/reboot.h>
47 #include <sys/systm.h>
48
49 #include <algor/autoconf.h>
50
51 #include <mips/cache.h>
52
53 #include <dev/pci/pcivar.h>
54 #include <dev/pci/pciconf.h>
55
56 #if defined(PCI_NETBSD_CONFIGURE) && defined(PCI_NETBSD_ENABLE_IDE)
57 #if defined(ALGOR_P5064) || defined(ALGOR_P6032)
58 #include <dev/pci/pciide_piix_reg.h>
59 #endif /* ALGOR_P5064 || ALGOR_P6032 */
60 #endif /* PCI_NETBSD_CONFIGURE && PCI_NETBSD_ENABLE_IDE */
61
62 #include "locators.h"
63 #include "pci.h"
64
65 int mainbus_match(device_t, cfdata_t, void *);
66 void mainbus_attach(device_t, device_t, void *);
67
68 CFATTACH_DECL_NEW(mainbus, 0,
69 mainbus_match, mainbus_attach, NULL, NULL);
70
71 int mainbus_print(void *, const char *);
72 int mainbus_submatch(device_t, cfdata_t,
73 const int *, void *);
74
75 /* There can be only one. */
76 int mainbus_found;
77
78 struct mainbusdev {
79 const char *md_name;
80 bus_addr_t md_addr;
81 int md_irq;
82 };
83
84 #if defined(ALGOR_P4032)
85 #include <algor/algor/algor_p4032reg.h>
86 #include <algor/algor/algor_p4032var.h>
87
88 struct mainbusdev mainbusdevs[] = {
89 { "cpu", -1, -1 },
90 { "mcclock", P4032_RTC, P4032_IRQ_RTC },
91 { "com", P4032_COM1, P4032_IRQ_COM1 },
92 { "com", P4032_COM2, P4032_IRQ_COM2 },
93 { "lpt", P4032_LPT, P4032_IRQ_LPT },
94 { "pckbc", P4032_PCKBC, P4032_IRQ_PCKBC },
95 { "fdc", P4032_FDC, P4032_IRQ_FLOPPY },
96 { "vtpbc", P4032_V962PBC, -1 },
97
98 { NULL, 0, 0 },
99 };
100
101 /* Reserve the bottom 64K of the I/O space for ISA devices. */
102 #define PCI_IO_START 0x00010000
103 #define PCI_IO_END 0x000effff
104 #define PCI_MEM_START 0x01000000
105 #define PCI_MEM_END 0x07ffffff
106 #define PCI_CHIPSET &p4032_configuration.ac_pc
107 #endif /* ALGOR_P4032 */
108
109 #if defined(ALGOR_P5064)
110 #include <algor/algor/algor_p5064reg.h>
111 #include <algor/algor/algor_p5064var.h>
112
113 struct mainbusdev mainbusdevs[] = {
114 { "cpu", -1, -1 },
115 { "vtpbc", P5064_V360EPC, -1 },
116
117 { NULL, 0, 0 },
118 };
119
120 /*
121 * Reserve the bottom 512K of the I/O space for ISA devices.
122 * According to the PMON sources, this is a work-around for
123 * a bug in the ISA bridge.
124 */
125 #define PCI_IO_START 0x00080000
126 #define PCI_IO_END 0x00ffffff
127 #define PCI_MEM_START 0x01000000
128 #define PCI_MEM_END 0x07ffffff
129 #define PCI_IDE_DEV 2
130 #define PCI_IDE_FUNC 1
131 #define PCI_CHIPSET &p5064_configuration.ac_pc
132 #endif /* ALGOR_P5064 */
133
134 #if defined(ALGOR_P6032)
135 #include <algor/algor/algor_p6032reg.h>
136 #include <algor/algor/algor_p6032var.h>
137
138 struct mainbusdev mainbusdevs[] = {
139 { "cpu", -1, -1 },
140 { "bonito", BONITO_REG_BASE, -1 },
141
142 { NULL, 0, 0 },
143 };
144
145 /* Reserve the bottom 64K of the I/O space for ISA devices. */
146 #define PCI_IO_START 0x00010000
147 #define PCI_IO_END 0x000effff
148 #define PCI_MEM_START 0x01000000
149 #define PCI_MEM_END 0x0affffff
150 #define PCI_IDE_DEV 17
151 #define PCI_IDE_FUNC 1
152 #define PCI_CHIPSET &p6032_configuration.ac_pc
153 #endif /* ALGOR_P6032 */
154
155 #define PCI_IO_SIZE ((PCI_IO_END - PCI_IO_START) + 1)
156 #define PCI_MEM_SIZE ((PCI_MEM_END - PCI_MEM_START) + 1)
157
158 int
mainbus_match(device_t parent,cfdata_t cf,void * aux)159 mainbus_match(device_t parent, cfdata_t cf, void *aux)
160 {
161
162 if (mainbus_found)
163 return (0);
164
165 return (1);
166 }
167
168 void
mainbus_attach(device_t parent,device_t self,void * aux)169 mainbus_attach(device_t parent, device_t self, void *aux)
170 {
171 struct mainbus_attach_args ma;
172 struct mainbusdev *md;
173 bus_space_tag_t st;
174
175 mainbus_found = 1;
176
177 printf("\n");
178
179 #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE)
180 struct pciconf_resources *pcires = pciconf_resource_init();
181
182 pciconf_resource_add(pcires, PCICONF_RESOURCE_IO,
183 PCI_IO_START, PCI_IO_SIZE);
184 pciconf_resource_add(pcires, PCICONF_RESOURCE_MEM,
185 PCI_MEM_START, PCI_MEM_SIZE);
186
187 pci_configure_bus(PCI_CHIPSET, pcires, 0,
188 mips_cache_info.mci_dcache_align);
189 pciconf_resource_fini(pcires);
190
191 #if defined(PCI_NETBSD_ENABLE_IDE)
192 /*
193 * Perhaps PMON has not enabled the IDE controller. Easy to
194 * fix -- just set the ENABLE bits for each channel in the
195 * IDETIM register. Just clear all the bits for the channel
196 * except for the ENABLE bits -- the `pciide' driver will
197 * properly configure it later.
198 */
199 pcitag_t idetag = pci_make_tag(PCI_CHIPSET, 0, PCI_IDE_DEV,
200 PCI_IDE_FUNC);
201 pcireg_t idetim = 0;
202 if (PCI_NETBSD_ENABLE_IDE & 0x01)
203 idetim = PIIX_IDETIM_SET(idetim, PIIX_IDETIM_IDE, 0);
204 if (PCI_NETBSD_ENABLE_IDE & 0x02)
205 idetim = PIIX_IDETIM_SET(idetim, PIIX_IDETIM_IDE, 1);
206 pci_conf_write(PCI_CHIPSET, idetag, PIIX_IDETIM, idetim);
207 #endif
208 #endif /* NPCI > 0 && defined(PCI_NETBSD_CONFIGURE) */
209
210 #if defined(ALGOR_P4032)
211 st = &p4032_configuration.ac_lociot;
212 #elif defined(ALGOR_P5064)
213 st = NULL;
214 #elif defined(ALGOR_P6032)
215 st = NULL;
216 #endif
217
218 for (md = mainbusdevs; md->md_name != NULL; md++) {
219 ma.ma_name = md->md_name;
220 ma.ma_st = st;
221 ma.ma_addr = md->md_addr;
222 ma.ma_irq = md->md_irq;
223 config_found(self, &ma, mainbus_print,
224 CFARGS(.submatch = mainbus_submatch));
225 }
226 }
227
228 int
mainbus_print(void * aux,const char * pnp)229 mainbus_print(void *aux, const char *pnp)
230 {
231 struct mainbus_attach_args *ma = aux;
232
233 if (pnp)
234 aprint_normal("%s at %s", ma->ma_name, pnp);
235 if (ma->ma_addr != (bus_addr_t) -1)
236 aprint_normal(" addr %#" PRIxBUSADDR, ma->ma_addr);
237
238 return (UNCONF);
239 }
240
241 int
mainbus_submatch(device_t parent,cfdata_t cf,const int * ldesc,void * aux)242 mainbus_submatch(device_t parent, cfdata_t cf,
243 const int *ldesc, void *aux)
244 {
245 struct mainbus_attach_args *ma = aux;
246
247 if (cf->cf_loc[MAINBUSCF_ADDR] != MAINBUSCF_ADDR_DEFAULT &&
248 cf->cf_loc[MAINBUSCF_ADDR] != ma->ma_addr)
249 return (0);
250
251 return (config_match(parent, cf, aux));
252 }
253