xref: /netbsd/sys/arch/amd64/stand/prekern/pdir.h (revision dac17ed7)
1 /*	$NetBSD: pdir.h,v 1.8 2022/08/21 14:05:52 mlelstv Exp $	*/
2 
3 /*
4  * Copyright (c) 2017-2020 The NetBSD Foundation, Inc. All rights reserved.
5  *
6  * This code is derived from software contributed to The NetBSD Foundation
7  * by Maxime Villard.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #define PREKERNBASE	0x0
32 #define PREKERNTEXTOFF	(PREKERNBASE + 0x100000)
33 
34 #define L4_SLOT_PREKERN	0 /* pl4_i(PREKERNBASE) */
35 #define L4_SLOT_PTE	509
36 
37 #define PDIR_SLOT_KERN	L4_SLOT_PREKERN
38 #define PDIR_SLOT_PTE	L4_SLOT_PTE
39 
40 #define PTE_BASE	((pt_entry_t *)VA_SIGN_NEG((L4_SLOT_PTE * NBPD_L4)))
41 
42 #define L1_BASE	PTE_BASE
43 #define L2_BASE	((pd_entry_t *)((char *)L1_BASE + L4_SLOT_PTE * NBPD_L3))
44 #define L3_BASE	((pd_entry_t *)((char *)L2_BASE + L4_SLOT_PTE * NBPD_L2))
45 #define L4_BASE	((pd_entry_t *)((char *)L3_BASE + L4_SLOT_PTE * NBPD_L1))
46 
47 #define NKL4_KIMG_ENTRIES	1
48 #define NKL3_KIMG_ENTRIES	1
49 #define NKL2_KIMG_ENTRIES	48
50 
51 #define L1_SHIFT	12
52 #define L2_SHIFT	21
53 #define L3_SHIFT	30
54 #define L4_SHIFT	39
55 #define NBPD_L1		(1UL << L1_SHIFT) /* # bytes mapped by L1 ent (4K) */
56 #define NBPD_L2		(1UL << L2_SHIFT) /* # bytes mapped by L2 ent (2MB) */
57 #define NBPD_L3		(1UL << L3_SHIFT) /* # bytes mapped by L3 ent (1G) */
58 #define NBPD_L4		(1UL << L4_SHIFT) /* # bytes mapped by L4 ent (512G) */
59 
60 #define L4_MASK		0x0000ff8000000000
61 #define L3_MASK		0x0000007fc0000000
62 #define L2_MASK		0x000000003fe00000
63 #define L1_MASK		0x00000000001ff000
64 
65 #define L4_FRAME	L4_MASK
66 #define L3_FRAME	(L4_FRAME|L3_MASK)
67 #define L2_FRAME	(L3_FRAME|L2_MASK)
68 #define L1_FRAME	(L2_FRAME|L1_MASK)
69 
70 #define VA_SIGN_MASK		0xffff000000000000
71 #define VA_SIGN_NEG(va)		((va) | VA_SIGN_MASK)
72 
73