1 /* $NetBSD: becc_pci.c,v 1.22 2022/09/27 06:36:43 skrll Exp $ */
2
3 /*
4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * PCI configuration support for the ADI Engineering Big Endian Companion
40 * Chip.
41 */
42
43 #include <sys/cdefs.h>
44 __KERNEL_RCSID(0, "$NetBSD: becc_pci.c,v 1.22 2022/09/27 06:36:43 skrll Exp $");
45
46 #include "opt_pci.h"
47 #include "pci.h"
48
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/device.h>
52 #include <sys/bus.h>
53
54 #include <uvm/uvm_extern.h>
55
56 #include <dev/pci/ppbreg.h>
57 #include <dev/pci/pcivar.h>
58 #include <dev/pci/pciconf.h>
59
60 #include <arm/locore.h>
61
62 #include <arm/xscale/beccreg.h>
63 #include <arm/xscale/beccvar.h>
64
65 void becc_pci_attach_hook(device_t, device_t,
66 struct pcibus_attach_args *);
67 int becc_pci_bus_maxdevs(void *, int);
68 pcitag_t becc_pci_make_tag(void *, int, int, int);
69 void becc_pci_decompose_tag(void *, pcitag_t, int *, int *,
70 int *);
71 pcireg_t becc_pci_conf_read(void *, pcitag_t, int);
72 void becc_pci_conf_write(void *, pcitag_t, int, pcireg_t);
73 void becc_pci_conf_interrupt(void *, int, int, int, int, int *);
74
75 int becc_pci_intr_map(const struct pci_attach_args *,
76 pci_intr_handle_t *);
77 const char *becc_pci_intr_string(void *, pci_intr_handle_t,
78 char *, size_t);
79 const struct evcnt *becc_pci_intr_evcnt(void *, pci_intr_handle_t);
80 void *becc_pci_intr_establish(void *, pci_intr_handle_t,
81 int, int (*)(void *), void *, const char *);
82 void becc_pci_intr_disestablish(void *, void *);
83
84 #define PCI_CONF_LOCK(s) (s) = disable_interrupts(I32_bit)
85 #define PCI_CONF_UNLOCK(s) restore_interrupts((s))
86
87 #if 0
88 #define DPRINTF(x) printf(x)
89 #else
90 #define DPRINTF(x)
91 #endif
92
93 void
becc_pci_init(pci_chipset_tag_t pc,void * cookie)94 becc_pci_init(pci_chipset_tag_t pc, void *cookie)
95 {
96 #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE)
97 struct becc_softc *sc = cookie;
98 struct pciconf_resources *pcires;
99 #endif
100
101 pc->pc_conf_v = cookie;
102 pc->pc_attach_hook = becc_pci_attach_hook;
103 pc->pc_bus_maxdevs = becc_pci_bus_maxdevs;
104 pc->pc_make_tag = becc_pci_make_tag;
105 pc->pc_decompose_tag = becc_pci_decompose_tag;
106 pc->pc_conf_read = becc_pci_conf_read;
107 pc->pc_conf_write = becc_pci_conf_write;
108 pc->pc_conf_interrupt = becc_pci_conf_interrupt;
109
110 pc->pc_intr_v = cookie;
111 pc->pc_intr_map = becc_pci_intr_map;
112 pc->pc_intr_string = becc_pci_intr_string;
113 pc->pc_intr_evcnt = becc_pci_intr_evcnt;
114 pc->pc_intr_establish = becc_pci_intr_establish;
115 pc->pc_intr_disestablish = becc_pci_intr_disestablish;
116
117 #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE)
118 /*
119 * Configure the PCI bus.
120 *
121 * XXX We need to revisit this. We only configure the Secondary
122 * bus (and its children). The bus configure code needs changes
123 * to support how the busses are arranged on this chip. We also
124 * need to only configure devices in the private device space on
125 * the Secondary bus.
126 */
127
128 pcires = pciconf_resource_init();
129
130 /* Reserve the bottom 32K of the PCI address space. */
131 pciconf_resource_add(pcires, PCICONF_RESOURCE_IO,
132 sc->sc_ioout_xlate + (32 * 1024), (32 * 1024));
133 pciconf_resource_add(pcires, PCICONF_RESOURCE_MEM,
134 sc->sc_owin_xlate[0], BECC_PCI_MEM1_SIZE);
135
136 aprint_normal("%s: configuring PCI bus\n", device_xname(sc->sc_dev));
137 pci_configure_bus(pc, pcires, 0, arm_dcache_align);
138
139 pciconf_resource_fini(pcires);
140 #endif
141 }
142
143 void
becc_pci_conf_interrupt(void * v,int a,int b,int c,int d,int * p)144 becc_pci_conf_interrupt(void *v, int a, int b, int c, int d, int *p)
145 {
146 }
147
148 void
becc_pci_attach_hook(device_t parent,device_t self,struct pcibus_attach_args * pba)149 becc_pci_attach_hook(device_t parent, device_t self,
150 struct pcibus_attach_args *pba)
151 {
152
153 /* Nothing to do. */
154 }
155
156 int
becc_pci_bus_maxdevs(void * v,int busno)157 becc_pci_bus_maxdevs(void *v, int busno)
158 {
159
160 return (32);
161 }
162
163 pcitag_t
becc_pci_make_tag(void * v,int b,int d,int f)164 becc_pci_make_tag(void *v, int b, int d, int f)
165 {
166
167 return ((b << 16) | (d << 11) | (f << 8));
168 }
169
170 void
becc_pci_decompose_tag(void * v,pcitag_t tag,int * bp,int * dp,int * fp)171 becc_pci_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp)
172 {
173
174 if (bp != NULL)
175 *bp = (tag >> 16) & 0xff;
176 if (dp != NULL)
177 *dp = (tag >> 11) & 0x1f;
178 if (fp != NULL)
179 *fp = (tag >> 8) & 0x7;
180 }
181
182 struct pciconf_state {
183 uint32_t ps_offset;
184
185 int ps_b, ps_d, ps_f;
186 int ps_type;
187 };
188
189 static int
becc_pci_conf_setup(struct becc_softc * sc,pcitag_t tag,int offset,struct pciconf_state * ps)190 becc_pci_conf_setup(struct becc_softc *sc, pcitag_t tag, int offset,
191 struct pciconf_state *ps)
192 {
193
194 if ((unsigned int)offset >= PCI_CONF_SIZE)
195 return (1);
196
197 becc_pci_decompose_tag(sc, tag, &ps->ps_b, &ps->ps_d, &ps->ps_f);
198
199 /*
200 * If the bus # is the same as our own, then use Type 0 cycles,
201 * else use Type 1.
202 */
203 if (ps->ps_b == 0) {
204 /* XXX This is a platform-specific parameter. */
205 if (ps->ps_d > (14 - BECC_IDSEL_BIT))
206 return (1);
207 ps->ps_offset = (1U << (ps->ps_d + BECC_IDSEL_BIT)) |
208 (ps->ps_f << 8) | offset;
209 ps->ps_type = 0;
210 } else {
211 /* The tag is already in the correct format. */
212 ps->ps_offset = tag | offset | 1;
213 ps->ps_type = 1;
214 }
215
216 return (0);
217 }
218
219 static int becc_pci_conf_cleanup(struct becc_softc *sc);
220 static int
becc_pci_conf_cleanup(struct becc_softc * sc)221 becc_pci_conf_cleanup(struct becc_softc *sc)
222 {
223 uint32_t reg;
224 int err=0;
225
226 BECC_CSR_WRITE(BECC_POCR, 0);
227
228 reg = becc_pcicore_read(sc, PCI_COMMAND_STATUS_REG);
229 if (reg & 0xf9000000) {
230 DPRINTF((" ** pci status error: %08x (%08x) **\n",
231 reg, reg & 0xf9000000));
232
233 err = 1;
234 becc_pcicore_write(sc, PCI_COMMAND_STATUS_REG,
235 reg & 0xf900ffff);
236 reg = becc_pcicore_read(sc, PCI_COMMAND_STATUS_REG);
237
238 DPRINTF((" ** pci status after clearing: %08x (%08x) **\n",
239 reg, reg & 0xf9000000));
240 }
241 reg = BECC_CSR_READ(BECC_PMISR);
242 if (reg & 0x000f000d) {
243 DPRINTF((" ** pci master isr: %08x (%08x) **\n",
244 reg, reg & 0x000f000d));
245
246 err = 1;
247 BECC_CSR_WRITE(BECC_PMISR, reg & 0x000f000d);
248 reg = BECC_CSR_READ(BECC_PMISR);
249
250 DPRINTF((" ** pci master isr after clearing: %08x (%08x) **\n",
251 reg, reg & 0x000f000d));
252 }
253 reg = BECC_CSR_READ(BECC_PSISR);
254 if (reg & 0x000f0210) {
255 DPRINTF((" ** pci slave isr: %08x (%08x) **\n",
256 reg, reg & 0x000f0210));
257
258 err = 1;
259 BECC_CSR_WRITE(BECC_PSISR, reg & 0x000f0210);
260 reg = BECC_CSR_READ(BECC_PSISR);
261
262 DPRINTF((" ** pci slave isr after clearing: %08x (%08x) **\n",
263 reg, reg & 0x000f0210));
264 }
265
266 return err;
267 }
268
269 pcireg_t
becc_pci_conf_read(void * v,pcitag_t tag,int offset)270 becc_pci_conf_read(void *v, pcitag_t tag, int offset)
271 {
272 struct becc_softc *sc = v;
273 struct pciconf_state ps;
274 vaddr_t va;
275 pcireg_t rv;
276 u_int s;
277
278 if (becc_pci_conf_setup(sc, tag, offset, &ps))
279 return ((pcireg_t) -1);
280
281 /*
282 * Skip device 0 (the BECC itself). We don't want it
283 * to appear as part of the PCI device space.
284 */
285 if (ps.ps_b == 0 && ps.ps_d == 0)
286 return ((pcireg_t) -1);
287
288 PCI_CONF_LOCK(s);
289
290 va = sc->sc_pci_cfg_base + ps.ps_offset;
291 BECC_CSR_WRITE(BECC_POCR, ps.ps_type);
292
293 if (badaddr_read((void *) va, sizeof(rv), &rv)) {
294 /* XXX Check master/target abort? */
295 #if 0
296 printf("conf_read: %d/%d/%d bad address\n",
297 ps.ps_b, ps.ps_d, ps.ps_f);
298 #endif
299 rv = (pcireg_t) -1;
300 }
301
302 if (becc_pci_conf_cleanup(sc))
303 rv = (pcireg_t) -1;
304
305 PCI_CONF_UNLOCK(s);
306
307 return (rv);
308 }
309
310 void
becc_pci_conf_write(void * v,pcitag_t tag,int offset,pcireg_t val)311 becc_pci_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)
312 {
313 struct becc_softc *sc = v;
314 struct pciconf_state ps;
315 vaddr_t va;
316 u_int s;
317
318 if (becc_pci_conf_setup(sc, tag, offset, &ps))
319 return;
320
321 PCI_CONF_LOCK(s);
322 BECC_CSR_WRITE(BECC_POCR, ps.ps_type);
323
324 va = sc->sc_pci_cfg_base + ps.ps_offset;
325
326 *(volatile pcireg_t *)va = val;
327
328 becc_pci_conf_cleanup(sc);
329
330 PCI_CONF_UNLOCK(s);
331 }
332
333 int
becc_pci_intr_map(const struct pci_attach_args * pa,pci_intr_handle_t * ihp)334 becc_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
335 {
336 int irq;
337
338 if (pa->pa_bus == 0) {
339 switch (pa->pa_device) {
340 case 1: irq = ICU_PCI_INTB; break; /* Ethernet #0 */
341 case 2: irq = ICU_PCI_INTC; break; /* Ethernet #1 */
342 case 3: /* Card slot */
343 switch (pa->pa_intrpin) {
344 case 1: irq = ICU_PCI_INTA; break;
345 case 2: irq = ICU_PCI_INTB; break;
346 case 3: irq = ICU_PCI_INTC; break;
347 case 4: irq = ICU_PCI_INTD; break;
348 default:
349 printf("becc_pci_intr_map: bogus pin: %d\n",
350 pa->pa_intrpin);
351 return (1);
352 }
353 break;
354 default:
355 printf("becc_pci_intr_map: bogus device: %d\n",
356 pa->pa_device);
357 return (1);
358 }
359 } else {
360 switch (pa->pa_intrpin) {
361 case 1: irq = ICU_PCI_INTA; break;
362 case 2: irq = ICU_PCI_INTB; break;
363 case 3: irq = ICU_PCI_INTC; break;
364 case 4: irq = ICU_PCI_INTD; break;
365 default:
366 printf("becc_pci_intr_map: bogus pin: %d\n",
367 pa->pa_intrpin);
368 return (1);
369 }
370 }
371
372 *ihp = irq;
373 return (0);
374 }
375
376 const char *
becc_pci_intr_string(void * v,pci_intr_handle_t ih,char * buf,size_t len)377 becc_pci_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len)
378 {
379
380 strlcpy(buf, becc_irqnames[ih], len);
381 return buf;
382 }
383
384 const struct evcnt *
becc_pci_intr_evcnt(void * v,pci_intr_handle_t ih)385 becc_pci_intr_evcnt(void *v, pci_intr_handle_t ih)
386 {
387
388 /* XXX For now. */
389 return (NULL);
390 }
391
392 void *
becc_pci_intr_establish(void * v,pci_intr_handle_t ih,int ipl,int (* func)(void *),void * arg,const char * xname)393 becc_pci_intr_establish(void *v, pci_intr_handle_t ih, int ipl,
394 int (*func)(void *), void *arg, const char *xname)
395 {
396
397 return (becc_intr_establish(ih, ipl, func, arg));
398 }
399
400 void
becc_pci_intr_disestablish(void * v,void * cookie)401 becc_pci_intr_disestablish(void *v, void *cookie)
402 {
403
404 becc_intr_disestablish(cookie);
405 }
406