xref: /netbsd/sys/arch/arm/xscale/ixp425_space.c (revision f7e75822)
1 /*	$NetBSD: ixp425_space.c,v 1.10 2023/04/21 15:00:48 skrll Exp $ */
2 
3 /*
4  * Copyright (c) 2003
5  *	Ichiro FUKUHARA <ichiro@ichiro.org>.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
21  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  */
29 
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: ixp425_space.c,v 1.10 2023/04/21 15:00:48 skrll Exp $");
32 
33 /*
34  * bus_space I/O functions for ixp425
35  */
36 
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/queue.h>
40 
41 #include <uvm/uvm.h>
42 
43 #include <sys/bus.h>
44 
45 #include <arm/xscale/ixp425reg.h>
46 #include <arm/xscale/ixp425var.h>
47 
48 /* Proto types for all the bus_space structure functions */
49 bs_protos(ixp425);
50 bs_protos(generic);
51 bs_protos(generic_armv4);
52 bs_protos(bs_notimpl);
53 
54 struct bus_space ixp425_bs_tag = {
55 	/* cookie */
56 	.bs_cookie = (void *) 0,
57 
58 	/* mapping/unmapping */
59 	.bs_map = ixp425_bs_map,
60 	.bs_unmap = ixp425_bs_unmap,
61 	.bs_subregion = ixp425_bs_subregion,
62 
63 	/* allocation/deallocation */
64 	.bs_alloc = ixp425_bs_alloc,
65 	.bs_free = ixp425_bs_free,
66 
67 	/* get kernel virtual address */
68 	.bs_vaddr = ixp425_bs_vaddr,
69 
70 	/* mmap bus space for userland */
71 	.bs_mmap = ixp425_bs_mmap,
72 
73 	/* barrier */
74 	.bs_barrier = ixp425_bs_barrier,
75 
76 	/* read (single) */
77 	.bs_r_1 = generic_bs_r_1,
78 	.bs_r_2 = generic_armv4_bs_r_2,
79 	.bs_r_4 = generic_bs_r_4,
80 	.bs_r_8 = bs_notimpl_bs_r_8,
81 
82 	/* read multiple */
83 	.bs_rm_1 = generic_bs_rm_1,
84 	.bs_rm_2 = generic_armv4_bs_rm_2,
85 	.bs_rm_4 = generic_bs_rm_4,
86 	.bs_rm_8 = bs_notimpl_bs_rm_8,
87 
88 	/* read region */
89 	.bs_rr_1 = generic_bs_rr_1,
90 	.bs_rr_2 = generic_armv4_bs_rr_2,
91 	.bs_rr_4 = generic_bs_rr_4,
92 	.bs_rr_8 = bs_notimpl_bs_rr_8,
93 
94 	/* write (single) */
95 	.bs_w_1 = generic_bs_w_1,
96 	.bs_w_2 = generic_armv4_bs_w_2,
97 	.bs_w_4 = generic_bs_w_4,
98 	.bs_w_8 = bs_notimpl_bs_w_8,
99 
100 	/* write multiple */
101 	.bs_wm_1 = generic_bs_wm_1,
102 	.bs_wm_2 = generic_armv4_bs_wm_2,
103 	.bs_wm_4 = generic_bs_wm_4,
104 	.bs_wm_8 = bs_notimpl_bs_wm_8,
105 
106 	/* write region */
107 	.bs_wr_1 = generic_bs_wr_1,
108 	.bs_wr_2 = generic_armv4_bs_wr_2,
109 	.bs_wr_4 = generic_bs_wr_4,
110 	.bs_wr_8 = bs_notimpl_bs_wr_8,
111 
112 	/* set multiple */
113 	.bs_sm_1 = bs_notimpl_bs_sm_1,
114 	.bs_sm_2 = bs_notimpl_bs_sm_2,
115 	.bs_sm_4 = bs_notimpl_bs_sm_4,
116 	.bs_sm_8 = bs_notimpl_bs_sm_8,
117 
118 	/* set region */
119 	.bs_sr_1 = bs_notimpl_bs_sr_1,
120 	.bs_sr_2 = generic_armv4_bs_sr_2,
121 	.bs_sr_4 = generic_bs_sr_4,
122 	.bs_sr_8 = bs_notimpl_bs_sr_8,
123 
124 	/* copy */
125 	.bs_c_1 = bs_notimpl_bs_c_1,
126 	.bs_c_2 = generic_armv4_bs_c_2,
127 	.bs_c_4 = bs_notimpl_bs_c_4,
128 	.bs_c_8 = bs_notimpl_bs_c_8,
129 };
130 
131 int
ixp425_bs_map(void * t,bus_addr_t bpa,bus_size_t size,int cacheable,bus_space_handle_t * bshp)132 ixp425_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
133 	      int cacheable, bus_space_handle_t *bshp)
134 {
135 	const struct pmap_devmap	*pd;
136 
137 	paddr_t		startpa;
138 	paddr_t		endpa;
139 	paddr_t		pa;
140 	paddr_t		offset;
141 	vaddr_t		va;
142 
143 	if ((pd = pmap_devmap_find_pa(bpa, size)) != NULL) {
144 		/* Device was statically mapped. */
145 		*bshp = pd->pd_va + (bpa - pd->pd_pa);
146 		return 0;
147 	}
148 
149 	endpa = round_page(bpa + size);
150 	offset = bpa & PAGE_MASK;
151 	startpa = trunc_page(bpa);
152 
153 	/* Get some VM.  */
154 	va = uvm_km_alloc(kernel_map, endpa - startpa, 0,
155 	    UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
156 	if (va == 0)
157 		return ENOMEM;
158 
159 	/* Store the bus space handle */
160 	*bshp = va + offset;
161 
162 	/* Now map the pages */
163 	for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
164 		pmap_enter(pmap_kernel(), va, pa,
165 		    VM_PROT_READ | VM_PROT_WRITE,
166 		    VM_PROT_READ | VM_PROT_WRITE | PMAP_WIRED);
167 	}
168 	pmap_update(pmap_kernel());
169 
170 	return(0);
171 }
172 
173 void
ixp425_bs_unmap(void * t,bus_space_handle_t bsh,bus_size_t size)174 ixp425_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
175 {
176 	vaddr_t	va;
177 	vaddr_t	endva;
178 
179 	if (pmap_devmap_find_va(bsh, size) != NULL) {
180 		/* Device was statically mapped; nothing to do. */
181 		return;
182 	}
183 
184 	endva = round_page(bsh + size);
185 	va = trunc_page(bsh);
186 
187 	pmap_remove(pmap_kernel(), va, endva);
188 	pmap_update(pmap_kernel());
189 	uvm_km_free(kernel_map, va, endva - va, UVM_KMF_VAONLY);
190 }
191 
192 int
ixp425_bs_alloc(void * t,bus_addr_t rstart,bus_addr_t rend,bus_size_t size,bus_size_t alignment,bus_size_t boundary,int cacheable,bus_addr_t * bpap,bus_space_handle_t * bshp)193 ixp425_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
194 	bus_size_t size, bus_size_t alignment, bus_size_t boundary, int cacheable,
195 	bus_addr_t *bpap, bus_space_handle_t *bshp)
196 {
197 	panic("ixp425_bs_alloc(): not implemented\n");
198 }
199 
200 void
ixp425_bs_free(void * t,bus_space_handle_t bsh,bus_size_t size)201 ixp425_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
202 {
203 	panic("ixp425_bs_free(): not implemented\n");
204 }
205 
206 int
ixp425_bs_subregion(void * t,bus_space_handle_t bsh,bus_size_t offset,bus_size_t size,bus_space_handle_t * nbshp)207 ixp425_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
208 	bus_size_t size, bus_space_handle_t *nbshp)
209 {
210 	*nbshp = bsh + offset;
211 	return (0);
212 }
213 
214 void *
ixp425_bs_vaddr(void * t,bus_space_handle_t bsh)215 ixp425_bs_vaddr(void *t, bus_space_handle_t bsh)
216 {
217 	return ((void *)bsh);
218 }
219 
220 paddr_t
ixp425_bs_mmap(void * t,bus_addr_t addr,off_t off,int prot,int flags)221 ixp425_bs_mmap(void *t, bus_addr_t addr, off_t off, int prot, int flags)
222 {
223 	/* Not supported. */
224 	return (-1);
225 }
226 
227 void
ixp425_bs_barrier(void * t,bus_space_handle_t bsh,bus_size_t offset,bus_size_t len,int flags)228 ixp425_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
229     bus_size_t len, int flags)
230 {
231 /* NULL */
232 }
233 /* End of ixp425_space.c */
234