1 /* $NetBSD: cpu.h,v 1.46 2019/11/23 19:40:35 ad Exp $ */ 2 3 /* 4 * Copyright (c) 1988 University of Utah. 5 * Copyright (c) 1982, 1990, 1993 6 * The Regents of the University of California. All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * the Systems Programming Group of the University of Utah Computer 10 * Science Department. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: Utah $Hdr: cpu.h 1.16 91/03/25$ 37 * 38 * @(#)cpu.h 8.4 (Berkeley) 1/5/94 39 */ 40 41 #ifndef _NEWS68K_CPU_H_ 42 #define _NEWS68K_CPU_H_ 43 44 #if defined(_KERNEL_OPT) 45 #include "opt_lockdebug.h" 46 #include "opt_m68k_arch.h" 47 #endif 48 49 /* 50 * Get common m68k CPU definitions. 51 */ 52 #include <m68k/cpu.h> 53 54 #if defined(_KERNEL) 55 /* 56 * Exported definitions unique to news68k cpu support. 57 */ 58 59 /* 60 * XXX news1700 L2 cache would be corrupted with DC_BE and IC_BE... 61 * XXX Should these be defined in machine/cpu.h? 62 */ 63 #undef CACHE_ON 64 #undef CACHE_CLR 65 #undef IC_CLEAR 66 #undef DC_CLEAR 67 #define CACHE_ON (DC_WA|DC_CLR|DC_ENABLE|IC_CLR|IC_ENABLE) 68 #define CACHE_CLR CACHE_ON 69 #define IC_CLEAR (DC_WA|DC_ENABLE|IC_CLR|IC_ENABLE) 70 #define DC_CLEAR (DC_WA|DC_CLR|DC_ENABLE|IC_ENABLE) 71 72 #define DCIC_CLR (DC_CLR|IC_CLR) 73 #define CACHE_BE (DC_BE|IC_BE) 74 75 /* 76 * Get interrupt glue. 77 */ 78 #include <machine/intr.h> 79 80 /* 81 * Arguments to hardclock and gatherstats encapsulate the previous 82 * machine state in an opaque clockframe. On the news68k, we use 83 * what the hardware pushes on an interrupt (frame format 0). 84 */ 85 struct clockframe { 86 u_short sr; /* sr at time of interrupt */ 87 u_long pc; /* pc at time of interrupt */ 88 u_short vo; /* vector offset (4-word frame) */ 89 }; 90 91 #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0) 92 #define CLKF_PC(framep) ((framep)->pc) 93 #if 0 94 /* We would like to do it this way... */ 95 #define CLKF_INTR(framep) (((framep)->sr & PSL_M) == 0) 96 #else 97 /* but until we start using PSL_M, we have to do this instead */ 98 #include <machine/intr.h> 99 #define CLKF_INTR(framep) (idepth > 1) /* XXX */ 100 #endif 101 102 103 /* 104 * Preempt the current process if in interrupt from user mode, 105 * or after the current trap/syscall if in system mode. 106 */ 107 #define cpu_need_resched(ci,l,flags) do { \ 108 __USE(flags); \ 109 aston(); \ 110 } while (/*CONSTCOND*/0) 111 112 /* 113 * Give a profiling tick to the current process when the user profiling 114 * buffer pages are invalid. On the news68k, request an ast to send us 115 * through trap, marking the proc as needing a profiling tick. 116 */ 117 #define cpu_need_proftick(l) \ 118 do { (l)->l_pflag |= LP_OWEUPC; aston(); } while (/* CONSTCOND */0) 119 120 /* 121 * Notify the current process (p) that it has a signal pending, 122 * process as soon as possible. 123 */ 124 #define cpu_signotify(l) aston() 125 126 extern int astpending; /* need to trap before returning to user mode */ 127 extern volatile u_char *ctrl_ast; 128 #define aston() \ 129 do { astpending++; *ctrl_ast = 0xff; } while (/* CONSTCOND */0) 130 131 #if defined(news1700) || defined(news1200) 132 #ifndef M68030 133 #define M68030 134 #endif 135 #define M68K_MMU_MOTOROLA 136 #endif 137 138 #if defined(news1700) 139 #define CACHE_HAVE_PAC 140 #endif 141 142 extern int systype; 143 #define NEWS1700 0 144 #define NEWS1200 1 145 146 extern int cpuspeed; 147 extern char *intiobase, *intiolimit, *extiobase; 148 extern u_int intiobase_phys, intiotop_phys; 149 extern u_int extiobase_phys, extiotop_phys; 150 extern u_int intrcnt[]; 151 152 extern void (*vectab[])(void); 153 extern void *romcallvec; 154 155 struct frame; 156 157 /* locore.s functions */ 158 void loadustp(int); 159 void badtrap(void); 160 void intrhand_vectored(void); 161 int getsr(void); 162 163 164 void doboot(int) 165 __attribute__((__noreturn__)); 166 void nmihand(struct frame *); 167 void ecacheon(void); 168 void ecacheoff(void); 169 170 /* machdep.c functions */ 171 int badaddr(void *, int); 172 int badbaddr(void *); 173 174 #endif 175 176 /* physical memory sections */ 177 #define ROMBASE 0xe0000000 178 179 #define INTIOBASE1700 0xe0c00000 180 #define INTIOTOP1700 0xe1d00000 /* XXX */ 181 #define EXTIOBASE1700 0xf0f00000 182 #define EXTIOTOP1700 0xf1000000 /* XXX */ 183 #define CTRL_POWER1700 0xe1380000 184 #define CTRL_LED1700 0xe0dc0000 185 186 #define INTIOBASE1200 0xe1000000 187 #define INTIOTOP1200 0xe1d00000 /* XXX */ 188 #define EXTIOBASE1200 0xe4000000 189 #define EXTIOTOP1200 0xe4020000 /* XXX */ 190 #define CTRL_POWER1200 0xe1000000 191 #define CTRL_LED1200 0xe1500001 192 193 #define MAXADDR 0xfffff000 194 195 /* 196 * Internal IO space: 197 * 198 * Internal IO space is mapped in the kernel from ``intiobase'' to 199 * ``intiolimit'' (defined in locore.s). Since it is always mapped, 200 * conversion between physical and kernel virtual addresses is easy. 201 */ 202 #define ISIIOVA(va) \ 203 ((char *)(va) >= intiobase && (char *)(va) < intiolimit) 204 #define IIOV(pa) (((u_int)(pa) - intiobase_phys) + (u_int)intiobase) 205 #define ISIIOPA(pa) \ 206 ((u_int)(pa) >= intiobase_phys && (u_int)(pa) < intiotop_phys) 207 #define IIOP(va) (((u_int)(va) - (u_int)intiobase) + intiobase_phys) 208 #define IIOPOFF(pa) ((u_int)(pa) - intiobase_phys) 209 210 /* XXX EIO space mapping should be modified like hp300 XXX */ 211 #define EIOSIZE (extiotop_phys - extiobase_phys) 212 #define ISEIOVA(va) \ 213 ((char *)(va) >= extiobase && (char *)(va) < (char *)EIOSIZE) 214 #define EIOV(pa) (((u_int)(pa) - extiobase_phys) + (u_int)extiobase) 215 216 #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC) 217 #define M68K_CACHEOPS_MACHDEP 218 #endif 219 220 #ifdef CACHE_HAVE_PAC 221 #define M68K_CACHEOPS_MACHDEP_PCIA 222 #endif 223 224 #ifdef CACHE_HAVE_VAC 225 #define M68K_CACHEOPS_MACHDEP_DCIA 226 #define M68K_CACHEOPS_MACHDEP_DCIS 227 #define M68K_CACHEOPS_MACHDEP_DCIU 228 #endif 229 230 #endif /* !_NEWS68K_CPU_H_ */ 231