1 /* $NetBSD: pciide.c,v 1.12 2012/01/22 13:08:16 phx Exp $ */
2
3 /*-
4 * Copyright (c) 2008 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Tohru Nishimura.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/param.h>
33
34 #include <lib/libsa/stand.h>
35
36 #include "globals.h"
37
38 static void cmdidefix(struct dkdev_ata *);
39 static void apoidefix(struct dkdev_ata *);
40 static void iteidefix(struct dkdev_ata *);
41
42 static uint32_t pciiobase = PCI_XIOBASE;
43
44 struct myops {
45 void (*chipfix)(struct dkdev_ata *);
46 int (*presense)(struct dkdev_ata *, int);
47 };
48 static struct myops defaultops = { NULL, NULL };
49 static struct myops cmdideops = { cmdidefix, NULL };
50 static struct myops apoideops = { apoidefix, NULL };
51 static struct myops iteideops = { iteidefix, NULL };
52 static struct myops *myops;
53
54 int
pciide_match(unsigned tag,void * data)55 pciide_match(unsigned tag, void *data)
56 {
57 unsigned v;
58
59 v = pcicfgread(tag, PCI_ID_REG);
60 switch (v) {
61 case PCI_DEVICE(0x1095, 0x0680): /* SiI 0680 IDE */
62 myops = &cmdideops;
63 return 1;
64 case PCI_DEVICE(0x1106, 0x0571): /* VIA 82C586A/B/686A/B IDE */
65 case PCI_DEVICE(0x1106, 0x1571): /* VIA 82C586 IDE */
66 case PCI_DEVICE(0x1106, 0x3164): /* VIA VT6410 RAID IDE */
67 myops = &apoideops;
68 return 1;
69 case PCI_DEVICE(0x1283, 0x8211): /* ITE 8211 IDE */
70 myops = &iteideops;
71 return 1;
72 case PCI_DEVICE(0x10ad, 0x0105): /* Symphony Labs 82C105 IDE */
73 case PCI_DEVICE(0x10b8, 0x5229): /* ALi IDE */
74 case PCI_DEVICE(0x1191, 0x0008): /* ACARD ATP865 */
75 case PCI_DEVICE(0x1191, 0x0009): /* ACARD ATP865A */
76 myops = &defaultops;
77 return 1;
78 }
79 return 0;
80 }
81
82 void *
pciide_init(unsigned tag,void * data)83 pciide_init(unsigned tag, void *data)
84 {
85 static int cntrl = 0;
86 int native, n, retries;
87 unsigned val;
88 struct dkdev_ata *l;
89
90 l = alloc(sizeof(struct dkdev_ata));
91 memset(l, 0, sizeof(struct dkdev_ata));
92 l->iobuf = allocaligned(512, 16);
93 l->tag = tag;
94
95 /* chipset specific fixes */
96 if (myops->chipfix)
97 (*myops->chipfix)(l);
98
99 val = pcicfgread(tag, PCI_CLASS_REG);
100 native = PCI_CLASS(val) != PCI_CLASS_IDE ||
101 (PCI_INTERFACE(val) & 05) != 0;
102
103 if (native) {
104 /* native, use BAR 01234 */
105 l->bar[0] = pciiobase + (pcicfgread(tag, 0x10) &~ 01);
106 l->bar[1] = pciiobase + (pcicfgread(tag, 0x14) &~ 01);
107 l->bar[2] = pciiobase + (pcicfgread(tag, 0x18) &~ 01);
108 l->bar[3] = pciiobase + (pcicfgread(tag, 0x1c) &~ 01);
109 l->bar[4] = pciiobase + (pcicfgread(tag, 0x20) &~ 01);
110 l->chan[0].cmd = l->bar[0];
111 l->chan[0].ctl = l->chan[0].alt = l->bar[1] | 02;
112 l->chan[0].dma = l->bar[4] + 0x0;
113 l->chan[1].cmd = l->bar[2];
114 l->chan[1].ctl = l->chan[1].alt = l->bar[3] | 02;
115 l->chan[1].dma = l->bar[4] + 0x8;
116 }
117 else {
118 /* legacy */
119 l->bar[0]= pciiobase + 0x1f0;
120 l->bar[1]= pciiobase + 0x3f4;
121 l->bar[2]= pciiobase + 0x170;
122 l->bar[3]= pciiobase + 0x374;
123 l->chan[0].cmd = l->bar[0];
124 l->chan[0].ctl = l->chan[0].alt = l->bar[1] | 02;
125 l->chan[0].dma = 0;
126 l->chan[1].cmd = l->bar[2];
127 l->chan[1].ctl = l->chan[1].alt = l->bar[3] | 02;
128 l->chan[1].dma = 0;
129 }
130
131 for (n = 0; n < 2; n++) {
132 if (myops->presense != NULL && (*myops->presense)(l, n) == 0) {
133 DPRINTF(("channel %d not present\n", n));
134 l->presense[n] = 0;
135 continue;
136 } else if (get_drive_config(cntrl * 2 + n) == 0) {
137 DPRINTF(("channel %d disabled by config\n", n));
138 l->presense[n] = 0;
139 continue;
140 }
141
142 if (atachkpwr(l, n) != ATA_PWR_ACTIVE) {
143 /* drive is probably sleeping, wake it up */
144 for (retries = 0; retries < 10; retries++) {
145 wakeup_drive(l, n);
146 DPRINTF(("channel %d spinning up...\n", n));
147 delay(1000 * 1000);
148 l->presense[n] = perform_atareset(l, n);
149 if (atachkpwr(l, n) == ATA_PWR_ACTIVE)
150 break;
151 }
152 } else {
153 /* check to see whether soft reset works */
154 DPRINTF(("channel %d active\n", n));
155 l->presense[n] = perform_atareset(l, n);
156 }
157
158 if (l->presense[n])
159 printf("channel %d present\n", n);
160 }
161
162 cntrl++; /* increment controller number for next call */
163 return l;
164 }
165
166 static void
cmdidefix(struct dkdev_ata * l)167 cmdidefix(struct dkdev_ata *l)
168 {
169 unsigned v;
170
171 v = pcicfgread(l->tag, 0x80);
172 pcicfgwrite(l->tag, 0x80, (v & ~0xff) | 0x01);
173 v = pcicfgread(l->tag, 0x84);
174 pcicfgwrite(l->tag, 0x84, (v & ~0xff) | 0x01);
175 v = pcicfgread(l->tag, 0xa4);
176 pcicfgwrite(l->tag, 0xa4, (v & ~0xffff) | 0x328a);
177 v = pcicfgread(l->tag, 0xb4);
178 pcicfgwrite(l->tag, 0xb4, (v & ~0xffff) | 0x328a);
179 }
180
181 static void
apoidefix(struct dkdev_ata * l)182 apoidefix(struct dkdev_ata *l)
183 {
184 unsigned v;
185
186 /* enable primary and secondary channel */
187 v = pcicfgread(l->tag, 0x40) & ~0x03;
188 pcicfgwrite(l->tag, 0x40, v | 0x03);
189 }
190
191 static void
iteidefix(struct dkdev_ata * l)192 iteidefix(struct dkdev_ata *l)
193 {
194 unsigned v;
195
196 /* set PCI mode and 66Mhz reference clock, disable IT8212 RAID */
197 v = pcicfgread(l->tag, 0x50);
198 pcicfgwrite(l->tag, 0x50, v & ~0x83);
199
200 /* i/o configuration, enable channels, cables, IORDY */
201 v = pcicfgread(l->tag, 0x40);
202 pcicfgwrite(l->tag, 0x40, (v & ~0xffffff) | 0x36a0f3);
203 }
204