1 /* $NetBSD: atombios_crtc.h,v 1.3 2021/12/18 23:44:58 riastradh Exp $ */ 2 3 /* 4 * Copyright 2014 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 */ 25 26 #ifndef __ATOMBIOS_CRTC_H__ 27 #define __ATOMBIOS_CRTC_H__ 28 29 void amdgpu_atombios_crtc_overscan_setup(struct drm_crtc *crtc, 30 struct drm_display_mode *mode, 31 struct drm_display_mode *adjusted_mode); 32 void amdgpu_atombios_crtc_scaler_setup(struct drm_crtc *crtc); 33 void amdgpu_atombios_crtc_lock(struct drm_crtc *crtc, int lock); 34 void amdgpu_atombios_crtc_enable(struct drm_crtc *crtc, int state); 35 void amdgpu_atombios_crtc_blank(struct drm_crtc *crtc, int state); 36 void amdgpu_atombios_crtc_powergate(struct drm_crtc *crtc, int state); 37 void amdgpu_atombios_crtc_powergate_init(struct amdgpu_device *adev); 38 void amdgpu_atombios_crtc_set_dtd_timing(struct drm_crtc *crtc, 39 struct drm_display_mode *mode); 40 void amdgpu_atombios_crtc_set_disp_eng_pll(struct amdgpu_device *adev, 41 u32 dispclk); 42 u32 amdgpu_atombios_crtc_set_dce_clock(struct amdgpu_device *adev, 43 u32 freq, u8 clk_type, u8 clk_src); 44 void amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc, 45 u32 crtc_id, 46 int pll_id, 47 u32 encoder_mode, 48 u32 encoder_id, 49 u32 clock, 50 u32 ref_div, 51 u32 fb_div, 52 u32 frac_fb_div, 53 u32 post_div, 54 int bpc, 55 bool ss_enabled, 56 struct amdgpu_atom_ss *ss); 57 int amdgpu_atombios_crtc_prepare_pll(struct drm_crtc *crtc, 58 struct drm_display_mode *mode); 59 void amdgpu_atombios_crtc_set_pll(struct drm_crtc *crtc, 60 struct drm_display_mode *mode); 61 62 #endif 63