1 /* Definitions of target machine for GNU compiler, for DEC Alpha. 2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 3 2000, 2001, 2002, 2004, 2005 Free Software Foundation, Inc. 4 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) 5 6 This file is part of GCC. 7 8 GCC is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 2, or (at your option) 11 any later version. 12 13 GCC is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with GCC; see the file COPYING. If not, write to 20 the Free Software Foundation, 51 Franklin Street, Fifth Floor, 21 Boston, MA 02110-1301, USA. */ 22 23 /* Target CPU builtins. */ 24 #define TARGET_CPU_CPP_BUILTINS() \ 25 do \ 26 { \ 27 builtin_define ("__alpha"); \ 28 builtin_define ("__alpha__"); \ 29 builtin_assert ("cpu=alpha"); \ 30 builtin_assert ("machine=alpha"); \ 31 if (TARGET_CIX) \ 32 { \ 33 builtin_define ("__alpha_cix__"); \ 34 builtin_assert ("cpu=cix"); \ 35 } \ 36 if (TARGET_FIX) \ 37 { \ 38 builtin_define ("__alpha_fix__"); \ 39 builtin_assert ("cpu=fix"); \ 40 } \ 41 if (TARGET_BWX) \ 42 { \ 43 builtin_define ("__alpha_bwx__"); \ 44 builtin_assert ("cpu=bwx"); \ 45 } \ 46 if (TARGET_MAX) \ 47 { \ 48 builtin_define ("__alpha_max__"); \ 49 builtin_assert ("cpu=max"); \ 50 } \ 51 if (alpha_cpu == PROCESSOR_EV6) \ 52 { \ 53 builtin_define ("__alpha_ev6__"); \ 54 builtin_assert ("cpu=ev6"); \ 55 } \ 56 else if (alpha_cpu == PROCESSOR_EV5) \ 57 { \ 58 builtin_define ("__alpha_ev5__"); \ 59 builtin_assert ("cpu=ev5"); \ 60 } \ 61 else /* Presumably ev4. */ \ 62 { \ 63 builtin_define ("__alpha_ev4__"); \ 64 builtin_assert ("cpu=ev4"); \ 65 } \ 66 if (TARGET_IEEE || TARGET_IEEE_WITH_INEXACT) \ 67 builtin_define ("_IEEE_FP"); \ 68 if (TARGET_IEEE_WITH_INEXACT) \ 69 builtin_define ("_IEEE_FP_INEXACT"); \ 70 if (TARGET_LONG_DOUBLE_128) \ 71 builtin_define ("__LONG_DOUBLE_128__"); \ 72 \ 73 /* Macros dependent on the C dialect. */ \ 74 SUBTARGET_LANGUAGE_CPP_BUILTINS(); \ 75 } while (0) 76 77 #ifndef SUBTARGET_LANGUAGE_CPP_BUILTINS 78 #define SUBTARGET_LANGUAGE_CPP_BUILTINS() \ 79 do \ 80 { \ 81 if (preprocessing_asm_p ()) \ 82 builtin_define_std ("LANGUAGE_ASSEMBLY"); \ 83 else if (c_dialect_cxx ()) \ 84 { \ 85 builtin_define ("__LANGUAGE_C_PLUS_PLUS"); \ 86 builtin_define ("__LANGUAGE_C_PLUS_PLUS__"); \ 87 } \ 88 else \ 89 builtin_define_std ("LANGUAGE_C"); \ 90 if (c_dialect_objc ()) \ 91 { \ 92 builtin_define ("__LANGUAGE_OBJECTIVE_C"); \ 93 builtin_define ("__LANGUAGE_OBJECTIVE_C__"); \ 94 } \ 95 } \ 96 while (0) 97 #endif 98 99 #define CPP_SPEC "%(cpp_subtarget)" 100 101 #ifndef CPP_SUBTARGET_SPEC 102 #define CPP_SUBTARGET_SPEC "" 103 #endif 104 105 #define WORD_SWITCH_TAKES_ARG(STR) \ 106 (!strcmp (STR, "rpath") || DEFAULT_WORD_SWITCH_TAKES_ARG(STR)) 107 108 /* Print subsidiary information on the compiler version in use. */ 109 #define TARGET_VERSION 110 111 /* Run-time compilation parameters selecting different hardware subsets. */ 112 113 /* Which processor to schedule for. The cpu attribute defines a list that 114 mirrors this list, so changes to alpha.md must be made at the same time. */ 115 116 enum processor_type 117 { 118 PROCESSOR_EV4, /* 2106[46]{a,} */ 119 PROCESSOR_EV5, /* 21164{a,pc,} */ 120 PROCESSOR_EV6, /* 21264 */ 121 PROCESSOR_MAX 122 }; 123 124 extern enum processor_type alpha_cpu; 125 extern enum processor_type alpha_tune; 126 127 enum alpha_trap_precision 128 { 129 ALPHA_TP_PROG, /* No precision (default). */ 130 ALPHA_TP_FUNC, /* Trap contained within originating function. */ 131 ALPHA_TP_INSN /* Instruction accuracy and code is resumption safe. */ 132 }; 133 134 enum alpha_fp_rounding_mode 135 { 136 ALPHA_FPRM_NORM, /* Normal rounding mode. */ 137 ALPHA_FPRM_MINF, /* Round towards minus-infinity. */ 138 ALPHA_FPRM_CHOP, /* Chopped rounding mode (towards 0). */ 139 ALPHA_FPRM_DYN /* Dynamic rounding mode. */ 140 }; 141 142 enum alpha_fp_trap_mode 143 { 144 ALPHA_FPTM_N, /* Normal trap mode. */ 145 ALPHA_FPTM_U, /* Underflow traps enabled. */ 146 ALPHA_FPTM_SU, /* Software completion, w/underflow traps */ 147 ALPHA_FPTM_SUI /* Software completion, w/underflow & inexact traps */ 148 }; 149 150 extern int target_flags; 151 152 extern enum alpha_trap_precision alpha_tp; 153 extern enum alpha_fp_rounding_mode alpha_fprm; 154 extern enum alpha_fp_trap_mode alpha_fptm; 155 156 /* Invert the easy way to make options work. */ 157 #define TARGET_FP (!TARGET_SOFT_FP) 158 159 /* These are for target os support and cannot be changed at runtime. */ 160 #define TARGET_ABI_WINDOWS_NT 0 161 #define TARGET_ABI_OPEN_VMS 0 162 #define TARGET_ABI_UNICOSMK 0 163 #define TARGET_ABI_OSF (!TARGET_ABI_WINDOWS_NT \ 164 && !TARGET_ABI_OPEN_VMS \ 165 && !TARGET_ABI_UNICOSMK) 166 167 #ifndef TARGET_AS_CAN_SUBTRACT_LABELS 168 #define TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS 169 #endif 170 #ifndef TARGET_AS_SLASH_BEFORE_SUFFIX 171 #define TARGET_AS_SLASH_BEFORE_SUFFIX TARGET_GAS 172 #endif 173 #ifndef TARGET_CAN_FAULT_IN_PROLOGUE 174 #define TARGET_CAN_FAULT_IN_PROLOGUE 0 175 #endif 176 #ifndef TARGET_HAS_XFLOATING_LIBS 177 #define TARGET_HAS_XFLOATING_LIBS TARGET_LONG_DOUBLE_128 178 #endif 179 #ifndef TARGET_PROFILING_NEEDS_GP 180 #define TARGET_PROFILING_NEEDS_GP 0 181 #endif 182 #ifndef TARGET_LD_BUGGY_LDGP 183 #define TARGET_LD_BUGGY_LDGP 0 184 #endif 185 #ifndef TARGET_FIXUP_EV5_PREFETCH 186 #define TARGET_FIXUP_EV5_PREFETCH 0 187 #endif 188 #ifndef HAVE_AS_TLS 189 #define HAVE_AS_TLS 0 190 #endif 191 192 #define TARGET_DEFAULT MASK_FPREGS 193 194 #ifndef TARGET_CPU_DEFAULT 195 #define TARGET_CPU_DEFAULT 0 196 #endif 197 198 #ifndef TARGET_DEFAULT_EXPLICIT_RELOCS 199 #ifdef HAVE_AS_EXPLICIT_RELOCS 200 #define TARGET_DEFAULT_EXPLICIT_RELOCS MASK_EXPLICIT_RELOCS 201 #define TARGET_SUPPORT_ARCH 1 202 #else 203 #define TARGET_DEFAULT_EXPLICIT_RELOCS 0 204 #endif 205 #endif 206 207 #ifndef TARGET_SUPPORT_ARCH 208 #define TARGET_SUPPORT_ARCH 0 209 #endif 210 211 /* Support for a compile-time default CPU, et cetera. The rules are: 212 --with-cpu is ignored if -mcpu is specified. 213 --with-tune is ignored if -mtune is specified. */ 214 #define OPTION_DEFAULT_SPECS \ 215 {"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \ 216 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" } 217 218 /* This macro defines names of additional specifications to put in the 219 specs that can be used in various specifications like CC1_SPEC. Its 220 definition is an initializer with a subgrouping for each command option. 221 222 Each subgrouping contains a string constant, that defines the 223 specification name, and a string constant that used by the GCC driver 224 program. 225 226 Do not define this macro if it does not need to do anything. */ 227 228 #ifndef SUBTARGET_EXTRA_SPECS 229 #define SUBTARGET_EXTRA_SPECS 230 #endif 231 232 #define EXTRA_SPECS \ 233 { "cpp_subtarget", CPP_SUBTARGET_SPEC }, \ 234 SUBTARGET_EXTRA_SPECS 235 236 237 /* Sometimes certain combinations of command options do not make sense 238 on a particular target machine. You can define a macro 239 `OVERRIDE_OPTIONS' to take account of this. This macro, if 240 defined, is executed once just after all the command options have 241 been parsed. 242 243 On the Alpha, it is used to translate target-option strings into 244 numeric values. */ 245 246 #define OVERRIDE_OPTIONS override_options () 247 248 249 /* Define this macro to change register usage conditional on target flags. 250 251 On the Alpha, we use this to disable the floating-point registers when 252 they don't exist. */ 253 254 #define CONDITIONAL_REGISTER_USAGE \ 255 { \ 256 int i; \ 257 if (! TARGET_FPREGS) \ 258 for (i = 32; i < 63; i++) \ 259 fixed_regs[i] = call_used_regs[i] = 1; \ 260 } 261 262 263 /* Show we can debug even without a frame pointer. */ 264 #define CAN_DEBUG_WITHOUT_FP 265 266 /* target machine storage layout */ 267 268 /* Define the size of `int'. The default is the same as the word size. */ 269 #define INT_TYPE_SIZE 32 270 271 /* Define the size of `long long'. The default is the twice the word size. */ 272 #define LONG_LONG_TYPE_SIZE 64 273 274 /* We're IEEE unless someone says to use VAX. */ 275 #define TARGET_FLOAT_FORMAT \ 276 (TARGET_FLOAT_VAX ? VAX_FLOAT_FORMAT : IEEE_FLOAT_FORMAT) 277 278 /* The two floating-point formats we support are S-floating, which is 279 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double' 280 and `long double' are T. */ 281 282 #define FLOAT_TYPE_SIZE 32 283 #define DOUBLE_TYPE_SIZE 64 284 #define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64) 285 286 /* Define this to set long double type size to use in libgcc2.c, which can 287 not depend on target_flags. */ 288 #ifdef __LONG_DOUBLE_128__ 289 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128 290 #else 291 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64 292 #endif 293 294 /* Work around target_flags dependency in ada/targtyps.c. */ 295 #define WIDEST_HARDWARE_FP_SIZE 64 296 297 #define WCHAR_TYPE "unsigned int" 298 #define WCHAR_TYPE_SIZE 32 299 300 /* Define this macro if it is advisable to hold scalars in registers 301 in a wider mode than that declared by the program. In such cases, 302 the value is constrained to be within the bounds of the declared 303 type, but kept valid in the wider mode. The signedness of the 304 extension may differ from that of the type. 305 306 For Alpha, we always store objects in a full register. 32-bit integers 307 are always sign-extended, but smaller objects retain their signedness. 308 309 Note that small vector types can get mapped onto integer modes at the 310 whim of not appearing in alpha-modes.def. We never promoted these 311 values before; don't do so now that we've trimmed the set of modes to 312 those actually implemented in the backend. */ 313 314 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ 315 if (GET_MODE_CLASS (MODE) == MODE_INT \ 316 && (TYPE == NULL || TREE_CODE (TYPE) != VECTOR_TYPE) \ 317 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ 318 { \ 319 if ((MODE) == SImode) \ 320 (UNSIGNEDP) = 0; \ 321 (MODE) = DImode; \ 322 } 323 324 /* Define this if most significant bit is lowest numbered 325 in instructions that operate on numbered bit-fields. 326 327 There are no such instructions on the Alpha, but the documentation 328 is little endian. */ 329 #define BITS_BIG_ENDIAN 0 330 331 /* Define this if most significant byte of a word is the lowest numbered. 332 This is false on the Alpha. */ 333 #define BYTES_BIG_ENDIAN 0 334 335 /* Define this if most significant word of a multiword number is lowest 336 numbered. 337 338 For Alpha we can decide arbitrarily since there are no machine instructions 339 for them. Might as well be consistent with bytes. */ 340 #define WORDS_BIG_ENDIAN 0 341 342 /* Width of a word, in units (bytes). */ 343 #define UNITS_PER_WORD 8 344 345 /* Width in bits of a pointer. 346 See also the macro `Pmode' defined below. */ 347 #define POINTER_SIZE 64 348 349 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 350 #define PARM_BOUNDARY 64 351 352 /* Boundary (in *bits*) on which stack pointer should be aligned. */ 353 #define STACK_BOUNDARY 128 354 355 /* Allocation boundary (in *bits*) for the code of a function. */ 356 #define FUNCTION_BOUNDARY 32 357 358 /* Alignment of field after `int : 0' in a structure. */ 359 #define EMPTY_FIELD_BOUNDARY 64 360 361 /* Every structure's size must be a multiple of this. */ 362 #define STRUCTURE_SIZE_BOUNDARY 8 363 364 /* A bit-field declared as `int' forces `int' alignment for the struct. */ 365 #define PCC_BITFIELD_TYPE_MATTERS 1 366 367 /* No data type wants to be aligned rounder than this. */ 368 #define BIGGEST_ALIGNMENT 128 369 370 /* For atomic access to objects, must have at least 32-bit alignment 371 unless the machine has byte operations. */ 372 #define MINIMUM_ATOMIC_ALIGNMENT ((unsigned int) (TARGET_BWX ? 8 : 32)) 373 374 /* Align all constants and variables to at least a word boundary so 375 we can pick up pieces of them faster. */ 376 #define CONSTANT_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD) 377 #define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD) 378 379 /* Make local arrays of chars word-aligned for the same reasons. */ 380 #define LOCAL_ALIGNMENT(TYPE, ALIGN) DATA_ALIGNMENT (TYPE, ALIGN) 381 382 /* Set this nonzero if move instructions will actually fail to work 383 when given unaligned data. 384 385 Since we get an error message when we do one, call them invalid. */ 386 387 #define STRICT_ALIGNMENT 1 388 389 /* Set this nonzero if unaligned move instructions are extremely slow. 390 391 On the Alpha, they trap. */ 392 393 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1 394 395 /* Standard register usage. */ 396 397 /* Number of actual hardware registers. 398 The hardware registers are assigned numbers for the compiler 399 from 0 to just below FIRST_PSEUDO_REGISTER. 400 All registers that the compiler knows about must be given numbers, 401 even those that are not normally considered general registers. 402 403 We define all 32 integer registers, even though $31 is always zero, 404 and all 32 floating-point registers, even though $f31 is also 405 always zero. We do not bother defining the FP status register and 406 there are no other registers. 407 408 Since $31 is always zero, we will use register number 31 as the 409 argument pointer. It will never appear in the generated code 410 because we will always be eliminating it in favor of the stack 411 pointer or hardware frame pointer. 412 413 Likewise, we use $f31 for the frame pointer, which will always 414 be eliminated in favor of the hardware frame pointer or the 415 stack pointer. */ 416 417 #define FIRST_PSEUDO_REGISTER 64 418 419 /* 1 for registers that have pervasive standard uses 420 and are not available for the register allocator. */ 421 422 #define FIXED_REGISTERS \ 423 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 424 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \ 425 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 426 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 } 427 428 /* 1 for registers not available across function calls. 429 These must include the FIXED_REGISTERS and also any 430 registers that can be used without being saved. 431 The latter must include the registers where values are returned 432 and the register where structure-value addresses are passed. 433 Aside from that, you can include as many other registers as you like. */ 434 #define CALL_USED_REGISTERS \ 435 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ 436 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \ 437 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \ 438 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } 439 440 /* List the order in which to allocate registers. Each register must be 441 listed once, even those in FIXED_REGISTERS. */ 442 443 #define REG_ALLOC_ORDER { \ 444 1, 2, 3, 4, 5, 6, 7, 8, /* nonsaved integer registers */ \ 445 22, 23, 24, 25, 28, /* likewise */ \ 446 0, /* likewise, but return value */ \ 447 21, 20, 19, 18, 17, 16, /* likewise, but input args */ \ 448 27, /* likewise, but OSF procedure value */ \ 449 \ 450 42, 43, 44, 45, 46, 47, /* nonsaved floating-point registers */ \ 451 54, 55, 56, 57, 58, 59, /* likewise */ \ 452 60, 61, 62, /* likewise */ \ 453 32, 33, /* likewise, but return values */ \ 454 53, 52, 51, 50, 49, 48, /* likewise, but input args */ \ 455 \ 456 9, 10, 11, 12, 13, 14, /* saved integer registers */ \ 457 26, /* return address */ \ 458 15, /* hard frame pointer */ \ 459 \ 460 34, 35, 36, 37, 38, 39, /* saved floating-point registers */ \ 461 40, 41, /* likewise */ \ 462 \ 463 29, 30, 31, 63 /* gp, sp, ap, sfp */ \ 464 } 465 466 /* Return number of consecutive hard regs needed starting at reg REGNO 467 to hold something of mode MODE. 468 This is ordinarily the length in words of a value of mode MODE 469 but can be less for certain modes in special long registers. */ 470 471 #define HARD_REGNO_NREGS(REGNO, MODE) \ 472 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 473 474 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 475 On Alpha, the integer registers can hold any mode. The floating-point 476 registers can hold 64-bit integers as well, but not smaller values. */ 477 478 #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 479 ((REGNO) >= 32 && (REGNO) <= 62 \ 480 ? (MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode \ 481 || (MODE) == SCmode || (MODE) == DCmode \ 482 : 1) 483 484 /* A C expression that is nonzero if a value of mode 485 MODE1 is accessible in mode MODE2 without copying. 486 487 This asymmetric test is true when MODE1 could be put 488 in an FP register but MODE2 could not. */ 489 490 #define MODES_TIEABLE_P(MODE1, MODE2) \ 491 (HARD_REGNO_MODE_OK (32, (MODE1)) \ 492 ? HARD_REGNO_MODE_OK (32, (MODE2)) \ 493 : 1) 494 495 /* Specify the registers used for certain standard purposes. 496 The values of these macros are register numbers. */ 497 498 /* Alpha pc isn't overloaded on a register that the compiler knows about. */ 499 /* #define PC_REGNUM */ 500 501 /* Register to use for pushing function arguments. */ 502 #define STACK_POINTER_REGNUM 30 503 504 /* Base register for access to local variables of the function. */ 505 #define HARD_FRAME_POINTER_REGNUM 15 506 507 /* Value should be nonzero if functions must have frame pointers. 508 Zero means the frame pointer need not be set up (and parms 509 may be accessed via the stack pointer) in functions that seem suitable. 510 This is computed in `reload', in reload1.c. */ 511 #define FRAME_POINTER_REQUIRED 0 512 513 /* Base register for access to arguments of the function. */ 514 #define ARG_POINTER_REGNUM 31 515 516 /* Base register for access to local variables of function. */ 517 #define FRAME_POINTER_REGNUM 63 518 519 /* Register in which static-chain is passed to a function. 520 521 For the Alpha, this is based on an example; the calling sequence 522 doesn't seem to specify this. */ 523 #define STATIC_CHAIN_REGNUM 1 524 525 /* The register number of the register used to address a table of 526 static data addresses in memory. */ 527 #define PIC_OFFSET_TABLE_REGNUM 29 528 529 /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM' 530 is clobbered by calls. */ 531 /* ??? It is and it isn't. It's required to be valid for a given 532 function when the function returns. It isn't clobbered by 533 current_file functions. Moreover, we do not expose the ldgp 534 until after reload, so we're probably safe. */ 535 /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */ 536 537 /* Define the classes of registers for register constraints in the 538 machine description. Also define ranges of constants. 539 540 One of the classes must always be named ALL_REGS and include all hard regs. 541 If there is more than one class, another class must be named NO_REGS 542 and contain no registers. 543 544 The name GENERAL_REGS must be the name of a class (or an alias for 545 another name such as ALL_REGS). This is the class of registers 546 that is allowed by "g" or "r" in a register constraint. 547 Also, registers outside this class are allocated only when 548 instructions express preferences for them. 549 550 The classes must be numbered in nondecreasing order; that is, 551 a larger-numbered class must never be contained completely 552 in a smaller-numbered class. 553 554 For any two classes, it is very desirable that there be another 555 class that represents their union. */ 556 557 enum reg_class { 558 NO_REGS, R0_REG, R24_REG, R25_REG, R27_REG, 559 GENERAL_REGS, FLOAT_REGS, ALL_REGS, 560 LIM_REG_CLASSES 561 }; 562 563 #define N_REG_CLASSES (int) LIM_REG_CLASSES 564 565 /* Give names of register classes as strings for dump file. */ 566 567 #define REG_CLASS_NAMES \ 568 {"NO_REGS", "R0_REG", "R24_REG", "R25_REG", "R27_REG", \ 569 "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" } 570 571 /* Define which registers fit in which classes. 572 This is an initializer for a vector of HARD_REG_SET 573 of length N_REG_CLASSES. */ 574 575 #define REG_CLASS_CONTENTS \ 576 { {0x00000000, 0x00000000}, /* NO_REGS */ \ 577 {0x00000001, 0x00000000}, /* R0_REG */ \ 578 {0x01000000, 0x00000000}, /* R24_REG */ \ 579 {0x02000000, 0x00000000}, /* R25_REG */ \ 580 {0x08000000, 0x00000000}, /* R27_REG */ \ 581 {0xffffffff, 0x80000000}, /* GENERAL_REGS */ \ 582 {0x00000000, 0x7fffffff}, /* FLOAT_REGS */ \ 583 {0xffffffff, 0xffffffff} } 584 585 /* The same information, inverted: 586 Return the class number of the smallest class containing 587 reg number REGNO. This could be a conditional expression 588 or could index an array. */ 589 590 #define REGNO_REG_CLASS(REGNO) \ 591 ((REGNO) == 0 ? R0_REG \ 592 : (REGNO) == 24 ? R24_REG \ 593 : (REGNO) == 25 ? R25_REG \ 594 : (REGNO) == 27 ? R27_REG \ 595 : (REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS \ 596 : GENERAL_REGS) 597 598 /* The class value for index registers, and the one for base regs. */ 599 #define INDEX_REG_CLASS NO_REGS 600 #define BASE_REG_CLASS GENERAL_REGS 601 602 /* Get reg_class from a letter such as appears in the machine description. */ 603 604 #define REG_CLASS_FROM_LETTER(C) \ 605 ((C) == 'a' ? R24_REG \ 606 : (C) == 'b' ? R25_REG \ 607 : (C) == 'c' ? R27_REG \ 608 : (C) == 'f' ? FLOAT_REGS \ 609 : (C) == 'v' ? R0_REG \ 610 : NO_REGS) 611 612 /* Define this macro to change register usage conditional on target flags. */ 613 /* #define CONDITIONAL_REGISTER_USAGE */ 614 615 /* The letters I, J, K, L, M, N, O, and P in a register constraint string 616 can be used to stand for particular ranges of immediate operands. 617 This macro defines what the ranges are. 618 C is the letter, and VALUE is a constant value. 619 Return 1 if VALUE is in the range specified by C. 620 621 For Alpha: 622 `I' is used for the range of constants most insns can contain. 623 `J' is the constant zero. 624 `K' is used for the constant in an LDA insn. 625 `L' is used for the constant in a LDAH insn. 626 `M' is used for the constants that can be AND'ed with using a ZAP insn. 627 `N' is used for complemented 8-bit constants. 628 `O' is used for negated 8-bit constants. 629 `P' is used for the constants 1, 2 and 3. */ 630 631 #define CONST_OK_FOR_LETTER_P alpha_const_ok_for_letter_p 632 633 /* Similar, but for floating or large integer constants, and defining letters 634 G and H. Here VALUE is the CONST_DOUBLE rtx itself. 635 636 For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE 637 that is the operand of a ZAP insn. */ 638 639 #define CONST_DOUBLE_OK_FOR_LETTER_P alpha_const_double_ok_for_letter_p 640 641 /* Optional extra constraints for this machine. 642 643 For the Alpha, `Q' means that this is a memory operand but not a 644 reference to an unaligned location. 645 646 `R' is a SYMBOL_REF that has SYMBOL_REF_FLAG set or is the current 647 function. 648 649 'S' is a 6-bit constant (valid for a shift insn). 650 651 'T' is a HIGH. 652 653 'U' is a symbolic operand. 654 655 'W' is a vector zero. */ 656 657 #define EXTRA_CONSTRAINT alpha_extra_constraint 658 659 /* Given an rtx X being reloaded into a reg required to be 660 in class CLASS, return the class of reg to actually use. 661 In general this is just CLASS; but on some machines 662 in some cases it is preferable to use a more restrictive class. */ 663 664 #define PREFERRED_RELOAD_CLASS alpha_preferred_reload_class 665 666 /* Loading and storing HImode or QImode values to and from memory 667 usually requires a scratch register. The exceptions are loading 668 QImode and HImode from an aligned address to a general register 669 unless byte instructions are permitted. 670 We also cannot load an unaligned address or a paradoxical SUBREG into an 671 FP register. */ 672 673 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \ 674 alpha_secondary_reload_class((CLASS), (MODE), (IN), 1) 675 676 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \ 677 alpha_secondary_reload_class((CLASS), (MODE), (OUT), 0) 678 679 /* If we are copying between general and FP registers, we need a memory 680 location unless the FIX extension is available. */ 681 682 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \ 683 (! TARGET_FIX && (((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \ 684 || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS))) 685 686 /* Specify the mode to be used for memory when a secondary memory 687 location is needed. If MODE is floating-point, use it. Otherwise, 688 widen to a word like the default. This is needed because we always 689 store integers in FP registers in quadword format. This whole 690 area is very tricky! */ 691 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \ 692 (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \ 693 : GET_MODE_SIZE (MODE) >= 4 ? (MODE) \ 694 : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0)) 695 696 /* Return the maximum number of consecutive registers 697 needed to represent mode MODE in a register of class CLASS. */ 698 699 #define CLASS_MAX_NREGS(CLASS, MODE) \ 700 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 701 702 /* Return the class of registers that cannot change mode from FROM to TO. */ 703 704 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ 705 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ 706 ? reg_classes_intersect_p (FLOAT_REGS, CLASS) : 0) 707 708 /* Define the cost of moving between registers of various classes. Moving 709 between FLOAT_REGS and anything else except float regs is expensive. 710 In fact, we make it quite expensive because we really don't want to 711 do these moves unless it is clearly worth it. Optimizations may 712 reduce the impact of not being able to allocate a pseudo to a 713 hard register. */ 714 715 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ 716 (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 \ 717 : TARGET_FIX ? ((CLASS1) == FLOAT_REGS ? 6 : 8) \ 718 : 4+2*alpha_memory_latency) 719 720 /* A C expressions returning the cost of moving data of MODE from a register to 721 or from memory. 722 723 On the Alpha, bump this up a bit. */ 724 725 extern int alpha_memory_latency; 726 #define MEMORY_MOVE_COST(MODE,CLASS,IN) (2*alpha_memory_latency) 727 728 /* Provide the cost of a branch. Exact meaning under development. */ 729 #define BRANCH_COST 5 730 731 /* Stack layout; function entry, exit and calling. */ 732 733 /* Define this if pushing a word on the stack 734 makes the stack pointer a smaller address. */ 735 #define STACK_GROWS_DOWNWARD 736 737 /* Define this to nonzero if the nominal address of the stack frame 738 is at the high-address end of the local variables; 739 that is, each additional local variable allocated 740 goes at a more negative offset in the frame. */ 741 #define FRAME_GROWS_DOWNWARD 1 742 743 /* Offset within stack frame to start allocating local variables at. 744 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 745 first local allocated. Otherwise, it is the offset to the BEGINNING 746 of the first local allocated. */ 747 748 #define STARTING_FRAME_OFFSET 0 749 750 /* If we generate an insn to push BYTES bytes, 751 this says how many the stack pointer really advances by. 752 On Alpha, don't define this because there are no push insns. */ 753 /* #define PUSH_ROUNDING(BYTES) */ 754 755 /* Define this to be nonzero if stack checking is built into the ABI. */ 756 #define STACK_CHECK_BUILTIN 1 757 758 /* Define this if the maximum size of all the outgoing args is to be 759 accumulated and pushed during the prologue. The amount can be 760 found in the variable current_function_outgoing_args_size. */ 761 #define ACCUMULATE_OUTGOING_ARGS 1 762 763 /* Offset of first parameter from the argument pointer register value. */ 764 765 #define FIRST_PARM_OFFSET(FNDECL) 0 766 767 /* Definitions for register eliminations. 768 769 We have two registers that can be eliminated on the Alpha. First, the 770 frame pointer register can often be eliminated in favor of the stack 771 pointer register. Secondly, the argument pointer register can always be 772 eliminated; it is replaced with either the stack or frame pointer. */ 773 774 /* This is an array of structures. Each structure initializes one pair 775 of eliminable registers. The "from" register number is given first, 776 followed by "to". Eliminations of the same "from" register are listed 777 in order of preference. */ 778 779 #define ELIMINABLE_REGS \ 780 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 781 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ 782 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 783 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} 784 785 /* Given FROM and TO register numbers, say whether this elimination is allowed. 786 Frame pointer elimination is automatically handled. 787 788 All eliminations are valid since the cases where FP can't be 789 eliminated are already handled. */ 790 791 #define CAN_ELIMINATE(FROM, TO) 1 792 793 /* Round up to a multiple of 16 bytes. */ 794 #define ALPHA_ROUND(X) (((X) + 15) & ~ 15) 795 796 /* Define the offset between two registers, one to be eliminated, and the other 797 its replacement, at the start of a routine. */ 798 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 799 ((OFFSET) = alpha_initial_elimination_offset(FROM, TO)) 800 801 /* Define this if stack space is still allocated for a parameter passed 802 in a register. */ 803 /* #define REG_PARM_STACK_SPACE */ 804 805 /* Value is the number of bytes of arguments automatically 806 popped when returning from a subroutine call. 807 FUNDECL is the declaration node of the function (as a tree), 808 FUNTYPE is the data type of the function (as a tree), 809 or for a library call it is an identifier node for the subroutine name. 810 SIZE is the number of bytes of arguments passed on the stack. */ 811 812 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 813 814 /* Define how to find the value returned by a function. 815 VALTYPE is the data type of the value (as a tree). 816 If the precise function being called is known, FUNC is its FUNCTION_DECL; 817 otherwise, FUNC is 0. 818 819 On Alpha the value is found in $0 for integer functions and 820 $f0 for floating-point functions. */ 821 822 #define FUNCTION_VALUE(VALTYPE, FUNC) \ 823 function_value (VALTYPE, FUNC, VOIDmode) 824 825 /* Define how to find the value returned by a library function 826 assuming the value has mode MODE. */ 827 828 #define LIBCALL_VALUE(MODE) \ 829 function_value (NULL, NULL, MODE) 830 831 /* 1 if N is a possible register number for a function value 832 as seen by the caller. */ 833 834 #define FUNCTION_VALUE_REGNO_P(N) \ 835 ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33) 836 837 /* 1 if N is a possible register number for function argument passing. 838 On Alpha, these are $16-$21 and $f16-$f21. */ 839 840 #define FUNCTION_ARG_REGNO_P(N) \ 841 (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32)) 842 843 /* Define a data type for recording info about an argument list 844 during the scan of that argument list. This data type should 845 hold all necessary information about the function itself 846 and about the args processed so far, enough to enable macros 847 such as FUNCTION_ARG to determine where the next arg should go. 848 849 On Alpha, this is a single integer, which is a number of words 850 of arguments scanned so far. 851 Thus 6 or more means all following args should go on the stack. */ 852 853 #define CUMULATIVE_ARGS int 854 855 /* Initialize a variable CUM of type CUMULATIVE_ARGS 856 for a call to a function whose data type is FNTYPE. 857 For a library call, FNTYPE is 0. */ 858 859 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ 860 (CUM) = 0 861 862 /* Define intermediate macro to compute the size (in registers) of an argument 863 for the Alpha. */ 864 865 #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \ 866 ((MODE) == TFmode || (MODE) == TCmode ? 1 \ 867 : (((MODE) == BLKmode ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \ 868 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) 869 870 /* Update the data in CUM to advance over an argument 871 of mode MODE and data type TYPE. 872 (TYPE is null for libcalls where that information may not be available.) */ 873 874 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 875 ((CUM) += \ 876 (targetm.calls.must_pass_in_stack (MODE, TYPE)) \ 877 ? 6 : ALPHA_ARG_SIZE (MODE, TYPE, NAMED)) 878 879 /* Determine where to put an argument to a function. 880 Value is zero to push the argument on the stack, 881 or a hard register in which to store the argument. 882 883 MODE is the argument's machine mode. 884 TYPE is the data type of the argument (as a tree). 885 This is null for libcalls where that information may 886 not be available. 887 CUM is a variable of type CUMULATIVE_ARGS which gives info about 888 the preceding args and about the function being called. 889 NAMED is nonzero if this argument is a named parameter 890 (otherwise it is an extra parameter matching an ellipsis). 891 892 On Alpha the first 6 words of args are normally in registers 893 and the rest are pushed. */ 894 895 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 896 function_arg((CUM), (MODE), (TYPE), (NAMED)) 897 898 /* Try to output insns to set TARGET equal to the constant C if it can be 899 done in less than N insns. Do all computations in MODE. Returns the place 900 where the output has been placed if it can be done and the insns have been 901 emitted. If it would take more than N insns, zero is returned and no 902 insns and emitted. */ 903 904 /* Define the information needed to generate branch and scc insns. This is 905 stored from the compare operation. Note that we can't use "rtx" here 906 since it hasn't been defined! */ 907 908 struct alpha_compare 909 { 910 struct rtx_def *op0, *op1; 911 int fp_p; 912 }; 913 914 extern struct alpha_compare alpha_compare; 915 916 /* Make (or fake) .linkage entry for function call. 917 IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */ 918 919 /* This macro defines the start of an assembly comment. */ 920 921 #define ASM_COMMENT_START " #" 922 923 /* This macro produces the initial definition of a function. */ 924 925 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ 926 alpha_start_function(FILE,NAME,DECL); 927 928 /* This macro closes up a function definition for the assembler. */ 929 930 #define ASM_DECLARE_FUNCTION_SIZE(FILE,NAME,DECL) \ 931 alpha_end_function(FILE,NAME,DECL) 932 933 /* Output any profiling code before the prologue. */ 934 935 #define PROFILE_BEFORE_PROLOGUE 1 936 937 /* Never use profile counters. */ 938 939 #define NO_PROFILE_COUNTERS 1 940 941 /* Output assembler code to FILE to increment profiler label # LABELNO 942 for profiling a function entry. Under OSF/1, profiling is enabled 943 by simply passing -pg to the assembler and linker. */ 944 945 #define FUNCTION_PROFILER(FILE, LABELNO) 946 947 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 948 the stack pointer does not matter. The value is tested only in 949 functions that have frame pointers. 950 No definition is equivalent to always zero. */ 951 952 #define EXIT_IGNORE_STACK 1 953 954 /* Define registers used by the epilogue and return instruction. */ 955 956 #define EPILOGUE_USES(REGNO) ((REGNO) == 26) 957 958 /* Output assembler code for a block containing the constant parts 959 of a trampoline, leaving space for the variable parts. 960 961 The trampoline should set the static chain pointer to value placed 962 into the trampoline and should branch to the specified routine. 963 Note that $27 has been set to the address of the trampoline, so we can 964 use it for addressability of the two data items. */ 965 966 #define TRAMPOLINE_TEMPLATE(FILE) \ 967 do { \ 968 fprintf (FILE, "\tldq $1,24($27)\n"); \ 969 fprintf (FILE, "\tldq $27,16($27)\n"); \ 970 fprintf (FILE, "\tjmp $31,($27),0\n"); \ 971 fprintf (FILE, "\tnop\n"); \ 972 fprintf (FILE, "\t.quad 0,0\n"); \ 973 } while (0) 974 975 /* Section in which to place the trampoline. On Alpha, instructions 976 may only be placed in a text segment. */ 977 978 #define TRAMPOLINE_SECTION text_section 979 980 /* Length in units of the trampoline for entering a nested function. */ 981 982 #define TRAMPOLINE_SIZE 32 983 984 /* The alignment of a trampoline, in bits. */ 985 986 #define TRAMPOLINE_ALIGNMENT 64 987 988 /* Emit RTL insns to initialize the variable parts of a trampoline. 989 FNADDR is an RTX for the address of the function's pure code. 990 CXT is an RTX for the static chain value for the function. */ 991 992 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 993 alpha_initialize_trampoline (TRAMP, FNADDR, CXT, 16, 24, 8) 994 995 /* A C expression whose value is RTL representing the value of the return 996 address for the frame COUNT steps up from the current frame. 997 FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of 998 the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME is defined. */ 999 1000 #define RETURN_ADDR_RTX alpha_return_addr 1001 1002 /* Before the prologue, RA lives in $26. */ 1003 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26) 1004 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26) 1005 #define DWARF_ALT_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (64) 1006 #define DWARF_ZERO_REG 31 1007 1008 /* Describe how we implement __builtin_eh_return. */ 1009 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 16 : INVALID_REGNUM) 1010 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 28) 1011 #define EH_RETURN_HANDLER_RTX \ 1012 gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \ 1013 current_function_outgoing_args_size)) 1014 1015 /* Addressing modes, and classification of registers for them. */ 1016 1017 /* Macros to check register numbers against specific register classes. */ 1018 1019 /* These assume that REGNO is a hard or pseudo reg number. 1020 They give nonzero only if REGNO is a hard reg of the suitable class 1021 or a pseudo reg currently allocated to a suitable hard reg. 1022 Since they use reg_renumber, they are safe only once reg_renumber 1023 has been allocated, which happens in local-alloc.c. */ 1024 1025 #define REGNO_OK_FOR_INDEX_P(REGNO) 0 1026 #define REGNO_OK_FOR_BASE_P(REGNO) \ 1027 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \ 1028 || (REGNO) == 63 || reg_renumber[REGNO] == 63) 1029 1030 /* Maximum number of registers that can appear in a valid memory address. */ 1031 #define MAX_REGS_PER_ADDRESS 1 1032 1033 /* Recognize any constant value that is a valid address. For the Alpha, 1034 there are only constants none since we want to use LDA to load any 1035 symbolic addresses into registers. */ 1036 1037 #define CONSTANT_ADDRESS_P(X) \ 1038 (GET_CODE (X) == CONST_INT \ 1039 && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000) 1040 1041 /* Include all constant integers and constant doubles, but not 1042 floating-point, except for floating-point zero. */ 1043 1044 #define LEGITIMATE_CONSTANT_P alpha_legitimate_constant_p 1045 1046 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 1047 and check its validity for a certain class. 1048 We have two alternate definitions for each of them. 1049 The usual definition accepts all pseudo regs; the other rejects 1050 them unless they have been allocated suitable hard regs. 1051 The symbol REG_OK_STRICT causes the latter definition to be used. 1052 1053 Most source files want to accept pseudo regs in the hope that 1054 they will get allocated to the class that the insn wants them to be in. 1055 Source files for reload pass need to be strict. 1056 After reload, it makes no difference, since pseudo regs have 1057 been eliminated by then. */ 1058 1059 /* Nonzero if X is a hard reg that can be used as an index 1060 or if it is a pseudo reg. */ 1061 #define REG_OK_FOR_INDEX_P(X) 0 1062 1063 /* Nonzero if X is a hard reg that can be used as a base reg 1064 or if it is a pseudo reg. */ 1065 #define NONSTRICT_REG_OK_FOR_BASE_P(X) \ 1066 (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER) 1067 1068 /* ??? Nonzero if X is the frame pointer, or some virtual register 1069 that may eliminate to the frame pointer. These will be allowed to 1070 have offsets greater than 32K. This is done because register 1071 elimination offsets will change the hi/lo split, and if we split 1072 before reload, we will require additional instructions. */ 1073 #define NONSTRICT_REG_OK_FP_BASE_P(X) \ 1074 (REGNO (X) == 31 || REGNO (X) == 63 \ 1075 || (REGNO (X) >= FIRST_PSEUDO_REGISTER \ 1076 && REGNO (X) < LAST_VIRTUAL_REGISTER)) 1077 1078 /* Nonzero if X is a hard reg that can be used as a base reg. */ 1079 #define STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 1080 1081 #ifdef REG_OK_STRICT 1082 #define REG_OK_FOR_BASE_P(X) STRICT_REG_OK_FOR_BASE_P (X) 1083 #else 1084 #define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P (X) 1085 #endif 1086 1087 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a 1088 valid memory address for an instruction. */ 1089 1090 #ifdef REG_OK_STRICT 1091 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \ 1092 do { \ 1093 if (alpha_legitimate_address_p (MODE, X, 1)) \ 1094 goto WIN; \ 1095 } while (0) 1096 #else 1097 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \ 1098 do { \ 1099 if (alpha_legitimate_address_p (MODE, X, 0)) \ 1100 goto WIN; \ 1101 } while (0) 1102 #endif 1103 1104 /* Try machine-dependent ways of modifying an illegitimate address 1105 to be legitimate. If we find one, return the new, valid address. 1106 This macro is used in only one place: `memory_address' in explow.c. */ 1107 1108 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ 1109 do { \ 1110 rtx new_x = alpha_legitimize_address (X, NULL_RTX, MODE); \ 1111 if (new_x) \ 1112 { \ 1113 X = new_x; \ 1114 goto WIN; \ 1115 } \ 1116 } while (0) 1117 1118 /* Try a machine-dependent way of reloading an illegitimate address 1119 operand. If we find one, push the reload and jump to WIN. This 1120 macro is used in only one place: `find_reloads_address' in reload.c. */ 1121 1122 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \ 1123 do { \ 1124 rtx new_x = alpha_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \ 1125 if (new_x) \ 1126 { \ 1127 X = new_x; \ 1128 goto WIN; \ 1129 } \ 1130 } while (0) 1131 1132 /* Go to LABEL if ADDR (a legitimate address expression) 1133 has an effect that depends on the machine mode it is used for. 1134 On the Alpha this is true only for the unaligned modes. We can 1135 simplify this test since we know that the address must be valid. */ 1136 1137 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ 1138 { if (GET_CODE (ADDR) == AND) goto LABEL; } 1139 1140 /* Specify the machine mode that this machine uses 1141 for the index in the tablejump instruction. */ 1142 #define CASE_VECTOR_MODE SImode 1143 1144 /* Define as C expression which evaluates to nonzero if the tablejump 1145 instruction expects the table to contain offsets from the address of the 1146 table. 1147 1148 Do not define this if the table should contain absolute addresses. 1149 On the Alpha, the table is really GP-relative, not relative to the PC 1150 of the table, but we pretend that it is PC-relative; this should be OK, 1151 but we should try to find some better way sometime. */ 1152 #define CASE_VECTOR_PC_RELATIVE 1 1153 1154 /* Define this as 1 if `char' should by default be signed; else as 0. */ 1155 #define DEFAULT_SIGNED_CHAR 1 1156 1157 /* Max number of bytes we can move to or from memory 1158 in one reasonably fast instruction. */ 1159 1160 #define MOVE_MAX 8 1161 1162 /* If a memory-to-memory move would take MOVE_RATIO or more simple 1163 move-instruction pairs, we will do a movmem or libcall instead. 1164 1165 Without byte/word accesses, we want no more than four instructions; 1166 with, several single byte accesses are better. */ 1167 1168 #define MOVE_RATIO (TARGET_BWX ? 7 : 2) 1169 1170 /* Largest number of bytes of an object that can be placed in a register. 1171 On the Alpha we have plenty of registers, so use TImode. */ 1172 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode) 1173 1174 /* Nonzero if access to memory by bytes is no faster than for words. 1175 Also nonzero if doing byte operations (specifically shifts) in registers 1176 is undesirable. 1177 1178 On the Alpha, we want to not use the byte operation and instead use 1179 masking operations to access fields; these will save instructions. */ 1180 1181 #define SLOW_BYTE_ACCESS 1 1182 1183 /* Define if operations between registers always perform the operation 1184 on the full register even if a narrower mode is specified. */ 1185 #define WORD_REGISTER_OPERATIONS 1186 1187 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD 1188 will either zero-extend or sign-extend. The value of this macro should 1189 be the code that says which one of the two operations is implicitly 1190 done, UNKNOWN if none. */ 1191 #define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND) 1192 1193 /* Define if loading short immediate values into registers sign extends. */ 1194 #define SHORT_IMMEDIATES_SIGN_EXTEND 1195 1196 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1197 is done just by pretending it is already truncated. */ 1198 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1199 1200 /* The CIX ctlz and cttz instructions return 64 for zero. */ 1201 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX) 1202 #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX) 1203 1204 /* Define the value returned by a floating-point comparison instruction. */ 1205 1206 #define FLOAT_STORE_FLAG_VALUE(MODE) \ 1207 REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE)) 1208 1209 /* Canonicalize a comparison from one we don't have to one we do have. */ 1210 1211 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \ 1212 do { \ 1213 if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \ 1214 && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \ 1215 { \ 1216 rtx tem = (OP0); \ 1217 (OP0) = (OP1); \ 1218 (OP1) = tem; \ 1219 (CODE) = swap_condition (CODE); \ 1220 } \ 1221 if (((CODE) == LT || (CODE) == LTU) \ 1222 && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \ 1223 { \ 1224 (CODE) = (CODE) == LT ? LE : LEU; \ 1225 (OP1) = GEN_INT (255); \ 1226 } \ 1227 } while (0) 1228 1229 /* Specify the machine mode that pointers have. 1230 After generation of rtl, the compiler makes no further distinction 1231 between pointers and any other objects of this machine mode. */ 1232 #define Pmode DImode 1233 1234 /* Mode of a function address in a call instruction (for indexing purposes). */ 1235 1236 #define FUNCTION_MODE Pmode 1237 1238 /* Define this if addresses of constant functions 1239 shouldn't be put through pseudo regs where they can be cse'd. 1240 Desirable on machines where ordinary constants are expensive 1241 but a CALL with constant address is cheap. 1242 1243 We define this on the Alpha so that gen_call and gen_call_value 1244 get to see the SYMBOL_REF (for the hint field of the jsr). It will 1245 then copy it into a register, thus actually letting the address be 1246 cse'ed. */ 1247 1248 #define NO_FUNCTION_CSE 1249 1250 /* Define this to be nonzero if shift instructions ignore all but the low-order 1251 few bits. */ 1252 #define SHIFT_COUNT_TRUNCATED 1 1253 1254 /* Control the assembler format that we output. */ 1255 1256 /* Output to assembler file text saying following lines 1257 may contain character constants, extra white space, comments, etc. */ 1258 #define ASM_APP_ON (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "") 1259 1260 /* Output to assembler file text saying following lines 1261 no longer contain unusual constructs. */ 1262 #define ASM_APP_OFF (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "") 1263 1264 #define TEXT_SECTION_ASM_OP "\t.text" 1265 1266 /* Output before read-only data. */ 1267 1268 #define READONLY_DATA_SECTION_ASM_OP "\t.rdata" 1269 1270 /* Output before writable data. */ 1271 1272 #define DATA_SECTION_ASM_OP "\t.data" 1273 1274 /* How to refer to registers in assembler output. 1275 This sequence is indexed by compiler's hard-register-number (see above). */ 1276 1277 #define REGISTER_NAMES \ 1278 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \ 1279 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \ 1280 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \ 1281 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \ 1282 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \ 1283 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \ 1284 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\ 1285 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"} 1286 1287 /* Strip name encoding when emitting labels. */ 1288 1289 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \ 1290 do { \ 1291 const char *name_ = NAME; \ 1292 if (*name_ == '@' || *name_ == '%') \ 1293 name_ += 2; \ 1294 if (*name_ == '*') \ 1295 name_++; \ 1296 else \ 1297 fputs (user_label_prefix, STREAM); \ 1298 fputs (name_, STREAM); \ 1299 } while (0) 1300 1301 /* Globalizing directive for a label. */ 1302 #define GLOBAL_ASM_OP "\t.globl " 1303 1304 /* The prefix to add to user-visible assembler symbols. */ 1305 1306 #define USER_LABEL_PREFIX "" 1307 1308 /* This is how to output a label for a jump table. Arguments are the same as 1309 for (*targetm.asm_out.internal_label), except the insn for the jump table is 1310 passed. */ 1311 1312 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ 1313 { ASM_OUTPUT_ALIGN (FILE, 2); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); } 1314 1315 /* This is how to store into the string LABEL 1316 the symbol_ref name of an internal numbered label where 1317 PREFIX is the class of label and NUM is the number within the class. 1318 This is suitable for output with `assemble_name'. */ 1319 1320 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 1321 sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM)) 1322 1323 /* We use the default ASCII-output routine, except that we don't write more 1324 than 50 characters since the assembler doesn't support very long lines. */ 1325 1326 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \ 1327 do { \ 1328 FILE *_hide_asm_out_file = (MYFILE); \ 1329 const unsigned char *_hide_p = (const unsigned char *) (MYSTRING); \ 1330 int _hide_thissize = (MYLENGTH); \ 1331 int _size_so_far = 0; \ 1332 { \ 1333 FILE *asm_out_file = _hide_asm_out_file; \ 1334 const unsigned char *p = _hide_p; \ 1335 int thissize = _hide_thissize; \ 1336 int i; \ 1337 fprintf (asm_out_file, "\t.ascii \""); \ 1338 \ 1339 for (i = 0; i < thissize; i++) \ 1340 { \ 1341 register int c = p[i]; \ 1342 \ 1343 if (_size_so_far ++ > 50 && i < thissize - 4) \ 1344 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \ 1345 \ 1346 if (c == '\"' || c == '\\') \ 1347 putc ('\\', asm_out_file); \ 1348 if (c >= ' ' && c < 0177) \ 1349 putc (c, asm_out_file); \ 1350 else \ 1351 { \ 1352 fprintf (asm_out_file, "\\%o", c); \ 1353 /* After an octal-escape, if a digit follows, \ 1354 terminate one string constant and start another. \ 1355 The VAX assembler fails to stop reading the escape \ 1356 after three digits, so this is the only way we \ 1357 can get it to parse the data properly. */ \ 1358 if (i < thissize - 1 && ISDIGIT (p[i + 1])) \ 1359 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \ 1360 } \ 1361 } \ 1362 fprintf (asm_out_file, "\"\n"); \ 1363 } \ 1364 } \ 1365 while (0) 1366 1367 /* This is how to output an element of a case-vector that is relative. */ 1368 1369 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 1370 fprintf (FILE, "\t.%s $L%d\n", TARGET_ABI_WINDOWS_NT ? "long" : "gprel32", \ 1371 (VALUE)) 1372 1373 /* This is how to output an assembler line 1374 that says to advance the location counter 1375 to a multiple of 2**LOG bytes. */ 1376 1377 #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 1378 if ((LOG) != 0) \ 1379 fprintf (FILE, "\t.align %d\n", LOG); 1380 1381 /* This is how to advance the location counter by SIZE bytes. */ 1382 1383 #define ASM_OUTPUT_SKIP(FILE,SIZE) \ 1384 fprintf (FILE, "\t.space "HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)) 1385 1386 /* This says how to output an assembler line 1387 to define a global common symbol. */ 1388 1389 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 1390 ( fputs ("\t.comm ", (FILE)), \ 1391 assemble_name ((FILE), (NAME)), \ 1392 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))) 1393 1394 /* This says how to output an assembler line 1395 to define a local common symbol. */ 1396 1397 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ 1398 ( fputs ("\t.lcomm ", (FILE)), \ 1399 assemble_name ((FILE), (NAME)), \ 1400 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))) 1401 1402 1403 /* Print operand X (an rtx) in assembler syntax to file FILE. 1404 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 1405 For `%' followed by punctuation, CODE is the punctuation and X is null. */ 1406 1407 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) 1408 1409 /* Determine which codes are valid without a following integer. These must 1410 not be alphabetic. 1411 1412 ~ Generates the name of the current function. 1413 1414 / Generates the instruction suffix. The TRAP_SUFFIX and ROUND_SUFFIX 1415 attributes are examined to determine what is appropriate. 1416 1417 , Generates single precision suffix for floating point 1418 instructions (s for IEEE, f for VAX) 1419 1420 - Generates double precision suffix for floating point 1421 instructions (t for IEEE, g for VAX) 1422 1423 + Generates a nop instruction after a noreturn call at the very end 1424 of the function 1425 */ 1426 1427 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 1428 ((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~' \ 1429 || (CODE) == '#' || (CODE) == '*' || (CODE) == '&' || (CODE) == '+') 1430 1431 /* Print a memory address as an operand to reference that memory location. */ 1432 1433 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 1434 print_operand_address((FILE), (ADDR)) 1435 1436 /* Implement `va_start' for varargs and stdarg. */ 1437 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \ 1438 alpha_va_start (valist, nextarg) 1439 1440 /* Tell collect that the object format is ECOFF. */ 1441 #define OBJECT_FORMAT_COFF 1442 #define EXTENDED_COFF 1443 1444 /* If we use NM, pass -g to it so it only lists globals. */ 1445 #define NM_FLAGS "-pg" 1446 1447 /* Definitions for debugging. */ 1448 1449 #define SDB_DEBUGGING_INFO 1 /* generate info for mips-tfile */ 1450 #define DBX_DEBUGGING_INFO 1 /* generate embedded stabs */ 1451 #define MIPS_DEBUGGING_INFO 1 /* MIPS specific debugging info */ 1452 1453 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */ 1454 #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG 1455 #endif 1456 1457 1458 /* Correct the offset of automatic variables and arguments. Note that 1459 the Alpha debug format wants all automatic variables and arguments 1460 to be in terms of two different offsets from the virtual frame pointer, 1461 which is the stack pointer before any adjustment in the function. 1462 The offset for the argument pointer is fixed for the native compiler, 1463 it is either zero (for the no arguments case) or large enough to hold 1464 all argument registers. 1465 The offset for the auto pointer is the fourth argument to the .frame 1466 directive (local_offset). 1467 To stay compatible with the native tools we use the same offsets 1468 from the virtual frame pointer and adjust the debugger arg/auto offsets 1469 accordingly. These debugger offsets are set up in output_prolog. */ 1470 1471 extern long alpha_arg_offset; 1472 extern long alpha_auto_offset; 1473 #define DEBUGGER_AUTO_OFFSET(X) \ 1474 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset) 1475 #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset) 1476 1477 /* mips-tfile doesn't understand .stabd directives. */ 1478 #define DBX_OUTPUT_SOURCE_LINE(STREAM, LINE, COUNTER) do { \ 1479 dbxout_begin_stabn_sline (LINE); \ 1480 dbxout_stab_value_internal_label ("LM", &COUNTER); \ 1481 } while (0) 1482 1483 /* We want to use MIPS-style .loc directives for SDB line numbers. */ 1484 extern int num_source_filenames; 1485 #define SDB_OUTPUT_SOURCE_LINE(STREAM, LINE) \ 1486 fprintf (STREAM, "\t.loc\t%d %d\n", num_source_filenames, LINE) 1487 1488 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \ 1489 alpha_output_filename (STREAM, NAME) 1490 1491 /* mips-tfile.c limits us to strings of one page. We must underestimate this 1492 number, because the real length runs past this up to the next 1493 continuation point. This is really a dbxout.c bug. */ 1494 #define DBX_CONTIN_LENGTH 3000 1495 1496 /* By default, turn on GDB extensions. */ 1497 #define DEFAULT_GDB_EXTENSIONS 1 1498 1499 /* Stabs-in-ECOFF can't handle dbxout_function_end(). */ 1500 #define NO_DBX_FUNCTION_END 1 1501 1502 /* If we are smuggling stabs through the ALPHA ECOFF object 1503 format, put a comment in front of the .stab<x> operation so 1504 that the ALPHA assembler does not choke. The mips-tfile program 1505 will correctly put the stab into the object file. */ 1506 1507 #define ASM_STABS_OP ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t") 1508 #define ASM_STABN_OP ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t") 1509 #define ASM_STABD_OP ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t") 1510 1511 /* Forward references to tags are allowed. */ 1512 #define SDB_ALLOW_FORWARD_REFERENCES 1513 1514 /* Unknown tags are also allowed. */ 1515 #define SDB_ALLOW_UNKNOWN_REFERENCES 1516 1517 #define PUT_SDB_DEF(a) \ 1518 do { \ 1519 fprintf (asm_out_file, "\t%s.def\t", \ 1520 (TARGET_GAS) ? "" : "#"); \ 1521 ASM_OUTPUT_LABELREF (asm_out_file, a); \ 1522 fputc (';', asm_out_file); \ 1523 } while (0) 1524 1525 #define PUT_SDB_PLAIN_DEF(a) \ 1526 do { \ 1527 fprintf (asm_out_file, "\t%s.def\t.%s;", \ 1528 (TARGET_GAS) ? "" : "#", (a)); \ 1529 } while (0) 1530 1531 #define PUT_SDB_TYPE(a) \ 1532 do { \ 1533 fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \ 1534 } while (0) 1535 1536 /* For block start and end, we create labels, so that 1537 later we can figure out where the correct offset is. 1538 The normal .ent/.end serve well enough for functions, 1539 so those are just commented out. */ 1540 1541 extern int sdb_label_count; /* block start/end next label # */ 1542 1543 #define PUT_SDB_BLOCK_START(LINE) \ 1544 do { \ 1545 fprintf (asm_out_file, \ 1546 "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \ 1547 sdb_label_count, \ 1548 (TARGET_GAS) ? "" : "#", \ 1549 sdb_label_count, \ 1550 (LINE)); \ 1551 sdb_label_count++; \ 1552 } while (0) 1553 1554 #define PUT_SDB_BLOCK_END(LINE) \ 1555 do { \ 1556 fprintf (asm_out_file, \ 1557 "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \ 1558 sdb_label_count, \ 1559 (TARGET_GAS) ? "" : "#", \ 1560 sdb_label_count, \ 1561 (LINE)); \ 1562 sdb_label_count++; \ 1563 } while (0) 1564 1565 #define PUT_SDB_FUNCTION_START(LINE) 1566 1567 #define PUT_SDB_FUNCTION_END(LINE) 1568 1569 #define PUT_SDB_EPILOGUE_END(NAME) ((void)(NAME)) 1570 1571 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for 1572 mips-tdump.c to print them out. 1573 1574 These must match the corresponding definitions in gdb/mipsread.c. 1575 Unfortunately, gcc and gdb do not currently share any directories. */ 1576 1577 #define CODE_MASK 0x8F300 1578 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK) 1579 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK) 1580 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK) 1581 1582 /* Override some mips-tfile definitions. */ 1583 1584 #define SHASH_SIZE 511 1585 #define THASH_SIZE 55 1586 1587 /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */ 1588 1589 #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7) 1590 1591 /* The system headers under Alpha systems are generally C++-aware. */ 1592 #define NO_IMPLICIT_EXTERN_C 1593