1;; Predicate definitions for HP PA-RISC. 2;; Copyright (C) 2005 Free Software Foundation, Inc. 3;; 4;; This file is part of GCC. 5;; 6;; GCC is free software; you can redistribute it and/or modify 7;; it under the terms of the GNU General Public License as published by 8;; the Free Software Foundation; either version 2, or (at your option) 9;; any later version. 10;; 11;; GCC is distributed in the hope that it will be useful, 12;; but WITHOUT ANY WARRANTY; without even the implied warranty of 13;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14;; GNU General Public License for more details. 15;; 16;; You should have received a copy of the GNU General Public License 17;; along with GCC; see the file COPYING. If not, write to 18;; the Free Software Foundation, 51 Franklin Street, Fifth Floor, 19;; Boston, MA 02110-1301, USA. 20 21;; Return nonzero only if OP is a register of mode MODE, or 22;; CONST0_RTX. 23 24(define_predicate "reg_or_0_operand" 25 (match_code "subreg,reg,const_int,const_double") 26{ 27 return (op == CONST0_RTX (mode) || register_operand (op, mode)); 28}) 29 30;; Return nonzero if OP is suitable for use in a call to a named 31;; function. 32;; 33;; For 2.5 try to eliminate either call_operand_address or 34;; function_label_operand, they perform very similar functions. 35 36(define_predicate "call_operand_address" 37 (match_code "label_ref,symbol_ref,const_int,const_double,const,high") 38{ 39 return (GET_MODE (op) == word_mode 40 && CONSTANT_P (op) && ! TARGET_PORTABLE_RUNTIME); 41}) 42 43;; Return 1 iff OP is an indexed memory operand. 44 45(define_predicate "indexed_memory_operand" 46 (match_code "subreg,mem") 47{ 48 if (GET_MODE (op) != mode) 49 return 0; 50 51 /* Before reload, a (SUBREG (MEM...)) forces reloading into a register. */ 52 if (reload_completed && GET_CODE (op) == SUBREG) 53 op = SUBREG_REG (op); 54 55 if (GET_CODE (op) != MEM || symbolic_memory_operand (op, mode)) 56 return 0; 57 58 op = XEXP (op, 0); 59 60 return (memory_address_p (mode, op) && IS_INDEX_ADDR_P (op)); 61}) 62 63;; Return 1 iff OP is a symbolic operand. 64;; Note: an inline copy of this code is present in pa_secondary_reload. 65 66(define_predicate "symbolic_operand" 67 (match_code "symbol_ref,label_ref,const") 68{ 69 switch (GET_CODE (op)) 70 { 71 case SYMBOL_REF: 72 return !SYMBOL_REF_TLS_MODEL (op); 73 case LABEL_REF: 74 return 1; 75 case CONST: 76 op = XEXP (op, 0); 77 return (((GET_CODE (XEXP (op, 0)) == SYMBOL_REF 78 && !SYMBOL_REF_TLS_MODEL (XEXP (op, 0))) 79 || GET_CODE (XEXP (op, 0)) == LABEL_REF) 80 && GET_CODE (XEXP (op, 1)) == CONST_INT); 81 default: 82 return 0; 83 } 84}) 85 86;; Return truth value of statement that OP is a symbolic memory 87;; operand of mode MODE. 88 89(define_predicate "symbolic_memory_operand" 90 (match_code "subreg,mem") 91{ 92 if (GET_CODE (op) == SUBREG) 93 op = SUBREG_REG (op); 94 if (GET_CODE (op) != MEM) 95 return 0; 96 op = XEXP (op, 0); 97 return ((GET_CODE (op) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (op)) 98 || GET_CODE (op) == CONST || GET_CODE (op) == HIGH 99 || GET_CODE (op) == LABEL_REF); 100}) 101 102;; Return true if OP is a symbolic operand for the TLS Global Dynamic model. 103(define_predicate "tgd_symbolic_operand" 104 (and (match_code "symbol_ref") 105 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_GLOBAL_DYNAMIC"))) 106 107;; Return true if OP is a symbolic operand for the TLS Local Dynamic model. 108(define_predicate "tld_symbolic_operand" 109 (and (match_code "symbol_ref") 110 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_DYNAMIC"))) 111 112;; Return true if OP is a symbolic operand for the TLS Initial Exec model. 113(define_predicate "tie_symbolic_operand" 114 (and (match_code "symbol_ref") 115 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC"))) 116 117;; Return true if OP is a symbolic operand for the TLS Local Exec model. 118(define_predicate "tle_symbolic_operand" 119 (and (match_code "symbol_ref") 120 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC"))) 121 122 123;; Return 1 if the operand is a register operand or a non-symbolic 124;; memory operand after reload. This predicate is used for branch 125;; patterns that internally handle register reloading. We need to 126;; accept non-symbolic memory operands after reload to ensure that the 127;; pattern is still valid if reload didn't find a hard register for 128;; the operand. 129 130(define_predicate "reg_before_reload_operand" 131 (match_code "reg,mem") 132{ 133 /* Don't accept a SUBREG since it will need a reload. */ 134 if (GET_CODE (op) == SUBREG) 135 return 0; 136 137 if (register_operand (op, mode)) 138 return 1; 139 140 if (reload_completed 141 && memory_operand (op, mode) 142 && !symbolic_memory_operand (op, mode)) 143 return 1; 144 145 return 0; 146}) 147 148;; Return 1 if the operand is either a register, zero, or a memory 149;; operand that is not symbolic. 150 151(define_predicate "reg_or_0_or_nonsymb_mem_operand" 152 (match_code "subreg,reg,mem,const_int,const_double") 153{ 154 if (register_operand (op, mode)) 155 return 1; 156 157 if (op == CONST0_RTX (mode)) 158 return 1; 159 160 if (GET_CODE (op) == SUBREG) 161 op = SUBREG_REG (op); 162 163 if (GET_CODE (op) != MEM) 164 return 0; 165 166 /* Until problems with management of the REG_POINTER flag are resolved, 167 we need to delay creating move insns with unscaled indexed addresses 168 until CSE is not expected. */ 169 if (!TARGET_NO_SPACE_REGS 170 && !cse_not_expected 171 && GET_CODE (XEXP (op, 0)) == PLUS 172 && REG_P (XEXP (XEXP (op, 0), 0)) 173 && REG_P (XEXP (XEXP (op, 0), 1))) 174 return 0; 175 176 return (!symbolic_memory_operand (op, mode) 177 && memory_address_p (mode, XEXP (op, 0))); 178}) 179 180;; Accept anything that can be used as a destination operand for a 181;; move instruction. We don't accept indexed memory operands since 182;; they are supported only for floating point stores. 183 184(define_predicate "move_dest_operand" 185 (match_code "subreg,reg,mem") 186{ 187 if (register_operand (op, mode)) 188 return 1; 189 190 if (GET_MODE (op) != mode) 191 return 0; 192 193 if (GET_CODE (op) == SUBREG) 194 op = SUBREG_REG (op); 195 196 if (GET_CODE (op) != MEM || symbolic_memory_operand (op, mode)) 197 return 0; 198 199 op = XEXP (op, 0); 200 201 return (memory_address_p (mode, op) 202 && !IS_INDEX_ADDR_P (op) 203 && !IS_LO_SUM_DLT_ADDR_P (op)); 204}) 205 206;; Accept anything that can be used as a source operand for a move 207;; instruction. 208 209(define_predicate "move_src_operand" 210 (match_code "subreg,reg,const_int,const_double,mem") 211{ 212 if (register_operand (op, mode)) 213 return 1; 214 215 if (op == CONST0_RTX (mode)) 216 return 1; 217 218 if (GET_CODE (op) == CONST_INT) 219 return cint_ok_for_move (INTVAL (op)); 220 221 if (GET_MODE (op) != mode) 222 return 0; 223 224 if (GET_CODE (op) == SUBREG) 225 op = SUBREG_REG (op); 226 227 if (GET_CODE (op) != MEM) 228 return 0; 229 230 /* Until problems with management of the REG_POINTER flag are resolved, 231 we need to delay creating move insns with unscaled indexed addresses 232 until CSE is not expected. */ 233 if (!TARGET_NO_SPACE_REGS 234 && !cse_not_expected 235 && GET_CODE (XEXP (op, 0)) == PLUS 236 && REG_P (XEXP (XEXP (op, 0), 0)) 237 && REG_P (XEXP (XEXP (op, 0), 1))) 238 return 0; 239 240 return memory_address_p (mode, XEXP (op, 0)); 241}) 242 243;; Accept anything that can be used as the source operand for a 244;; prefetch instruction with a cache-control completer. 245 246(define_predicate "prefetch_cc_operand" 247 (match_code "mem") 248{ 249 if (GET_CODE (op) != MEM) 250 return 0; 251 252 op = XEXP (op, 0); 253 254 /* We must reject virtual registers as we don't allow REG+D. */ 255 if (op == virtual_incoming_args_rtx 256 || op == virtual_stack_vars_rtx 257 || op == virtual_stack_dynamic_rtx 258 || op == virtual_outgoing_args_rtx 259 || op == virtual_cfa_rtx) 260 return 0; 261 262 if (!REG_P (op) && !IS_INDEX_ADDR_P (op)) 263 return 0; 264 265 /* Until problems with management of the REG_POINTER flag are resolved, 266 we need to delay creating prefetch insns with unscaled indexed addresses 267 until CSE is not expected. */ 268 if (!TARGET_NO_SPACE_REGS 269 && !cse_not_expected 270 && GET_CODE (op) == PLUS 271 && REG_P (XEXP (op, 0))) 272 return 0; 273 274 return memory_address_p (mode, op); 275}) 276 277;; Accept anything that can be used as the source operand for a 278;; prefetch instruction with no cache-control completer. 279 280(define_predicate "prefetch_nocc_operand" 281 (match_code "mem") 282{ 283 if (GET_CODE (op) != MEM) 284 return 0; 285 286 op = XEXP (op, 0); 287 288 /* Until problems with management of the REG_POINTER flag are resolved, 289 we need to delay creating prefetch insns with unscaled indexed addresses 290 until CSE is not expected. */ 291 if (!TARGET_NO_SPACE_REGS 292 && !cse_not_expected 293 && GET_CODE (op) == PLUS 294 && REG_P (XEXP (op, 0)) 295 && REG_P (XEXP (op, 1))) 296 return 0; 297 298 return memory_address_p (mode, op); 299}) 300 301;; Accept REG and any CONST_INT that can be moved in one instruction 302;; into a general register. 303 304(define_predicate "reg_or_cint_move_operand" 305 (match_code "subreg,reg,const_int") 306{ 307 if (register_operand (op, mode)) 308 return 1; 309 310 return (GET_CODE (op) == CONST_INT && cint_ok_for_move (INTVAL (op))); 311}) 312 313;; TODO: Add a comment here. 314 315(define_predicate "pic_label_operand" 316 (match_code "label_ref,const") 317{ 318 if (!flag_pic) 319 return 0; 320 321 switch (GET_CODE (op)) 322 { 323 case LABEL_REF: 324 return 1; 325 case CONST: 326 op = XEXP (op, 0); 327 return (GET_CODE (XEXP (op, 0)) == LABEL_REF 328 && GET_CODE (XEXP (op, 1)) == CONST_INT); 329 default: 330 return 0; 331 } 332}) 333 334;; TODO: Add a comment here. 335 336(define_predicate "fp_reg_operand" 337 (match_code "reg") 338{ 339 return reg_renumber && FP_REG_P (op); 340}) 341 342;; Return truth value of whether OP can be used as an operand in a 343;; three operand arithmetic insn that accepts registers of mode MODE 344;; or 14-bit signed integers. 345 346(define_predicate "arith_operand" 347 (match_code "subreg,reg,const_int") 348{ 349 return (register_operand (op, mode) 350 || (GET_CODE (op) == CONST_INT && INT_14_BITS (op))); 351}) 352 353;; Return truth value of whether OP can be used as an operand in a 354;; three operand arithmetic insn that accepts registers of mode MODE 355;; or 11-bit signed integers. 356 357(define_predicate "arith11_operand" 358 (match_code "subreg,reg,const_int") 359{ 360 return (register_operand (op, mode) 361 || (GET_CODE (op) == CONST_INT && INT_11_BITS (op))); 362}) 363 364;; A constant integer suitable for use in a PRE_MODIFY memory 365;; reference. 366 367(define_predicate "pre_cint_operand" 368 (match_code "const_int") 369{ 370 return (GET_CODE (op) == CONST_INT 371 && INTVAL (op) >= -0x2000 && INTVAL (op) < 0x10); 372}) 373 374;; A constant integer suitable for use in a POST_MODIFY memory 375;; reference. 376 377(define_predicate "post_cint_operand" 378 (match_code "const_int") 379{ 380 return (GET_CODE (op) == CONST_INT 381 && INTVAL (op) < 0x2000 && INTVAL (op) >= -0x10); 382}) 383 384;; TODO: Add a comment here. 385 386(define_predicate "arith_double_operand" 387 (match_code "subreg,reg,const_double") 388{ 389 return (register_operand (op, mode) 390 || (GET_CODE (op) == CONST_DOUBLE 391 && GET_MODE (op) == mode 392 && VAL_14_BITS_P (CONST_DOUBLE_LOW (op)) 393 && ((CONST_DOUBLE_HIGH (op) >= 0) 394 == ((CONST_DOUBLE_LOW (op) & 0x1000) == 0)))); 395}) 396 397;; Return truth value of whether OP is an integer which fits the range 398;; constraining immediate operands in three-address insns, or is an 399;; integer register. 400 401(define_predicate "ireg_or_int5_operand" 402 (match_code "const_int,reg") 403{ 404 return ((GET_CODE (op) == CONST_INT && INT_5_BITS (op)) 405 || (GET_CODE (op) == REG && REGNO (op) > 0 && REGNO (op) < 32)); 406}) 407 408;; Return truth value of whether OP is an integer which fits the range 409;; constraining immediate operands in three-address insns. 410 411(define_predicate "int5_operand" 412 (match_code "const_int") 413{ 414 return (GET_CODE (op) == CONST_INT && INT_5_BITS (op)); 415}) 416 417;; Return truth value of whether OP is an integer which fits the range 418;; constraining immediate operands in three-address insns. 419 420(define_predicate "uint5_operand" 421 (match_code "const_int") 422{ 423 return (GET_CODE (op) == CONST_INT && INT_U5_BITS (op)); 424}) 425 426;; Return truth value of whether OP is an integer which fits the range 427;; constraining immediate operands in three-address insns. 428 429(define_predicate "int11_operand" 430 (match_code "const_int") 431{ 432 return (GET_CODE (op) == CONST_INT && INT_11_BITS (op)); 433}) 434 435;; Return truth value of whether OP is an integer which fits the range 436;; constraining immediate operands in three-address insns. 437 438(define_predicate "uint32_operand" 439 (match_code "const_int,const_double") 440{ 441#if HOST_BITS_PER_WIDE_INT > 32 442 /* All allowed constants will fit a CONST_INT. */ 443 return (GET_CODE (op) == CONST_INT 444 && (INTVAL (op) >= 0 && INTVAL (op) < (HOST_WIDE_INT) 1 << 32)); 445#else 446 return (GET_CODE (op) == CONST_INT 447 || (GET_CODE (op) == CONST_DOUBLE 448 && CONST_DOUBLE_HIGH (op) == 0)); 449#endif 450}) 451 452;; Return truth value of whether OP is an integer which fits the range 453;; constraining immediate operands in three-address insns. 454 455(define_predicate "arith5_operand" 456 (match_code "subreg,reg,const_int") 457{ 458 return register_operand (op, mode) || int5_operand (op, mode); 459}) 460 461;; True iff depi or extru can be used to compute (reg & OP). 462 463(define_predicate "and_operand" 464 (match_code "subreg,reg,const_int") 465{ 466 return (register_operand (op, mode) 467 || (GET_CODE (op) == CONST_INT && and_mask_p (INTVAL (op)))); 468}) 469 470;; True iff depi can be used to compute (reg | OP). 471 472(define_predicate "ior_operand" 473 (match_code "const_int") 474{ 475 return (GET_CODE (op) == CONST_INT && ior_mask_p (INTVAL (op))); 476}) 477 478;; True iff OP is a CONST_INT of the forms 0...0xxxx or 479;; 0...01...1xxxx. Such values can be the left hand side x in (x << 480;; r), using the zvdepi instruction. 481 482(define_predicate "lhs_lshift_cint_operand" 483 (match_code "const_int") 484{ 485 unsigned HOST_WIDE_INT x; 486 if (GET_CODE (op) != CONST_INT) 487 return 0; 488 x = INTVAL (op) >> 4; 489 return (x & (x + 1)) == 0; 490}) 491 492;; TODO: Add a comment here. 493 494(define_predicate "lhs_lshift_operand" 495 (match_code "subreg,reg,const_int") 496{ 497 return register_operand (op, mode) || lhs_lshift_cint_operand (op, mode); 498}) 499 500;; TODO: Add a comment here. 501 502(define_predicate "arith32_operand" 503 (match_code "subreg,reg,const_int") 504{ 505 return register_operand (op, mode) || GET_CODE (op) == CONST_INT; 506}) 507 508;; TODO: Add a comment here. 509 510(define_predicate "pc_or_label_operand" 511 (match_code "pc,label_ref") 512{ 513 return (GET_CODE (op) == PC || GET_CODE (op) == LABEL_REF); 514}) 515 516;; TODO: Add a comment here. 517 518(define_predicate "plus_xor_ior_operator" 519 (match_code "plus,xor,ior") 520{ 521 return (GET_CODE (op) == PLUS || GET_CODE (op) == XOR 522 || GET_CODE (op) == IOR); 523}) 524 525;; Return 1 if OP is a CONST_INT with the value 2, 4, or 8. These are 526;; the valid constant for shadd instructions. 527 528(define_predicate "shadd_operand" 529 (match_code "const_int") 530{ 531 return (GET_CODE (op) == CONST_INT && shadd_constant_p (INTVAL (op))); 532}) 533 534;; TODO: Add a comment here. 535 536(define_predicate "div_operand" 537 (match_code "reg,const_int") 538{ 539 return (mode == SImode 540 && ((GET_CODE (op) == REG && REGNO (op) == 25) 541 || (GET_CODE (op) == CONST_INT && INTVAL (op) > 0 542 && INTVAL (op) < 16 && magic_milli[INTVAL (op)]))); 543}) 544 545;; Return nonzero if OP is an integer register, else return zero. 546 547(define_predicate "ireg_operand" 548 (match_code "reg") 549{ 550 return (GET_CODE (op) == REG && REGNO (op) > 0 && REGNO (op) < 32); 551}) 552 553;; Return 1 if this is a comparison operator. This allows the use of 554;; MATCH_OPERATOR to recognize all the branch insns. 555 556(define_predicate "cmpib_comparison_operator" 557 (match_code "eq,ne,lt,le,leu,gt,gtu,ge") 558{ 559 return ((mode == VOIDmode || GET_MODE (op) == mode) 560 && (GET_CODE (op) == EQ 561 || GET_CODE (op) == NE 562 || GET_CODE (op) == GT 563 || GET_CODE (op) == GTU 564 || GET_CODE (op) == GE 565 || GET_CODE (op) == LT 566 || GET_CODE (op) == LE 567 || GET_CODE (op) == LEU)); 568}) 569 570;; Return 1 if OP is an operator suitable for use in a movb 571;; instruction. 572 573(define_predicate "movb_comparison_operator" 574 (match_code "eq,ne,lt,ge") 575{ 576 return (GET_CODE (op) == EQ || GET_CODE (op) == NE 577 || GET_CODE (op) == LT || GET_CODE (op) == GE); 578}) 579