xref: /openbsd/sys/arch/hppa/hppa/locore0.S (revision c95c5e15)
1/*	$OpenBSD: locore0.S,v 1.1 2017/06/05 18:59:06 deraadt Exp $	*/
2
3/*
4 * Copyright (c) 1998-2004 Michael Shalayeff
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
25 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26 * THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Portitions of this file are derived from other sources, see
29 * the copyrights and acknowledgements below.
30 */
31/*
32 *  (c) Copyright 1988 HEWLETT-PACKARD COMPANY
33 *
34 *  To anyone who acknowledges that this file is provided "AS IS"
35 *  without any express or implied warranty:
36 *      permission to use, copy, modify, and distribute this file
37 *  for any purpose is hereby granted without fee, provided that
38 *  the above copyright notice and this notice appears in all
39 *  copies, and that the name of Hewlett-Packard Company not be
40 *  used in advertising or publicity pertaining to distribution
41 *  of the software without specific, written prior permission.
42 *  Hewlett-Packard Company makes no representations about the
43 *  suitability of this software for any purpose.
44 */
45/*
46 * Copyright (c) 1990,1991,1992,1994 The University of Utah and
47 * the Computer Systems Laboratory (CSL).  All rights reserved.
48 *
49 * Permission to use, copy, modify and distribute this software is hereby
50 * granted provided that (1) source code retains these copyright, permission,
51 * and disclaimer notices, and (2) redistributions including binaries
52 * reproduce the notices in supporting documentation, and (3) all advertising
53 * materials mentioning features or use of this software display the following
54 * acknowledgement: ``This product includes software developed by the
55 * Computer Systems Laboratory at the University of Utah.''
56 *
57 * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
58 * IS" CONDITION.  THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
59 * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
60 *
61 * CSL requests users of this software to return to csl-dist@cs.utah.edu any
62 * improvements that they make and grant CSL redistribution rights.
63 *
64 *	Utah $Hdr: locore.s 1.63 95/01/20$
65 */
66
67#include <sys/reboot.h>
68#include <machine/param.h>
69#include <machine/asm.h>
70#include <machine/psl.h>
71#include <machine/trap.h>
72#include <machine/iomod.h>
73#include <machine/pdc.h>
74#include <machine/frame.h>
75#include <machine/reg.h>
76#include "assym.h"
77
78	.import	$global$, data
79	.import pdc, data
80	.import	boothowto, data
81	.import	bootdev, data
82	.import	esym, data
83	.import cpu_info, data
84	.import	proc0, data
85	.import	proc0paddr, data
86	.import proc0fpstate, data
87
88#define	EMRG_STACKSIZE	(1*NBPG)
89#define	FPEMU_STACKSIZE	(1*NBPG)
90
91	.data
92
93	BSS(pdc_stack, 4)	/* temp stack for PDC call */
94	BSS(emrg_stack, 4)	/* stack for HPMC/TOC/PWRF */
95
96	.export	kernelmapped, data
97	BSS(kernelmapped, 4)	/* set when kernel is mapped */
98	.export fpu_enable, data
99	BSS(fpu_enable, 4)	/* bits to set in the ccr to enable fpu */
100	BSS(cpu_fpuena, 4)	/* enable FPU, otherwise force emulate */
101	BSS(fpu_scratch, 16)	/* FPU scratch space, enough for a quad */
102	.export hppa_vtop, data
103	BSS(hppa_vtop, 4)	/* a vtop translation table addr (pa=va) */
104
105	.text
106	.import	$kernel_setup, entry
107
108/*
109 * This is the starting location for the kernel
110 */
111ENTRY($start,0)
112/*
113 *	start(pdc, boothowto, bootdev, esym, bootapiver, argv, argc)
114 *
115 *	pdc - PDC entry point
116 *	boothowto - boot flags (see "reboot.h")
117 *	bootdev - boot device (index into bdevsw)
118 *	esym - end of symbol table (or &end if not present)
119 *	bootapiver - /boot API version
120 *	argv - options block passed from /boot
121 *	argc - the length of the block
122 */
123
124	/*
125	 * save the pdc, boothowto, bootdev and esym arguments
126	 */
127	ldil	L%pdc,r1
128	stw	arg0,R%pdc(r1)
129	ldil	L%boothowto,r1
130	stw	arg1,R%boothowto(r1)
131	ldil	L%bootdev,r1
132	stw	arg2,R%bootdev(r1)
133	ldil	L%esym,r1
134	stw	arg3,R%esym(r1)
135
136	/* Align arg3, which is the start of available memory */
137	ldo	NBPG-1(arg3), arg3
138	dep	r0, 31, PGSHIFT, arg3
139
140	/* assuming size being page-aligned */
141#define	STACK_ALLOC(n,s)	\
142	ldil	L%(n), t1	! \
143	ldil	L%(s), t2	! \
144	stw	arg3, R%(n)(t1)	! \
145	add	arg3, t2, arg3
146
147	STACK_ALLOC(pdc_stack, PDC_STACKSIZE)
148	STACK_ALLOC(emrg_stack, EMRG_STACKSIZE)
149
150#undef	STACK_ALLOC
151
152	/* zero fake trapframe and proc0 u-area */
153	copy	arg3, t2
154	ldi	NBPG+TRAPFRAME_SIZEOF, t1
155$start_zero_tf
156	stws,ma r0, 4(t2)
157	addib,>= -8, t1, $start_zero_tf
158	stws,ma r0, 4(t2)	/* XXX could use ,bc here, but gas is broken */
159
160	/*
161	 * kernel stack lives here (arg3 is page-aligned esym)
162	 * initialize the pcb
163	 * arg0 will be available space for hppa_init()
164	 */
165	ldo	NBPG+TRAPFRAME_SIZEOF(arg3), sp
166	stw	r0, U_PCB+PCB_ONFAULT(arg3)
167	stw	r0, U_PCB+PCB_SPACE(arg3)	/* XXX HPPA_SID_KERNEL == 0 */
168	ldil	L%(USPACE+NBPG), arg0		/* normal U plus red zone */
169	add	arg0, arg3, arg0
170	ldil	L%proc0paddr, t1
171	stw	arg3, R%proc0paddr(t1)
172	ldil	L%proc0, t2
173	stw	arg3, R%proc0+P_ADDR(t2)
174	ldo	-TRAPFRAME_SIZEOF(sp), t3
175	stw	t3, R%proc0+P_MD_REGS(t2)
176
177	ldil	L%TFF_LAST, t1
178	stw	t1, TF_FLAGS-TRAPFRAME_SIZEOF(sp)
179	ldil	L%proc0fpstate, t1
180	ldo	R%proc0fpstate(t1), t1
181	stw	t1, TF_CR30-TRAPFRAME_SIZEOF(sp)
182	mtctl	t1, cr30
183
184	/*
185	 * disable all coprocessors
186	 */
187	mtctl	r0, ccr
188
189	/* Store pointer to cpu_info in CR29. */
190	ldil	L%cpu_info, r1
191	ldo	R%cpu_info(r1), r1
192	mtctl	r1, cr29
193
194#ifdef MULTIPROCESSOR
195	/* Setup SMP rendezvous address. */
196	ldil	L%hw_cpu_spinup_trampoline, r1
197	ldo	R%hw_cpu_spinup_trampoline(r1), r1
198	stw	r1, 0x10(0)	/* MEM_RENDEZ */
199	stw	r0, 0x28(0)	/* MEM_RENDEZ */
200#endif
201
202	copy	sp, arg1
203	ldil	L%$qisnowon, rp
204	ldo	R%$qisnowon(rp), rp
205	b	$kernel_setup
206	ldi	PSL_Q|PSL_I, arg2
207
208$qisnowon
209	/*
210	 * call C routine hppa_init() to initialize VM
211	 */
212	ldil	L%hppa_init, r1
213	ldo	R%hppa_init(r1), r1
214	.import hppa_init, code
215	.call
216	blr	r0, rp
217	bv,n	(r1)
218	nop
219
220	/*
221	 * Cannot change the queues or IPSW with the Q-bit on
222	 */
223	rsm	RESET_PSL, r0
224	nop ! nop ! nop ! nop ! nop ! nop ! nop
225
226	/*
227	 * We need to do an rfi to get the C bit set
228	 */
229	mtctl	r0, pcsq
230	mtctl	r0, pcsq
231	ldil	L%$virtual_mode, t1
232	ldo	R%$virtual_mode(t1), t1
233	mtctl	t1, pcoq
234	ldo	4(t1), t1
235	mtctl	t1, pcoq
236	mfctl	r29, t1
237	ldw	CI_PSW(t1), t2
238	mtctl	t2, ipsw
239	rfi
240	nop
241
242$virtual_mode
243	ldil	L%kernelmapped, t1
244	stw	t1, R%kernelmapped(t1)
245
246#ifdef DDB
247	.import	db_enter, code
248	/* have to call debugger from here, from virtual mode */
249	ldil	L%boothowto, r1
250	ldw	R%boothowto(r1), r1
251	bb,>=	r1, 25, $noddb
252	nop
253
254	break	HPPA_BREAK_KERNEL, HPPA_BREAK_KGDB
255$noddb
256#endif
257
258	.import main,code
259	ldil	L%main, r1
260	ldo	R%main(r1), r1
261$callmain
262	.call
263	blr	r0, rp
264	bv,n	(r1)
265	nop
266
267	/* should never return... */
268	bv	(rp)
269	nop
270EXIT($start)
271