xref: /openbsd/sys/arch/landisk/include/bus.h (revision f56b290d)
1 /*	$OpenBSD: bus.h,v 1.10 2022/01/04 20:41:44 deraadt Exp $	*/
2 /*	$NetBSD: bus.h,v 1.1 2006/09/01 21:26:18 uwe Exp $	*/
3 
4 /*-
5  * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10  * NASA Ames Research Center.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 /*
35  * Copyright (c) 1996 Charles M. Hannum.  All rights reserved.
36  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
37  *
38  * Redistribution and use in source and binary forms, with or without
39  * modification, are permitted provided that the following conditions
40  * are met:
41  * 1. Redistributions of source code must retain the above copyright
42  *    notice, this list of conditions and the following disclaimer.
43  * 2. Redistributions in binary form must reproduce the above copyright
44  *    notice, this list of conditions and the following disclaimer in the
45  *    documentation and/or other materials provided with the distribution.
46  * 3. All advertising materials mentioning features or use of this software
47  *    must display the following acknowledgement:
48  *      This product includes software developed by Christopher G. Demetriou
49  *	for the NetBSD Project.
50  * 4. The name of the author may not be used to endorse or promote products
51  *    derived from this software without specific prior written permission
52  *
53  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
54  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
55  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
56  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
57  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
58  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
62  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63  */
64 
65 #ifndef _MACHINE_BUS_H_
66 #define	_MACHINE_BUS_H_
67 
68 #ifdef _KERNEL
69 
70 #include <sys/types.h>
71 
72 typedef	u_long	bus_addr_t;
73 typedef	u_long	bus_size_t;
74 
75 typedef struct _bus_space *bus_space_tag_t;
76 typedef u_long bus_space_handle_t;
77 
78 struct _bus_space {
79 	/* cookie */
80 	void		*bs_cookie;
81 
82 	/* mapping/unmapping */
83 	int		(*bs_map)(void *, bus_addr_t, bus_size_t,
84 			    int, bus_space_handle_t *);
85 	void		(*bs_unmap)(void *, bus_space_handle_t,
86 			    bus_size_t);
87 	int		(*bs_subregion)(void *, bus_space_handle_t,
88 			    bus_size_t, bus_size_t, bus_space_handle_t *);
89 
90 	/* allocation/deallocation */
91 	int		(*bs_alloc)(void *, bus_addr_t, bus_addr_t,
92 			    bus_size_t, bus_size_t, bus_size_t, int,
93 			    bus_addr_t *, bus_space_handle_t *);
94 	void		(*bs_free)(void *, bus_space_handle_t,
95 			    bus_size_t);
96 
97 	/* get kernel virtual address */
98 	void *		(*bs_vaddr)(void *, bus_space_handle_t);
99 
100 	/* read (single) */
101 	uint8_t		(*bs_r_1)(void *, bus_space_handle_t,
102 			    bus_size_t);
103 	uint16_t	(*bs_r_2)(void *, bus_space_handle_t,
104 			    bus_size_t);
105 	uint32_t	(*bs_r_4)(void *, bus_space_handle_t,
106 			    bus_size_t);
107 	uint64_t	(*bs_r_8)(void *, bus_space_handle_t,
108 			    bus_size_t);
109 
110 	/* read multiple */
111 	void		(*bs_rm_1)(void *, bus_space_handle_t,
112 			    bus_size_t, uint8_t *, bus_size_t);
113 	void		(*bs_rm_2)(void *, bus_space_handle_t,
114 			    bus_size_t, uint16_t *, bus_size_t);
115 	void		(*bs_rm_4)(void *, bus_space_handle_t,
116 			    bus_size_t, uint32_t *, bus_size_t);
117 	void		(*bs_rm_8)(void *, bus_space_handle_t,
118 			    bus_size_t, uint64_t *, bus_size_t);
119 
120 	void		(*bs_rrm_2)(void *, bus_space_handle_t,
121 			    bus_size_t, uint8_t *, bus_size_t);
122 	void		(*bs_rrm_4)(void *, bus_space_handle_t,
123 			    bus_size_t, uint8_t *, bus_size_t);
124 	void		(*bs_rrm_8)(void *, bus_space_handle_t,
125 			    bus_size_t, uint8_t *, bus_size_t);
126 
127 	/* read region */
128 	void		(*bs_rr_1)(void *, bus_space_handle_t,
129 			    bus_size_t, uint8_t *, bus_size_t);
130 	void		(*bs_rr_2)(void *, bus_space_handle_t,
131 			    bus_size_t, uint16_t *, bus_size_t);
132 	void		(*bs_rr_4)(void *, bus_space_handle_t,
133 			    bus_size_t, uint32_t *, bus_size_t);
134 	void		(*bs_rr_8)(void *, bus_space_handle_t,
135 			    bus_size_t, uint64_t *, bus_size_t);
136 
137 	void		(*bs_rrr_2)(void *, bus_space_handle_t,
138 			    bus_size_t, uint8_t *, bus_size_t);
139 	void		(*bs_rrr_4)(void *, bus_space_handle_t,
140 			    bus_size_t, uint8_t *, bus_size_t);
141 	void		(*bs_rrr_8)(void *, bus_space_handle_t,
142 			    bus_size_t, uint8_t *, bus_size_t);
143 
144 	/* write (single) */
145 	void		(*bs_w_1)(void *, bus_space_handle_t,
146 			    bus_size_t, uint8_t);
147 	void		(*bs_w_2)(void *, bus_space_handle_t,
148 			    bus_size_t, uint16_t);
149 	void		(*bs_w_4)(void *, bus_space_handle_t,
150 			    bus_size_t, uint32_t);
151 	void		(*bs_w_8)(void *, bus_space_handle_t,
152 			    bus_size_t, uint64_t);
153 
154 	/* write multiple */
155 	void		(*bs_wm_1)(void *, bus_space_handle_t,
156 			    bus_size_t, const uint8_t *, bus_size_t);
157 	void		(*bs_wm_2)(void *, bus_space_handle_t,
158 			    bus_size_t, const uint16_t *, bus_size_t);
159 	void		(*bs_wm_4)(void *, bus_space_handle_t,
160 			    bus_size_t, const uint32_t *, bus_size_t);
161 	void		(*bs_wm_8)(void *, bus_space_handle_t,
162 			    bus_size_t, const uint64_t *, bus_size_t);
163 
164 	void		(*bs_wrm_2)(void *, bus_space_handle_t,
165 			    bus_size_t, const uint8_t *, bus_size_t);
166 	void		(*bs_wrm_4)(void *, bus_space_handle_t,
167 			    bus_size_t, const uint8_t *, bus_size_t);
168 	void		(*bs_wrm_8)(void *, bus_space_handle_t,
169 			    bus_size_t, const uint8_t *, bus_size_t);
170 
171 	/* write region */
172 	void		(*bs_wr_1)(void *, bus_space_handle_t,
173 			    bus_size_t, const uint8_t *, bus_size_t);
174 	void		(*bs_wr_2)(void *, bus_space_handle_t,
175 			    bus_size_t, const uint16_t *, bus_size_t);
176 	void		(*bs_wr_4)(void *, bus_space_handle_t,
177 			    bus_size_t, const uint32_t *, bus_size_t);
178 	void		(*bs_wr_8)(void *, bus_space_handle_t,
179 			    bus_size_t, const uint64_t *, bus_size_t);
180 
181 	void		(*bs_wrr_2)(void *, bus_space_handle_t,
182 			    bus_size_t, const uint8_t *, bus_size_t);
183 	void		(*bs_wrr_4)(void *, bus_space_handle_t,
184 			    bus_size_t, const uint8_t *, bus_size_t);
185 	void		(*bs_wrr_8)(void *, bus_space_handle_t,
186 			    bus_size_t, const uint8_t *, bus_size_t);
187 
188 	/* set multiple */
189 	void		(*bs_sm_1)(void *, bus_space_handle_t,
190 			    bus_size_t, uint8_t, bus_size_t);
191 	void		(*bs_sm_2)(void *, bus_space_handle_t,
192 			    bus_size_t, uint16_t, bus_size_t);
193 	void		(*bs_sm_4)(void *, bus_space_handle_t,
194 			    bus_size_t, uint32_t, bus_size_t);
195 	void		(*bs_sm_8)(void *, bus_space_handle_t,
196 			    bus_size_t, uint64_t, bus_size_t);
197 
198 	/* set region */
199 	void		(*bs_sr_1)(void *, bus_space_handle_t,
200 			    bus_size_t, uint8_t, bus_size_t);
201 	void		(*bs_sr_2)(void *, bus_space_handle_t,
202 			    bus_size_t, uint16_t, bus_size_t);
203 	void		(*bs_sr_4)(void *, bus_space_handle_t,
204 			    bus_size_t, uint32_t, bus_size_t);
205 	void		(*bs_sr_8)(void *, bus_space_handle_t,
206 			    bus_size_t, uint64_t, bus_size_t);
207 
208 	/* copy */
209 	void		(*bs_c_1)(void *, bus_space_handle_t, bus_size_t,
210 			    bus_space_handle_t, bus_size_t, bus_size_t);
211 	void		(*bs_c_2)(void *, bus_space_handle_t, bus_size_t,
212 			    bus_space_handle_t, bus_size_t, bus_size_t);
213 	void		(*bs_c_4)(void *, bus_space_handle_t, bus_size_t,
214 			    bus_space_handle_t, bus_size_t, bus_size_t);
215 	void		(*bs_c_8)(void *, bus_space_handle_t, bus_size_t,
216 			    bus_space_handle_t, bus_size_t, bus_size_t);
217 };
218 
219 #ifdef _KERNEL
220 /*
221  * Utility macros; INTERNAL USE ONLY.
222  */
223 #define	__bs_c(a,b)		__CONCAT(a,b)
224 #define	__bs_opname(op,size)	__bs_c(__bs_c(__bs_c(bs_,op),_),size)
225 
226 #define	__bs_rs(sz, tn, t, h, o)					\
227 	(*(t)->__bs_opname(r,sz))((t)->bs_cookie, h, o)
228 
229 #define	__bs_ws(sz, tn, t, h, o, v)					\
230 	(*(t)->__bs_opname(w,sz))((t)->bs_cookie, h, o, v)
231 
232 #define	__bs_nonsingle(type, sz, tn, t, h, o, a, c)			\
233 	(*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, a, c)
234 
235 #define	__bs_set(type, sz, tn, t, h, o, v, c)				\
236 	(*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, v, c)
237 
238 #define	__bs_copy(sz, tn, t, h1, o1, h2, o2, cnt)			\
239 	(*(t)->__bs_opname(c,sz))((t)->bs_cookie, h1, o1, h2, o2, cnt)
240 
241 
242 /*
243  * Mapping and unmapping operations.
244  */
245 #define	bus_space_map(t, a, s, f, hp)					\
246 	(*(t)->bs_map)((t)->bs_cookie, (a), (s), (f), (hp))
247 #define	bus_space_unmap(t, h, s)					\
248 	(*(t)->bs_unmap)((t)->bs_cookie, (h), (s))
249 #define	bus_space_subregion(t, h, o, s, hp)				\
250 	(*(t)->bs_subregion)((t)->bs_cookie, (h), (o), (s), (hp))
251 
252 #endif /* _KERNEL */
253 
254 #define	BUS_SPACE_MAP_CACHEABLE		0x01
255 #define	BUS_SPACE_MAP_LINEAR		0x02
256 #define	BUS_SPACE_MAP_PREFETCHABLE     	0x04
257 
258 #ifdef _KERNEL
259 /*
260  * Allocation and deallocation operations.
261  */
262 #define	bus_space_alloc(t, rs, re, s, a, b, f, ap, hp)			\
263 	(*(t)->bs_alloc)((t)->bs_cookie, (rs), (re), (s), (a), (b),	\
264 	    (f), (ap), (hp))
265 #define	bus_space_free(t, h, s)						\
266 	(*(t)->bs_free)((t)->bs_cookie, (h), (s))
267 
268 /*
269  * Get kernel virtual address for ranges mapped BUS_SPACE_MAP_LINEAR.
270  */
271 #define bus_space_vaddr(t, h) \
272 	(*(t)->bs_vaddr)((t)->bs_cookie, (h))
273 
274 /*
275  * Bus barrier operations.  The SH3 does not currently require
276  * barriers, but we must provide the flags to MI code.
277  */
278 #define	bus_space_barrier(t, h, o, l, f)				\
279 	((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
280 
281 #define	BUS_SPACE_BARRIER_READ	0x01
282 #define	BUS_SPACE_BARRIER_WRITE	0x02
283 
284 
285 /*
286  * Bus read (single) operations.
287  */
288 #define	bus_space_read_1(t, h, o)	__bs_rs(1,uint8_t,(t),(h),(o))
289 #define	bus_space_read_2(t, h, o)	__bs_rs(2,uint16_t,(t),(h),(o))
290 #define	bus_space_read_4(t, h, o)	__bs_rs(4,uint32_t,(t),(h),(o))
291 #define	bus_space_read_8(t, h, o)	__bs_rs(8,uint64_t,(t),(h),(o))
292 
293 
294 /*
295  * Bus read multiple operations.
296  */
297 #define	bus_space_read_multi_1(t, h, o, a, c)				\
298 	__bs_nonsingle(rm,1,uint8_t,(t),(h),(o),(a),(c))
299 #define	bus_space_read_multi_2(t, h, o, a, c)				\
300 	__bs_nonsingle(rm,2,uint16_t,(t),(h),(o),(a),(c))
301 #define	bus_space_read_multi_4(t, h, o, a, c)				\
302 	__bs_nonsingle(rm,4,uint32_t,(t),(h),(o),(a),(c))
303 #define	bus_space_read_multi_8(t, h, o, a, c)				\
304 	__bs_nonsingle(rm,8,uint64_t,(t),(h),(o),(a),(c))
305 
306 #define	bus_space_read_raw_multi_2(t, h, o, a, c)			\
307 	__bs_nonsingle(rrm,2,uint16_t,(t),(h),(o),(a),(c))
308 #define	bus_space_read_raw_multi_4(t, h, o, a, c)			\
309 	__bs_nonsingle(rrm,4,uint32_t,(t),(h),(o),(a),(c))
310 #define	bus_space_read_raw_multi_8(t, h, o, a, c)			\
311 	__bs_nonsingle(rrm,8,uint64_t,(t),(h),(o),(a),(c))
312 
313 
314 /*
315  * Bus read region operations.
316  */
317 #define	bus_space_read_region_1(t, h, o, a, c)				\
318 	__bs_nonsingle(rr,1,uint8_t,(t),(h),(o),(a),(c))
319 #define	bus_space_read_region_2(t, h, o, a, c)				\
320 	__bs_nonsingle(rr,2,uint16_t,(t),(h),(o),(a),(c))
321 #define	bus_space_read_region_4(t, h, o, a, c)				\
322 	__bs_nonsingle(rr,4,uint32_t,(t),(h),(o),(a),(c))
323 #define	bus_space_read_region_8(t, h, o, a, c)				\
324 	__bs_nonsingle(rr,8,uint64_t,(t),(h),(o),(a),(c))
325 
326 #define	bus_space_read_raw_region_2(t, h, o, a, c)			\
327 	__bs_nonsingle(rrr,2,uint16_t,(t),(h),(o),(a),(c))
328 #define	bus_space_read_raw_region_4(t, h, o, a, c)			\
329 	__bs_nonsingle(rrr,4,uint32_t,(t),(h),(o),(a),(c))
330 #define	bus_space_read_raw_region_8(t, h, o, a, c)			\
331 	__bs_nonsingle(rrr,8,uint64_t,(t),(h),(o),(a),(c))
332 
333 
334 /*
335  * Bus write (single) operations.
336  */
337 #define	bus_space_write_1(t, h, o, v)	__bs_ws(1,uint8_t,(t),(h),(o),(v))
338 #define	bus_space_write_2(t, h, o, v)	__bs_ws(2,uint16_t,(t),(h),(o),(v))
339 #define	bus_space_write_4(t, h, o, v)	__bs_ws(4,uint32_t,(t),(h),(o),(v))
340 #define	bus_space_write_8(t, h, o, v)	__bs_ws(8,uint64_t,(t),(h),(o),(v))
341 
342 
343 /*
344  * Bus write multiple operations.
345  */
346 #define	bus_space_write_multi_1(t, h, o, a, c)				\
347 	__bs_nonsingle(wm,1,uint8_t,(t),(h),(o),(a),(c))
348 #define	bus_space_write_multi_2(t, h, o, a, c)				\
349 	__bs_nonsingle(wm,2,uint16_t,(t),(h),(o),(a),(c))
350 #define	bus_space_write_multi_4(t, h, o, a, c)				\
351 	__bs_nonsingle(wm,4,uint32_t,(t),(h),(o),(a),(c))
352 #define	bus_space_write_multi_8(t, h, o, a, c)				\
353 	__bs_nonsingle(wm,8,uint64_t,(t),(h),(o),(a),(c))
354 
355 #define	bus_space_write_raw_multi_2(t, h, o, a, c)			\
356 	__bs_nonsingle(wrm,2,uint16_t,(t),(h),(o),(a),(c))
357 #define	bus_space_write_raw_multi_4(t, h, o, a, c)			\
358 	__bs_nonsingle(wrm,4,uint32_t,(t),(h),(o),(a),(c))
359 #define	bus_space_write_raw_multi_8(t, h, o, a, c)			\
360 	__bs_nonsingle(wrm,8,uint64_t,(t),(h),(o),(a),(c))
361 
362 
363 /*
364  * Bus write region operations.
365  */
366 #define	bus_space_write_region_1(t, h, o, a, c)				\
367 	__bs_nonsingle(wr,1,uint8_t,(t),(h),(o),(a),(c))
368 #define	bus_space_write_region_2(t, h, o, a, c)				\
369 	__bs_nonsingle(wr,2,uint16_t,(t),(h),(o),(a),(c))
370 #define	bus_space_write_region_4(t, h, o, a, c)				\
371 	__bs_nonsingle(wr,4,uint32_t,(t),(h),(o),(a),(c))
372 #define	bus_space_write_region_8(t, h, o, a, c)				\
373 	__bs_nonsingle(wr,8,uint64_t,(t),(h),(o),(a),(c))
374 
375 #define	bus_space_write_raw_region_2(t, h, o, a, c)			\
376 	__bs_nonsingle(wrr,2,uint16_t,(t),(h),(o),(a),(c))
377 #define	bus_space_write_raw_region_4(t, h, o, a, c)			\
378 	__bs_nonsingle(wrr,4,uint32_t,(t),(h),(o),(a),(c))
379 #define	bus_space_write_raw_region_8(t, h, o, a, c)			\
380 	__bs_nonsingle(wrr,8,uint64_t,(t),(h),(o),(a),(c))
381 
382 
383 /*
384  * Set multiple operations.
385  */
386 #define	bus_space_set_multi_1(t, h, o, v, c)				\
387 	__bs_set(sm,1,uint8_t,(t),(h),(o),(v),(c))
388 #define	bus_space_set_multi_2(t, h, o, v, c)				\
389 	__bs_set(sm,2,uint16_t,(t),(h),(o),(v),(c))
390 #define	bus_space_set_multi_4(t, h, o, v, c)				\
391 	__bs_set(sm,4,uint32_t,(t),(h),(o),(v),(c))
392 #define	bus_space_set_multi_8(t, h, o, v, c)				\
393 	__bs_set(sm,8,uint64_t,(t),(h),(o),(v),(c))
394 
395 
396 /*
397  * Set region operations.
398  */
399 #define	bus_space_set_region_1(t, h, o, v, c)				\
400 	__bs_set(sr,1,uint8_t,(t),(h),(o),(v),(c))
401 #define	bus_space_set_region_2(t, h, o, v, c)				\
402 	__bs_set(sr,2,uint16_t,(t),(h),(o),(v),(c))
403 #define	bus_space_set_region_4(t, h, o, v, c)				\
404 	__bs_set(sr,4,uint32_t,(t),(h),(o),(v),(c))
405 #define	bus_space_set_region_8(t, h, o, v, c)				\
406 	__bs_set(sr,8,uint64_t,(t),(h),(o),(v),(c))
407 
408 
409 /*
410  * Copy region operations.
411  */
412 #define	bus_space_copy_1(t, h1, o1, h2, o2, c)				\
413 	__bs_copy(1, uint8_t, (t), (h1), (o1), (h2), (o2), (c))
414 #define	bus_space_copy_2(t, h1, o1, h2, o2, c)				\
415 	__bs_copy(2, uint16_t, (t), (h1), (o1), (h2), (o2), (c))
416 #define	bus_space_copy_4(t, h1, o1, h2, o2, c)				\
417 	__bs_copy(4, uint32_t, (t), (h1), (o1), (h2), (o2), (c))
418 #define	bus_space_copy_8(t, h1, o1, h2, o2, c)				\
419 	__bs_copy(8, uint64_t, (t), (h1), (o1), (h2), (o2), (c))
420 
421 #endif /* _KERNEL */
422 
423 /*
424  * Flags used in various bus DMA methods.
425  */
426 #define	BUS_DMA_WAITOK		0x0000	/* safe to sleep (pseudo-flag) */
427 #define	BUS_DMA_NOWAIT		0x0001	/* not safe to sleep */
428 #define	BUS_DMA_ALLOCNOW	0x0002	/* perform resource allocation now */
429 #define	BUS_DMA_COHERENT	0x0004	/* map memory to not require sync */
430 #define	BUS_DMA_STREAMING	0x0008	/* hint: sequential, unidirectional */
431 #define	BUS_DMA_BUS1		0x0010	/* placeholders for bus functions... */
432 #define	BUS_DMA_BUS2		0x0020
433 #define	BUS_DMA_BUS3		0x0040
434 #define	BUS_DMA_BUS4		0x0080
435 #define	BUS_DMA_READ		0x0100	/* mapping is device -> memory only */
436 #define	BUS_DMA_WRITE		0x0200	/* mapping is memory -> device only */
437 #define	BUS_DMA_NOCACHE		0x0400	/* hint: map non-cached memory */
438 #define	BUS_DMA_ZERO		0x0800	/* zero memory in dmamem_alloc */
439 #define	BUS_DMA_64BIT		0x1000	/* device handles 64bit dva */
440 
441 /* Forwards needed by prototypes below. */
442 struct mbuf;
443 struct uio;
444 
445 /*
446  *	Operations performed by bus_dmamap_sync().
447  */
448 #define	BUS_DMASYNC_PREREAD	0x01
449 #define	BUS_DMASYNC_POSTREAD	0x02
450 #define	BUS_DMASYNC_PREWRITE	0x04
451 #define	BUS_DMASYNC_POSTWRITE	0x08
452 
453 typedef struct _bus_dma_tag *bus_dma_tag_t;
454 typedef struct _bus_dmamap *bus_dmamap_t;
455 
456 #define BUS_DMA_TAG_VALID(t)    ((t) != (bus_dma_tag_t)0)
457 
458 /*
459  *	bus_dma_segment_t
460  *
461  *	Describes a single contiguous DMA transaction.  Values
462  *	are suitable for programming into DMA registers.
463  */
464 struct _bus_dma_segment {
465 	bus_addr_t	ds_addr;	/* DMA address */
466 	bus_size_t	ds_len;		/* length of transfer */
467 
468 	/* private section */
469 	bus_addr_t	_ds_vaddr;	/* virtual address */
470 };
471 typedef struct _bus_dma_segment	bus_dma_segment_t;
472 
473 /*
474  *	bus_dma_tag_t
475  *
476  *	A machine-dependent opaque type describing the implementation of
477  *	DMA for a given bus.
478  */
479 
480 struct _bus_dma_tag {
481 	void	*_cookie;		/* cookie used in the guts */
482 
483 	/*
484 	 * DMA mapping methods.
485 	 */
486 	int	(*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
487 		    bus_size_t, bus_size_t, int, bus_dmamap_t *);
488 	void	(*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
489 	int	(*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
490 		    bus_size_t, struct proc *, int);
491 	int	(*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
492 		    struct mbuf *, int);
493 	int	(*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
494 		    struct uio *, int);
495 	int	(*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
496 		    bus_dma_segment_t *, int, bus_size_t, int);
497 	void	(*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
498 	void	(*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
499 		    bus_addr_t, bus_size_t, int);
500 
501 	/*
502 	 * DMA memory utility functions.
503 	 */
504 	int	(*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
505 		    bus_size_t, bus_dma_segment_t *, int, int *, int);
506 	void	(*_dmamem_free)(bus_dma_tag_t,
507 		    bus_dma_segment_t *, int);
508 	int	(*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
509 		    int, size_t, caddr_t *, int);
510 	void	(*_dmamem_unmap)(bus_dma_tag_t, caddr_t, size_t);
511 	paddr_t	(*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
512 		    int, off_t, int, int);
513 };
514 
515 #define	bus_dmamap_create(t, s, n, m, b, f, p)			\
516 	(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
517 #define	bus_dmamap_destroy(t, p)				\
518 	(*(t)->_dmamap_destroy)((t), (p))
519 #define	bus_dmamap_load(t, m, b, s, p, f)			\
520 	(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
521 #define	bus_dmamap_load_mbuf(t, m, b, f)			\
522 	(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
523 #define	bus_dmamap_load_uio(t, m, u, f)				\
524 	(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
525 #define	bus_dmamap_load_raw(t, m, sg, n, s, f)			\
526 	(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
527 #define	bus_dmamap_unload(t, p)					\
528 	(*(t)->_dmamap_unload)((t), (p))
529 #define	bus_dmamap_sync(t, m, o, l, op)				\
530 	(void)((t)->_dmamap_sync ?				\
531 	    (*(t)->_dmamap_sync)((t), (m), (o), (l), (op)) : (void)0)
532 
533 #define	bus_dmamem_alloc(t, s, a, b, sg, n, r, f)		\
534 	(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
535 #define	bus_dmamem_free(t, sg, n)				\
536 	(*(t)->_dmamem_free)((t), (sg), (n))
537 #define	bus_dmamem_map(t, sg, n, s, k, f)			\
538 	(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
539 #define	bus_dmamem_unmap(t, k, s)				\
540 	(*(t)->_dmamem_unmap)((t), (k), (s))
541 #define	bus_dmamem_mmap(t, sg, n, o, p, f)			\
542 	(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
543 
544 /*
545  *	bus_dmamap_t
546  *
547  *	Describes a DMA mapping.
548  */
549 struct _bus_dmamap {
550 	/*
551 	 * PRIVATE MEMBERS: not for use my machine-independent code.
552 	 */
553 	bus_size_t	_dm_size;	/* largest DMA transfer mappable */
554 	int		_dm_segcnt;	/* number of segs this map can map */
555 	bus_size_t	_dm_maxsegsz;	/* largest possible segment */
556 	bus_size_t	_dm_boundary;	/* don't cross this */
557 	int		_dm_flags;	/* misc. flags */
558 
559 	void		*_dm_cookie;	/* cookie for bus-specific functions */
560 
561 	/*
562 	 * PUBLIC MEMBERS: these are used by machine-independent code.
563 	 */
564 	bus_size_t	dm_mapsize;	/* size of the mapping */
565 	int		dm_nsegs;	/* # valid segments in mapping */
566 	bus_dma_segment_t dm_segs[1];	/* segments; variable length */
567 };
568 
569 #if defined(_LANDISK_BUS_DMA_PRIVATE)
570 int	_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
571 	    bus_size_t, int, bus_dmamap_t *);
572 void	_bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
573 int	_bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, bus_size_t,
574 	    struct proc *, int);
575 int	_bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *,int);
576 int	_bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int);
577 int	_bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, bus_dma_segment_t *,
578 	    int, bus_size_t, int);
579 void	_bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
580 void	_bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
581 	    bus_size_t, int);
582 
583 int	_bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
584 	    bus_size_t alignment, bus_size_t boundary, bus_dma_segment_t *segs,
585 	    int nsegs, int *rsegs, int flags);
586 void	_bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
587 	    int nsegs);
588 int	_bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, int nsegs,
589 	    size_t size, caddr_t *kvap, int flags);
590 void	_bus_dmamem_unmap(bus_dma_tag_t tag, caddr_t kva, size_t size);
591 paddr_t	_bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
592 	    int nsegs, off_t off, int prot, int flags);
593 #endif	/* _LANDISK_BUS_DMA_PRIVATE */
594 
595 #endif /* _KERNEL */
596 
597 #endif	/* _MACHINE_BUS_H_ */
598