xref: /openbsd/sys/dev/fdt/sxisid.c (revision 9fdf0c62)
1 /*	$OpenBSD: sxisid.c,v 1.4 2021/10/24 17:52:27 mpi Exp $	*/
2 /*
3  * Copyright (c) 2019 Krystian Lewandowski
4  * Copyright (c) 2019 Mark Kettenis <kettenis@openbsd.org>
5  *
6  * Permission to use, copy, modify, and distribute this software for any
7  * purpose with or without fee is hereby granted, provided that the above
8  * copyright notice and this permission notice appear in all copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 #include <sys/param.h>
20 #include <sys/systm.h>
21 #include <sys/device.h>
22 #include <sys/malloc.h>
23 #include <sys/mutex.h>
24 
25 #include <machine/fdt.h>
26 #include <machine/bus.h>
27 
28 #include <dev/ofw/openfirm.h>
29 #include <dev/ofw/ofw_misc.h>
30 #include <dev/ofw/fdt.h>
31 
32 /* Registers */
33 #define SID_PRCTL		0x40
34 #define  SID_PRCTL_OFFSET(n)	(((n) & 0x1ff) << 16)
35 #define  SID_PRCTL_OP_LOCK	(0xac << 8)
36 #define  SID_PRCTL_READ		(1 << 1)
37 #define SID_RDKEY		0x60
38 
39 #define HREAD4(sc, reg)							\
40 	(bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)))
41 #define HWRITE4(sc, reg, val)						\
42 	bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
43 
44 struct sxisid_softc {
45 	struct device		sc_dev;
46 	bus_space_tag_t		sc_iot;
47 	bus_space_handle_t 	sc_ioh;
48 
49 	bus_size_t		sc_size;
50 	struct nvmem_device	sc_nd;
51 };
52 
53 int sxisid_match(struct device *, void *, void *);
54 void sxisid_attach(struct device *, struct device *, void *);
55 
56 const struct cfattach sxisid_ca = {
57 	sizeof(struct sxisid_softc), sxisid_match, sxisid_attach
58 };
59 
60 struct cfdriver sxisid_cd = {
61 	NULL, "sxisid", DV_DULL
62 };
63 
64 int	sxisid_read(void *, bus_addr_t, void *, bus_size_t);
65 
66 int
sxisid_match(struct device * parent,void * match,void * aux)67 sxisid_match(struct device *parent, void *match, void *aux)
68 {
69 	struct fdt_attach_args *faa = aux;
70 
71 	return (OF_is_compatible(faa->fa_node, "allwinner,sun4i-a10-sid") ||
72 	    OF_is_compatible(faa->fa_node, "allwinner,sun7i-a20-sid") ||
73 	    OF_is_compatible(faa->fa_node, "allwinner,sun8i-a83t-sid") ||
74 	    OF_is_compatible(faa->fa_node, "allwinner,sun8i-h3-sid") ||
75 	    OF_is_compatible(faa->fa_node, "allwinner,sun50i-a64-sid") ||
76 	    OF_is_compatible(faa->fa_node, "allwinner,sun50i-h5-sid") ||
77 	    OF_is_compatible(faa->fa_node, "allwinner,sun50i-h6-sid"));
78 }
79 
80 void
sxisid_attach(struct device * parent,struct device * self,void * aux)81 sxisid_attach(struct device *parent, struct device *self, void *aux)
82 {
83 	struct sxisid_softc *sc = (struct sxisid_softc *) self;
84 	struct fdt_attach_args *faa = aux;
85 	uint32_t sid[4];
86 	int i;
87 
88 	if (faa->fa_nreg < 1) {
89 		printf(": no registers\n");
90 		return;
91 	}
92 
93 	sc->sc_iot = faa->fa_iot;
94 	if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr,
95 	    faa->fa_reg[0].size, 0, &sc->sc_ioh)) {
96 		printf(": can't map registers\n");
97 		return;
98 	}
99 
100 	printf("\n");
101 
102 	if (OF_is_compatible(faa->fa_node, "allwinner,sun4i-a10-sid"))
103 		sc->sc_size = 0x10;
104 	else if (OF_is_compatible(faa->fa_node, "allwinner,sun8i-a83t-sid") ||
105 	    OF_is_compatible(faa->fa_node, "allwinner,sun8i-h3-sid") ||
106 	    OF_is_compatible(faa->fa_node, "allwinner,sun50i-a64-sid") ||
107 	    OF_is_compatible(faa->fa_node, "allwinner,sun50i-h5-sid"))
108 		sc->sc_size = 0x100;
109 	else
110 		sc->sc_size = 0x200;
111 
112 	if (sxisid_read(sc, 0, &sid, sizeof(sid)))
113 		return;
114 
115 	for (i = 0; i < nitems(sid); i++)
116 		enqueue_randomness(sid[i]);
117 
118 	sc->sc_nd.nd_node = faa->fa_node;
119 	sc->sc_nd.nd_cookie = sc;
120 	sc->sc_nd.nd_read = sxisid_read;
121 	nvmem_register(&sc->sc_nd);
122 }
123 
124 int
sxisid_read(void * cookie,bus_addr_t addr,void * data,bus_size_t size)125 sxisid_read(void *cookie, bus_addr_t addr, void *data, bus_size_t size)
126 {
127 	struct sxisid_softc *sc = cookie;
128 	uint8_t *buf = data;
129 	uint32_t val;
130 	int pos, timo, i;
131 
132 	if (addr >= sc->sc_size || addr + size > sc->sc_size)
133 		return EINVAL;
134 
135 	pos = 0;
136 	while (pos < size) {
137 		HWRITE4(sc, SID_PRCTL, SID_PRCTL_OFFSET(addr) |
138 		    SID_PRCTL_OP_LOCK | SID_PRCTL_READ);
139 
140 		for (timo = 2500; timo > 0; timo--) {
141 			if ((HREAD4(sc, SID_PRCTL) & SID_PRCTL_READ) == 0)
142 				break;
143 			delay(100);
144 		}
145 		if (timo == 0)
146 			return EIO;
147 
148 		val = HREAD4(sc, SID_RDKEY);
149 		for (i = 0; i < 4 && pos < size; i++) {
150 			buf[pos++] = val & 0xff;
151 			val >>= 8;
152 			addr++;
153 		}
154 	}
155 
156 	return 0;
157 }
158