1 /* $OpenBSD: eephy.c,v 1.50 2010/11/23 06:59:27 kevlo Exp $ */ 2 /* 3 * Principal Author: Parag Patel 4 * Copyright (c) 2001 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice unmodified, this list of conditions, and the following 12 * disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * Additonal Copyright (c) 2001 by Traakan Software under same licence. 30 * Secondary Author: Matthew Jacob 31 */ 32 33 /* 34 * driver for the Marvell 88E1000 series external 1000/100/10-BT PHY. 35 */ 36 37 /* 38 * Support added for the Marvell 88E1011 (Alaska) 1000/100/10baseTX and 39 * 1000baseSX PHY. 40 * Nathan Binkert <nate@openbsd.org> 41 */ 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/kernel.h> 46 #include <sys/device.h> 47 #include <sys/socket.h> 48 #include <sys/proc.h> 49 50 #include <net/if.h> 51 #include <net/if_media.h> 52 53 #include <dev/mii/mii.h> 54 #include <dev/mii/miivar.h> 55 #include <dev/mii/miidevs.h> 56 57 #include <dev/mii/eephyreg.h> 58 59 int eephy_match(struct device *, void *, void *); 60 void eephy_attach(struct device *, struct device *, void *); 61 int eephy_activate(struct device *, int); 62 63 struct cfattach eephy_ca = { 64 sizeof (struct mii_softc), eephy_match, eephy_attach, 65 mii_phy_detach, eephy_activate 66 }; 67 68 struct cfdriver eephy_cd = { 69 NULL, "eephy", DV_DULL 70 }; 71 72 void eephy_init(struct mii_softc *); 73 int eephy_service(struct mii_softc *, struct mii_data *, int); 74 void eephy_status(struct mii_softc *); 75 void eephy_reset(struct mii_softc *); 76 77 const struct mii_phy_funcs eephy_funcs = { 78 eephy_service, eephy_status, eephy_reset, 79 }; 80 81 static const struct mii_phydesc eephys[] = { 82 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1000_1, 83 MII_STR_MARVELL_E1000_1 }, 84 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1000_2, 85 MII_STR_MARVELL_E1000_2 }, 86 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1000_3, 87 MII_STR_MARVELL_E1000_3 }, 88 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1000_4, 89 MII_STR_MARVELL_E1000_4 }, 90 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1000S, 91 MII_STR_MARVELL_E1000S }, 92 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1011, 93 MII_STR_MARVELL_E1011 }, 94 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1111, 95 MII_STR_MARVELL_E1111 }, 96 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1112, 97 MII_STR_MARVELL_E1112 }, 98 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1116, 99 MII_STR_MARVELL_E1116 }, 100 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1116R, 101 MII_STR_MARVELL_E1116R }, 102 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1118, 103 MII_STR_MARVELL_E1118 }, 104 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E1149, 105 MII_STR_MARVELL_E1149 }, 106 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E3016, 107 MII_STR_MARVELL_E3016}, 108 { MII_OUI_MARVELL, MII_MODEL_MARVELL_E3082, 109 MII_STR_MARVELL_E3082 }, 110 { MII_OUI_MARVELL, MII_MODEL_MARVELL_PHYG65G, 111 MII_STR_MARVELL_PHYG65G }, 112 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1000_5, 113 MII_STR_xxMARVELL_E1000_5 }, 114 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1000_6, 115 MII_STR_xxMARVELL_E1000_6 }, 116 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1000_7, 117 MII_STR_xxMARVELL_E1000_7 }, 118 { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1111, 119 MII_STR_xxMARVELL_E1111 }, 120 121 { 0, 0, 122 NULL }, 123 }; 124 125 int 126 eephy_match(struct device *parent, void *match, void *aux) 127 { 128 struct mii_attach_args *ma = aux; 129 130 if (mii_phy_match(ma, eephys) != NULL) 131 return (10); 132 133 return (0); 134 } 135 136 void 137 eephy_attach(struct device *parent, struct device *self, void *aux) 138 { 139 struct mii_softc *sc = (struct mii_softc *)self; 140 struct mii_attach_args *ma = aux; 141 struct mii_data *mii = ma->mii_data; 142 const struct mii_phydesc *mpd; 143 int reg, page; 144 145 mpd = mii_phy_match(ma, eephys); 146 printf(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2)); 147 148 sc->mii_inst = mii->mii_instance; 149 sc->mii_phy = ma->mii_phyno; 150 sc->mii_funcs = &eephy_funcs; 151 sc->mii_model = MII_MODEL(ma->mii_id2); 152 sc->mii_pdata = mii; 153 sc->mii_flags = ma->mii_flags; 154 155 /* XXX No loopback support yet, although the hardware can do it. */ 156 sc->mii_flags |= MIIF_NOLOOP; 157 158 /* Make sure page 0 is selected. */ 159 PHY_WRITE(sc, E1000_EADR, 0); 160 161 /* Switch to copper-only mode if necessary. */ 162 if (sc->mii_model == MII_MODEL_MARVELL_E1111 && 163 (sc->mii_flags & MIIF_HAVEFIBER) == 0) { 164 /* 165 * The onboard 88E1111 PHYs on the Sun X4100 M2 come 166 * up with fiber/copper auto-selection enabled, even 167 * though the machine only has copper ports. This 168 * makes the chip autoselect to 1000baseX, and makes 169 * it impossible to select any other media. So 170 * disable fiber/copper autoselection. 171 */ 172 reg = PHY_READ(sc, E1000_ESSR); 173 if ((reg & E1000_ESSR_HWCFG_MODE) == E1000_ESSR_RGMII_COPPER) { 174 reg |= E1000_ESSR_DIS_FC; 175 PHY_WRITE(sc, E1000_ESSR, reg); 176 177 PHY_RESET(sc); 178 } 179 } 180 181 /* Switch to fiber-only mode if necessary. */ 182 if (sc->mii_model == MII_MODEL_MARVELL_E1112 && 183 sc->mii_flags & MIIF_HAVEFIBER) { 184 page = PHY_READ(sc, E1000_EADR); 185 PHY_WRITE(sc, E1000_EADR, 2); 186 reg = PHY_READ(sc, E1000_SCR); 187 reg &= ~E1000_SCR_MODE_MASK; 188 reg |= E1000_SCR_MODE_1000BX; 189 PHY_WRITE(sc, E1000_SCR, reg); 190 PHY_WRITE(sc, E1000_EADR, page); 191 192 PHY_RESET(sc); 193 } 194 195 sc->mii_capabilities = PHY_READ(sc, E1000_SR) & ma->mii_capmask; 196 if (sc->mii_capabilities & BMSR_EXTSTAT) 197 sc->mii_extcapabilities = PHY_READ(sc, E1000_ESR); 198 199 mii_phy_add_media(sc); 200 201 eephy_init(sc); 202 } 203 204 int 205 eephy_activate(struct device *self, int act) 206 { 207 struct mii_softc *sc = (void *)self; 208 209 switch (act) { 210 case DVACT_SUSPEND: 211 break; 212 case DVACT_RESUME: 213 eephy_init(sc); 214 break; 215 } 216 217 return (0); 218 } 219 220 void 221 eephy_init(struct mii_softc *sc) 222 { 223 int reg; 224 225 /* 226 * Initialize PHY Specific Control Register. 227 */ 228 229 reg = PHY_READ(sc, E1000_SCR); 230 231 /* Assert CRS on transmit. */ 232 reg |= E1000_SCR_ASSERT_CRS_ON_TX; 233 234 /* Enable auto crossover. */ 235 switch (sc->mii_model) { 236 case MII_MODEL_MARVELL_E3016: 237 case MII_MODEL_MARVELL_E3082: 238 /* Bits are in a different position. */ 239 reg |= (E1000_SCR_AUTO_X_MODE >> 1); 240 break; 241 default: 242 /* Automatic crossover causes problems for 1000baseX. */ 243 if (sc->mii_flags & MIIF_IS_1000X) 244 reg &= ~E1000_SCR_AUTO_X_MODE; 245 else 246 reg |= E1000_SCR_AUTO_X_MODE; 247 } 248 249 /* Disable energy detect; only available on some models. */ 250 switch(sc->mii_model) { 251 case MII_MODEL_MARVELL_E3016: 252 reg &= ~E3000_SCR_EN_DETECT_MASK; 253 break; 254 case MII_MODEL_MARVELL_E1011: 255 case MII_MODEL_MARVELL_E1111: 256 case MII_MODEL_MARVELL_E1112: 257 case MII_MODEL_MARVELL_PHYG65G: 258 reg &= ~E1000_SCR_EN_DETECT_MASK; 259 break; 260 } 261 262 /* Enable scrambler if necessary. */ 263 if (sc->mii_model == MII_MODEL_MARVELL_E3016) 264 reg &= ~E3000_SCR_SCRAMBLER_DISABLE; 265 266 /* 267 * Store next page in the Link Partner Next Page register for 268 * compatibility with 802.3ab. 269 */ 270 if (sc->mii_model == MII_MODEL_MARVELL_E3016) 271 reg |= E3000_SCR_REG8_NEXT_PAGE; 272 273 PHY_WRITE(sc, E1000_SCR, reg); 274 275 /* 25 MHz TX_CLK should always work. */ 276 reg = PHY_READ(sc, E1000_ESCR); 277 reg |= E1000_ESCR_TX_CLK_25; 278 PHY_WRITE(sc, E1000_ESCR, reg); 279 280 /* Configure LEDs if they were left unconfigured. */ 281 if (sc->mii_model == MII_MODEL_MARVELL_E3016 && 282 PHY_READ(sc, 0x16) == 0) { 283 reg = (0x0b << 8) | (0x05 << 4) | 0x04; /* XXX */ 284 PHY_WRITE(sc, 0x16, reg); 285 } 286 287 /* 288 * Do a software reset for these settings to take effect. 289 * Disable autonegotiation, such that all capabilities get 290 * advertised when it is switched back on. 291 */ 292 reg = PHY_READ(sc, E1000_CR); 293 reg &= ~E1000_CR_AUTO_NEG_ENABLE; 294 PHY_WRITE(sc, E1000_CR, reg | E1000_CR_RESET); 295 } 296 297 void 298 eephy_reset(struct mii_softc *sc) 299 { 300 int reg, i; 301 302 reg = PHY_READ(sc, E1000_CR); 303 reg |= E1000_CR_RESET; 304 PHY_WRITE(sc, E1000_CR, reg); 305 306 for (i = 0; i < 500; i++) { 307 DELAY(1); 308 reg = PHY_READ(sc, E1000_CR); 309 if (!(reg & E1000_CR_RESET)) 310 break; 311 } 312 } 313 314 int 315 eephy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 316 { 317 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 318 int bmcr; 319 320 if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0) 321 return (ENXIO); 322 323 switch (cmd) { 324 case MII_POLLSTAT: 325 /* 326 * If we're not polling our PHY instance, just return. 327 */ 328 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 329 return (0); 330 break; 331 332 case MII_MEDIACHG: 333 /* 334 * If the media indicates a different PHY instance, 335 * isolate ourselves. 336 */ 337 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 338 bmcr = PHY_READ(sc, E1000_CR); 339 PHY_WRITE(sc, E1000_CR, bmcr | E1000_CR_ISOLATE); 340 return (0); 341 } 342 343 /* 344 * If the interface is not up, don't do anything. 345 */ 346 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 347 break; 348 349 mii_phy_setmedia(sc); 350 351 /* 352 * If autonegitation is not enabled, we need a 353 * software reset for the settings to take effect. 354 */ 355 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 356 bmcr = PHY_READ(sc, E1000_CR); 357 PHY_WRITE(sc, E1000_CR, bmcr | E1000_CR_RESET); 358 } 359 break; 360 361 case MII_TICK: 362 /* 363 * If we're not currently selected, just return. 364 */ 365 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 366 return (0); 367 368 if (mii_phy_tick(sc) == EJUSTRETURN) 369 return (0); 370 break; 371 372 case MII_DOWN: 373 mii_phy_down(sc); 374 return (0); 375 } 376 377 /* Update the media status. */ 378 mii_phy_status(sc); 379 380 /* Callback if something changed. */ 381 mii_phy_update(sc, cmd); 382 return (0); 383 } 384 385 void 386 eephy_status(struct mii_softc *sc) 387 { 388 struct mii_data *mii = sc->mii_pdata; 389 int bmcr, gsr, ssr; 390 391 mii->mii_media_status = IFM_AVALID; 392 mii->mii_media_active = IFM_ETHER; 393 394 bmcr = PHY_READ(sc, E1000_CR); 395 ssr = PHY_READ(sc, E1000_SSR); 396 397 if (ssr & E1000_SSR_LINK) 398 mii->mii_media_status |= IFM_ACTIVE; 399 400 if (bmcr & E1000_CR_LOOPBACK) 401 mii->mii_media_active |= IFM_LOOP; 402 403 if (!(ssr & E1000_SSR_SPD_DPLX_RESOLVED)) { 404 /* Erg, still trying, I guess... */ 405 mii->mii_media_active |= IFM_NONE; 406 return; 407 } 408 409 if (sc->mii_flags & MIIF_IS_1000X) { 410 mii->mii_media_active |= IFM_1000_SX; 411 } else { 412 if (ssr & E1000_SSR_1000MBS) 413 mii->mii_media_active |= IFM_1000_T; 414 else if (ssr & E1000_SSR_100MBS) 415 mii->mii_media_active |= IFM_100_TX; 416 else 417 mii->mii_media_active |= IFM_10_T; 418 } 419 420 if (ssr & E1000_SSR_DUPLEX) 421 mii->mii_media_active |= mii_phy_flowstatus(sc) | IFM_FDX; 422 else 423 mii->mii_media_active |= IFM_HDX; 424 425 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) { 426 gsr = PHY_READ(sc, E1000_1GSR) | PHY_READ(sc, E1000_1GSR); 427 if (gsr & E1000_1GSR_MS_CONFIG_RES) 428 mii->mii_media_active |= IFM_ETH_MASTER; 429 } 430 } 431