1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Copyright © 2019 Intel Corporation
4 */
5
6 #ifndef __INTEL_DP_H__
7 #define __INTEL_DP_H__
8
9 #include <linux/types.h>
10
11 #define drm_i915_private inteldrm_softc
12
13 enum intel_output_format;
14 enum pipe;
15 enum port;
16 struct drm_connector_state;
17 struct drm_encoder;
18 struct drm_i915_private;
19 struct drm_modeset_acquire_ctx;
20 struct drm_dp_vsc_sdp;
21 struct intel_atomic_state;
22 struct intel_connector;
23 struct intel_crtc_state;
24 struct intel_digital_port;
25 struct intel_dp;
26 struct intel_encoder;
27
28 struct link_config_limits {
29 int min_rate, max_rate;
30 int min_lane_count, max_lane_count;
31 int min_bpp, max_bpp;
32 };
33
34 void intel_edp_fixup_vbt_bpp(struct intel_encoder *encoder, int pipe_bpp);
35 void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
36 struct intel_crtc_state *pipe_config,
37 struct link_config_limits *limits);
38 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
39 const struct drm_connector_state *conn_state);
40 int intel_dp_min_bpp(enum intel_output_format output_format);
41 bool intel_dp_init_connector(struct intel_digital_port *dig_port,
42 struct intel_connector *intel_connector);
43 void intel_dp_set_link_params(struct intel_dp *intel_dp,
44 int link_rate, int lane_count);
45 int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
46 int link_rate, u8 lane_count);
47 int intel_dp_get_active_pipes(struct intel_dp *intel_dp,
48 struct drm_modeset_acquire_ctx *ctx,
49 u8 *pipe_mask);
50 int intel_dp_retrain_link(struct intel_encoder *encoder,
51 struct drm_modeset_acquire_ctx *ctx);
52 void intel_dp_set_power(struct intel_dp *intel_dp, u8 mode);
53 void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
54 const struct intel_crtc_state *crtc_state);
55 void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
56 const struct intel_crtc_state *crtc_state,
57 bool enable);
58 void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
59 void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder);
60 void intel_dp_encoder_flush_work(struct drm_encoder *encoder);
61 int intel_dp_compute_config(struct intel_encoder *encoder,
62 struct intel_crtc_state *pipe_config,
63 struct drm_connector_state *conn_state);
64 int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
65 struct intel_crtc_state *pipe_config,
66 struct drm_connector_state *conn_state,
67 struct link_config_limits *limits,
68 int timeslots,
69 bool recompute_pipe_bpp);
70 bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp);
71 bool intel_dp_is_edp(struct intel_dp *intel_dp);
72 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
73 bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
74 enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port,
75 bool long_hpd);
76 void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
77 const struct drm_connector_state *conn_state);
78 void intel_edp_backlight_off(const struct drm_connector_state *conn_state);
79 void intel_edp_fixup_vbt_bpp(struct intel_encoder *encoder, int pipe_bpp);
80 void intel_dp_mst_suspend(struct drm_i915_private *dev_priv);
81 void intel_dp_mst_resume(struct drm_i915_private *dev_priv);
82 int intel_dp_max_link_rate(struct intel_dp *intel_dp);
83 int intel_dp_max_lane_count(struct intel_dp *intel_dp);
84 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate);
85
86 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
87 u8 *link_bw, u8 *rate_select);
88 bool intel_dp_source_supports_tps3(struct drm_i915_private *i915);
89 bool intel_dp_source_supports_tps4(struct drm_i915_private *i915);
90
91 bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
92 int intel_dp_link_required(int pixel_clock, int bpp);
93 int intel_dp_max_data_rate(int max_link_rate, int max_lanes);
94 bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp);
95 bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
96 const struct drm_connector_state *conn_state);
97 void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
98 const struct intel_crtc_state *crtc_state,
99 const struct drm_connector_state *conn_state,
100 struct drm_dp_vsc_sdp *vsc);
101 void intel_write_dp_vsc_sdp(struct intel_encoder *encoder,
102 const struct intel_crtc_state *crtc_state,
103 const struct drm_dp_vsc_sdp *vsc);
104 void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable,
105 const struct intel_crtc_state *crtc_state,
106 const struct drm_connector_state *conn_state);
107 void intel_read_dp_sdp(struct intel_encoder *encoder,
108 struct intel_crtc_state *crtc_state,
109 unsigned int type);
110 bool intel_digital_port_connected(struct intel_encoder *encoder);
111 int intel_dp_dsc_compute_bpp(struct intel_dp *intel_dp, u8 dsc_max_bpc);
112 u16 intel_dp_dsc_get_output_bpp(struct drm_i915_private *i915,
113 u32 link_clock, u32 lane_count,
114 u32 mode_clock, u32 mode_hdisplay,
115 bool bigjoiner,
116 u32 pipe_bpp,
117 u32 timeslots);
118 u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp,
119 int mode_clock, int mode_hdisplay,
120 bool bigjoiner);
121 bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp,
122 int hdisplay, int clock);
123
intel_dp_unused_lane_mask(int lane_count)124 static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
125 {
126 return ~((1 << lane_count) - 1) & 0xf;
127 }
128
129 u32 intel_dp_mode_to_fec_clock(u32 mode_clock);
130 u32 intel_dp_dsc_nearest_valid_bpp(struct drm_i915_private *i915, u32 bpp, u32 pipe_bpp);
131
132 void intel_ddi_update_pipe(struct intel_atomic_state *state,
133 struct intel_encoder *encoder,
134 const struct intel_crtc_state *crtc_state,
135 const struct drm_connector_state *conn_state);
136
137 bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
138 struct intel_crtc_state *crtc_state);
139 void intel_dp_sync_state(struct intel_encoder *encoder,
140 const struct intel_crtc_state *crtc_state);
141
142 void intel_dp_check_frl_training(struct intel_dp *intel_dp);
143 void intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp,
144 const struct intel_crtc_state *crtc_state);
145 void intel_dp_phy_test(struct intel_encoder *encoder);
146
147 void intel_dp_wait_source_oui(struct intel_dp *intel_dp);
148
149 #endif /* __INTEL_DP_H__ */
150