1 /* $OpenBSD: pci.h,v 1.12 2024/10/02 17:05:56 dv Exp $ */ 2 3 /* 4 * Copyright (c) 2015 Mike Larkin <mlarkin@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include <sys/types.h> 20 21 #include <dev/pci/pcireg.h> 22 23 #include "vmd.h" 24 25 #ifndef _PCI_H_ 26 #define _PCI_H_ 27 28 #define PCI_MODE1_ENABLE 0x80000000UL 29 #define PCI_MODE1_ADDRESS_REG 0x0cf8 30 #define PCI_MODE1_DATA_REG 0x0cfc 31 #define PCI_CONFIG_MAX_DEV 32 32 #define PCI_MAX_BARS 6 33 34 #define PCI_BAR_TYPE_IO 0x0 35 #define PCI_BAR_TYPE_MMIO 0x1 36 37 #define PCI_MMIO_BAR_BASE 0xF0000000ULL 38 #define PCI_MMIO_BAR_END 0xFFDFFFFFULL /* 2 MiB below 4 GiB */ 39 40 #define PCI_MAX_PIC_IRQS 10 41 42 typedef int (*pci_cs_fn_t)(int dir, uint8_t reg, uint32_t *data); 43 typedef int (*pci_iobar_fn_t)(int dir, uint16_t reg, uint32_t *data, uint8_t *, 44 void *, uint8_t); 45 typedef int (*pci_mmiobar_fn_t)(int dir, uint32_t ofs, uint32_t *data); 46 47 48 struct pci_dev { 49 union { 50 uint32_t pd_cfg_space[PCI_CONFIG_SPACE_SIZE / 4]; 51 struct { 52 uint16_t pd_vid; 53 uint16_t pd_did; 54 uint16_t pd_cmd; 55 uint16_t pd_status; 56 uint8_t pd_rev; 57 uint8_t pd_prog_if; 58 uint8_t pd_subclass; 59 uint8_t pd_class; 60 uint8_t pd_cache_size; 61 uint8_t pd_lat_timer; 62 uint8_t pd_header_type; 63 uint8_t pd_bist; 64 uint32_t pd_bar[PCI_MAX_BARS]; 65 uint32_t pd_cardbus_cis; 66 uint16_t pd_subsys_vid; 67 uint16_t pd_subsys_id; 68 uint32_t pd_exp_rom_addr; 69 uint8_t pd_cap; 70 uint32_t pd_reserved0 : 24; 71 uint32_t pd_reserved1; 72 uint8_t pd_irq; 73 uint8_t pd_int; 74 uint8_t pd_min_grant; 75 uint8_t pd_max_grant; 76 } __packed; 77 }; 78 uint8_t pd_bar_ct; 79 pci_cs_fn_t pd_csfunc; 80 81 uint8_t pd_bartype[PCI_MAX_BARS]; 82 uint32_t pd_barsize[PCI_MAX_BARS]; 83 void *pd_barfunc[PCI_MAX_BARS]; 84 void *pd_bar_cookie[PCI_MAX_BARS]; 85 }; 86 87 struct pci { 88 uint8_t pci_dev_ct; 89 uint64_t pci_next_mmio_bar; 90 uint64_t pci_next_io_bar; 91 uint8_t pci_next_pic_irq; 92 uint32_t pci_addr_reg; 93 uint32_t pci_data_reg; 94 95 struct pci_dev pci_devices[PCI_CONFIG_MAX_DEV]; 96 }; 97 98 int pci_find_first_device(uint16_t); 99 void pci_init(void); 100 int pci_add_device(uint8_t *, uint16_t, uint16_t, uint8_t, uint8_t, uint16_t, 101 uint16_t, uint8_t, pci_cs_fn_t); 102 int pci_add_bar(uint8_t, uint32_t, void *, void *); 103 int pci_set_bar_fn(uint8_t, uint8_t, void *, void *); 104 uint8_t pci_get_dev_irq(uint8_t); 105 int pci_dump(int); 106 int pci_restore(int); 107 108 #ifdef __amd64__ 109 void pci_handle_address_reg(struct vm_run_params *); 110 void pci_handle_data_reg(struct vm_run_params *); 111 uint8_t pci_handle_io(struct vm_run_params *); 112 #endif /* __amd64__ */ 113 114 #endif /* _PCI_H_ */ 115