1##Clock signal
2set_property -dict { PACKAGE_PIN K17   IOSTANDARD LVCMOS33 } [get_ports { sys_clk }]; #IO_L12P_T1_MRCC_35 Sch=sysclk
3create_clock -add -name sys_clk_pin -period 8.00 -waveform {0 4} [get_ports { sys_clk }];
4
5##Switches
6set_property -dict { PACKAGE_PIN G15   IOSTANDARD LVCMOS33 } [get_ports { in_mute }]; #IO_L19N_T3_VREF_35 Sch=sw[0]
7set_property -dict { PACKAGE_PIN P15   IOSTANDARD LVCMOS33 } [get_ports { bypass_dsp }]; #IO_L24P_T3_34 Sch=sw[1]
8set_property -dict { PACKAGE_PIN W13   IOSTANDARD LVCMOS33 } [get_ports { bypass_faust }]; #IO_L24P_T3_34 Sch=sw[1]
9set_property -dict { PACKAGE_PIN T16   IOSTANDARD LVCMOS33 } [get_ports { bypass_analog }]; #IO_L24P_T3_34 Sch=sw[1]
10
11##LEDs
12set_property -dict { PACKAGE_PIN M14   IOSTANDARD LVCMOS33 } [get_ports { i2c_done  }]; #IO_L23P_T3_35 Sch=led[0]
13set_property -dict { PACKAGE_PIN M15   IOSTANDARD LVCMOS33 } [get_ports { ack_error }]; #IO_L23N_T3_35 Sch=led[1]
14#set_property -dict { PACKAGE_PIN G14   IOSTANDARD LVCMOS33 } [get_ports { readout[1] }]; #IO_0_35 Sch=led[2]
15#set_property -dict { PACKAGE_PIN D18   IOSTANDARD LVCMOS33 } [get_ports { readout[2] }]; #IO_L3N_T0_DQS_AD1N_35 Sch=led[3]
16
17##Audio Codec
18set_property -dict { PACKAGE_PIN R19   IOSTANDARD LVCMOS33 } [get_ports { bclk }]; #IO_0_34 Sch=ac_bclk
19set_property -dict { PACKAGE_PIN R17   IOSTANDARD LVCMOS33 } [get_ports { mclk }]; #IO_L19N_T3_VREF_34 Sch=ac_mclk
20set_property -dict { PACKAGE_PIN P18   IOSTANDARD LVCMOS33 } [get_ports { out_mute }]; #IO_L23N_T3_34 Sch=ac_muten
21set_property -dict { PACKAGE_PIN R18   IOSTANDARD LVCMOS33 } [get_ports { sd_tx }]; #IO_L20N_T3_34 Sch=ac_pbdat
22set_property -dict { PACKAGE_PIN T19   IOSTANDARD LVCMOS33 } [get_ports { ws_tx }]; #IO_25_34 Sch=ac_pblrc
23set_property -dict { PACKAGE_PIN R16   IOSTANDARD LVCMOS33 } [get_ports { sd_rx }]; #IO_L19P_T3_34 Sch=ac_recdat
24set_property -dict { PACKAGE_PIN Y18   IOSTANDARD LVCMOS33 } [get_ports { ws_rx }]; #IO_L17P_T2_34 Sch=ac_reclrc
25set_property -dict { PACKAGE_PIN N18   IOSTANDARD LVCMOS33 } [get_ports { sclk }]; #IO_L13P_T2_MRCC_34 Sch=ac_scl
26set_property -dict { PACKAGE_PIN N17   IOSTANDARD LVCMOS33 } [get_ports { sdin }]; #IO_L23P_T3_34 Sch=ac_sda
27##Pmod Header JE
28set_property -dict { PACKAGE_PIN V12   IOSTANDARD LVCMOS33 } [get_ports { start }]; #IO_L4P_T0_34i Sch=je[1]
29set_property -dict { PACKAGE_PIN W16   IOSTANDARD LVCMOS33 } [get_ports { sdapmod }]; #IO_L18N_T2_34 Sch=je[2]
30set_property -dict { PACKAGE_PIN J15   IOSTANDARD LVCMOS33 } [get_ports { sclpmod }]; #IO_25_35 Sch=je[3]
31set_property -dict { PACKAGE_PIN H15   IOSTANDARD LVCMOS33 } [get_ports { wspmod }]; #IO_L19P_T3_35 Sch=je[4]
32set_property -dict { PACKAGE_PIN V13   IOSTANDARD LVCMOS33 } [get_ports { sd_rxpmod }]; #IO_L3N_T0_DQS_34 Sch=je[7]
33set_property -dict { PACKAGE_PIN U17   IOSTANDARD LVCMOS33 } [get_ports { sd_txpmod }]; #IO_L9N_T1_DQS_34 Sch=je[8]
34
35set_property -dict { PACKAGE_PIN T17   IOSTANDARD LVCMOS33 } [get_ports { bclkpmod  }]; #IO_L20P_T3_34 Sch=je[9]
36set_property -dict { PACKAGE_PIN Y17   IOSTANDARD LVCMOS33 } [get_ports { mclkpmod }]; #IO_L7N_T1_34 Sch=je[10]
37
38##Buttons
39set_property -dict { PACKAGE_PIN K18   IOSTANDARD LVCMOS33 } [get_ports { vol_up }]; #IO_L12N_T1_MRCC_35 Sch=btn[0]
40set_property -dict { PACKAGE_PIN P16   IOSTANDARD LVCMOS33 } [get_ports { vol_down }]; #IO_L24N_T3_34 Sch=btn[1]
41#set_property -dict { PACKAGE_PIN K19   IOSTANDARD LVCMOS33 } [get_ports { pushb[2] }]; #IO_L24N_T3_34 Sch=btn[1]
42set_property -dict { PACKAGE_PIN Y16   IOSTANDARD LVCMOS33 } [get_ports { reset_btn }]; #IO_L24N_T3_34 Sch=btn[1]
43