1 /** 2 ****************************************************************************** 3 * @file stm32h7xx_hal_tim_ex.h 4 * @author MCD Application Team 5 * @brief Header file of TIM HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32H7xx_HAL_TIM_EX_H 22 #define STM32H7xx_HAL_TIM_EX_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32h7xx_hal_def.h" 30 31 /** @addtogroup STM32H7xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup TIMEx 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief TIM Hall sensor Configuration Structure definition 46 */ 47 48 typedef struct 49 { 50 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. 51 This parameter can be a value of @ref TIM_Input_Capture_Polarity */ 52 53 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. 54 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ 55 56 uint32_t IC1Filter; /*!< Specifies the input capture filter. 57 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ 58 59 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 60 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 61 } TIM_HallSensor_InitTypeDef; 62 #if defined(TIM_BREAK_INPUT_SUPPORT) 63 64 /** 65 * @brief TIM Break/Break2 input configuration 66 */ 67 typedef struct 68 { 69 uint32_t Source; /*!< Specifies the source of the timer break input. 70 This parameter can be a value of @ref TIMEx_Break_Input_Source */ 71 uint32_t Enable; /*!< Specifies whether or not the break input source is enabled. 72 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */ 73 uint32_t Polarity; /*!< Specifies the break input source polarity. 74 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity 75 Not relevant when analog watchdog output of the DFSDM1 used as break input source */ 76 } 77 TIMEx_BreakInputConfigTypeDef; 78 79 #endif /* TIM_BREAK_INPUT_SUPPORT */ 80 /** 81 * @} 82 */ 83 /* End of exported types -----------------------------------------------------*/ 84 85 /* Exported constants --------------------------------------------------------*/ 86 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants 87 * @{ 88 */ 89 90 /** @defgroup TIMEx_Remap TIM Extended Remapping 91 * @{ 92 */ 93 #define TIM_TIM1_ETR_GPIO 0x00000000U /* !< TIM1_ETR is connected to GPIO */ 94 #define TIM_TIM1_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< TIM1_ETR is connected to COMP1 OUT */ 95 #define TIM_TIM1_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< TIM1_ETR is connected to COMP2 OUT */ 96 #define TIM_TIM1_ETR_ADC2_AWD1 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC2 AWD1 */ 97 #define TIM_TIM1_ETR_ADC2_AWD2 (TIM1_AF1_ETRSEL_2) /* !< TIM1_ETR is connected to ADC2 AWD2 */ 98 #define TIM_TIM1_ETR_ADC2_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC2 AWD3 */ 99 #define TIM_TIM1_ETR_ADC3_AWD1 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< TIM1_ETR is connected to ADC3 AWD1 */ 100 #define TIM_TIM1_ETR_ADC3_AWD2 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC3 AWD2 */ 101 #define TIM_TIM1_ETR_ADC3_AWD3 TIM1_AF1_ETRSEL_3 /* !< TIM1_ETR is connected to ADC3 AWD3 */ 102 103 #define TIM_TIM8_ETR_GPIO 0x00000000U /* !< TIM8_ETR is connected to GPIO */ 104 #define TIM_TIM8_ETR_COMP1 TIM8_AF1_ETRSEL_0 /* !< TIM8_ETR is connected to COMP1 OUT */ 105 #define TIM_TIM8_ETR_COMP2 TIM8_AF1_ETRSEL_1 /* !< TIM8_ETR is connected to COMP2 OUT */ 106 #define TIM_TIM8_ETR_ADC2_AWD1 (TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC2 AWD1 */ 107 #define TIM_TIM8_ETR_ADC2_AWD2 (TIM8_AF1_ETRSEL_2) /* !< TIM8_ETR is connected to ADC2 AWD2 */ 108 #define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC2 AWD3 */ 109 #define TIM_TIM8_ETR_ADC3_AWD1 (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1) /* !< TIM8_ETR is connected to ADC3 AWD1 */ 110 #define TIM_TIM8_ETR_ADC3_AWD2 (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC3 AWD2 */ 111 #define TIM_TIM8_ETR_ADC3_AWD3 TIM8_AF1_ETRSEL_3 /* !< TIM8_ETR is connected to ADC3 AWD3 */ 112 113 #define TIM_TIM2_ETR_GPIO 0x00000000U /* !< TIM2_ETR is connected to GPIO */ 114 #define TIM_TIM2_ETR_COMP1 (TIM2_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to COMP1 OUT */ 115 #define TIM_TIM2_ETR_COMP2 (TIM2_AF1_ETRSEL_1) /* !< TIM2_ETR is connected to COMP2 OUT */ 116 #define TIM_TIM2_ETR_RCC_LSE (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to RCC LSE */ 117 #define TIM_TIM2_ETR_SAI1_FSA TIM2_AF1_ETRSEL_2 /* !< TIM2_ETR is connected to SAI1 FS_A */ 118 #define TIM_TIM2_ETR_SAI1_FSB (TIM2_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to SAI1 FS_B */ 119 120 #define TIM_TIM3_ETR_GPIO 0x00000000U /* !< TIM3_ETR is connected to GPIO */ 121 #define TIM_TIM3_ETR_COMP1 TIM3_AF1_ETRSEL_0 /* !< TIM3_ETR is connected to COMP1 OUT */ 122 123 #define TIM_TIM5_ETR_GPIO 0x00000000U /* !< TIM5_ETR is connected to GPIO */ 124 #define TIM_TIM5_ETR_SAI2_FSA TIM5_AF1_ETRSEL_0 /* !< TIM5_ETR is connected to SAI2 FS_A */ 125 #define TIM_TIM5_ETR_SAI2_FSB TIM5_AF1_ETRSEL_1 /* !< TIM5_ETR is connected to SAI2 FS_B */ 126 /** 127 * @} 128 */ 129 #if defined(TIM_BREAK_INPUT_SUPPORT) 130 131 /** @defgroup TIMEx_Break_Input TIM Extended Break input 132 * @{ 133 */ 134 #define TIM_BREAKINPUT_BRK 0x00000001U /* !< Timer break input */ 135 #define TIM_BREAKINPUT_BRK2 0x00000002U /* !< Timer break2 input */ 136 /** 137 * @} 138 */ 139 140 /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source 141 * @{ 142 */ 143 #define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /* !< An external source (GPIO) is connected to the BKIN pin */ 144 #define TIM_BREAKINPUTSOURCE_COMP1 0x00000002U /* !< The COMP1 output is connected to the break input */ 145 #define TIM_BREAKINPUTSOURCE_COMP2 0x00000004U /* !< The COMP2 output is connected to the break input */ 146 #define TIM_BREAKINPUTSOURCE_DFSDM1 0x00000008U /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */ 147 /** 148 * @} 149 */ 150 151 /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling 152 * @{ 153 */ 154 #define TIM_BREAKINPUTSOURCE_DISABLE 0x00000000U /* !< Break input source is disabled */ 155 #define TIM_BREAKINPUTSOURCE_ENABLE 0x00000001U /* !< Break input source is enabled */ 156 /** 157 * @} 158 */ 159 160 /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity 161 * @{ 162 */ 163 #define TIM_BREAKINPUTSOURCE_POLARITY_LOW 0x00000001U /* !< Break input source is active low */ 164 #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH 0x00000000U /* !< Break input source is active_high */ 165 /** 166 * @} 167 */ 168 #endif /* TIM_BREAK_INPUT_SUPPORT */ 169 170 /** @defgroup TIMEx_Timer_Input_Selection TIM Extended Timer input selection 171 * @{ 172 */ 173 #define TIM_TIM1_TI1_GPIO 0x00000000U /* !< TIM1_TI1 is connected to GPIO */ 174 #define TIM_TIM1_TI1_COMP1 TIM_TISEL_TI1SEL_0 /* !< TIM1_TI1 is connected to COMP1 OUT */ 175 176 #define TIM_TIM8_TI1_GPIO 0x00000000U /* !< TIM8_TI1 is connected to GPIO */ 177 #define TIM_TIM8_TI1_COMP2 TIM_TISEL_TI1SEL_0 /* !< TIM8_TI1 is connected to COMP2 OUT */ 178 179 #define TIM_TIM2_TI4_GPIO 0x00000000U /* !< TIM2_TI4 is connected to GPIO */ 180 #define TIM_TIM2_TI4_COMP1 TIM_TISEL_TI4SEL_0 /* !< TIM2_TI4 is connected to COMP1 OUT */ 181 #define TIM_TIM2_TI4_COMP2 TIM_TISEL_TI4SEL_1 /* !< TIM2_TI4 is connected to COMP2 OUT */ 182 #define TIM_TIM2_TI4_COMP1_COMP2 (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /* !< TIM2_TI4 is connected to COMP2 OUT OR COMP2 OUT */ 183 184 #define TIM_TIM3_TI1_GPIO 0x00000000U /* !< TIM3_TI1 is connected to GPIO */ 185 #define TIM_TIM3_TI1_COMP1 TIM_TISEL_TI1SEL_0 /* !< TIM3_TI1 is connected to COMP1 OUT */ 186 #define TIM_TIM3_TI1_COMP2 TIM_TISEL_TI1SEL_1 /* !< TIM3_TI1 is connected to COMP2 OUT */ 187 #define TIM_TIM3_TI1_COMP1_COMP2 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM3_TI1 is connected to COMP2 OUT OR COMP2 OUT */ 188 189 #define TIM_TIM5_TI1_GPIO 0x00000000U /* !< TIM5_TI1 is connected to GPIO */ 190 #define TIM_TIM5_TI1_CAN_TMP TIM_TISEL_TI1SEL_0 /* !< TIM5_TI1 is connected to CAN TMP */ 191 #define TIM_TIM5_TI1_CAN_RTP TIM_TISEL_TI1SEL_1 /* !< TIM5_TI1 is connected to CAN RTP */ 192 193 #if defined(TIM12_TI1_GPIO_SUPPORT) 194 #define TIM_TIM12_TI1_GPIO 0x00000000U /* !< TIM12 TI1 is connected to GPIO */ 195 #endif /* TIM12_TI1_GPIO_SUPPORT */ 196 #if defined(TIM12_TI1_SPDIF_FS_SUPPORT) 197 #define TIM_TIM12_TI1_SPDIF_FS TIM_TISEL_TI1SEL_0 /* !< TIM12 TI1 is connected to SPDIF FS */ 198 #endif /* TIM12_TI1_SPDIF_FS_SUPPORT */ 199 200 #define TIM_TIM15_TI1_GPIO 0x00000000U /* !< TIM15_TI1 is connected to GPIO */ 201 #define TIM_TIM15_TI1_TIM2_CH1 TIM_TISEL_TI1SEL_0 /* !< TIM15_TI1 is connected to TIM2 CH1 */ 202 #define TIM_TIM15_TI1_TIM3_CH1 TIM_TISEL_TI1SEL_1 /* !< TIM15_TI1 is connected to TIM3 CH1 */ 203 #define TIM_TIM15_TI1_TIM4_CH1 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM15_TI1 is connected to TIM4 CH1 */ 204 #define TIM_TIM15_TI1_RCC_LSE (TIM_TISEL_TI1SEL_3) /* !< TIM15_TI1 is connected to RCC LSE */ 205 #define TIM_TIM15_TI1_RCC_CSI (TIM_TISEL_TI1SEL_3 | TIM_TISEL_TI1SEL_0) /* !< TIM15_TI1 is connected to RCC CSI */ 206 #define TIM_TIM15_TI1_RCC_MCO2 (TIM_TISEL_TI1SEL_3 | TIM_TISEL_TI1SEL_1) /* !< TIM15_TI1 is connected to RCC MCO2 */ 207 208 #define TIM_TIM15_TI2_GPIO 0x00000000U /* !< TIM15_TI2 is connected to GPIO */ 209 #define TIM_TIM15_TI2_TIM2_CH2 (TIM_TISEL_TI2SEL_0) /* !< TIM15_TI2 is connected to TIM2 CH2 */ 210 #define TIM_TIM15_TI2_TIM3_CH2 (TIM_TISEL_TI2SEL_1) /* !< TIM15_TI2 is connected to TIM3 CH2 */ 211 #define TIM_TIM15_TI2_TIM4_CH2 (TIM_TISEL_TI2SEL_0 | TIM_TISEL_TI2SEL_1) /* !< TIM15_TI2 is connected to TIM4 CH2 */ 212 213 #define TIM_TIM16_TI1_GPIO 0x00000000U /* !< TIM16 TI1 is connected to GPIO */ 214 #define TIM_TIM16_TI1_RCC_LSI TIM_TISEL_TI1SEL_0 /* !< TIM16 TI1 is connected to RCC LSI */ 215 #define TIM_TIM16_TI1_RCC_LSE TIM_TISEL_TI1SEL_1 /* !< TIM16 TI1 is connected to RCC LSE */ 216 #define TIM_TIM16_TI1_WKUP_IT (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM16 TI1 is connected to WKUP_IT */ 217 218 #define TIM_TIM17_TI1_GPIO 0x00000000U /* !< TIM17 TI1 is connected to GPIO */ 219 #if defined(TIM17_TI1_SPDIF_FS_SUPPORT) 220 #define TIM_TIM17_TI1_SPDIF_FS TIM_TISEL_TI1SEL_0 /* !< TIM17 TI1 is connected to SPDIF FS */ 221 #endif /* TIM17_TI1_SPDIF_FS_SUPPORT */ 222 #define TIM_TIM17_TI1_RCC_HSE1MHZ TIM_TISEL_TI1SEL_1 /* !< TIM17 TI1 is connected to RCC HSE 1Mhz */ 223 #define TIM_TIM17_TI1_RCC_MCO1 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM17 TI1 is connected to RCC MCO1 */ 224 /** 225 * @} 226 */ 227 228 /** 229 * @} 230 */ 231 /* End of exported constants -------------------------------------------------*/ 232 233 /* Exported macro ------------------------------------------------------------*/ 234 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros 235 * @{ 236 */ 237 238 /** 239 * @} 240 */ 241 /* End of exported macro -----------------------------------------------------*/ 242 243 /* Private macro -------------------------------------------------------------*/ 244 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros 245 * @{ 246 */ 247 #define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \ 248 ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2)) 249 250 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ 251 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ 252 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \ 253 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM1)) 254 255 #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \ 256 ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE)) 257 258 #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \ 259 ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH)) 260 261 #define IS_TIM_TISEL(__TISEL__) (((__TISEL__) == TIM_TIM1_TI1_GPIO) ||\ 262 ((__TISEL__) == TIM_TIM1_TI1_COMP1) ||\ 263 ((__TISEL__) == TIM_TIM8_TI1_GPIO) ||\ 264 ((__TISEL__) == TIM_TIM8_TI1_COMP2) ||\ 265 ((__TISEL__) == TIM_TIM2_TI4_GPIO) ||\ 266 ((__TISEL__) == TIM_TIM2_TI4_COMP1) ||\ 267 ((__TISEL__) == TIM_TIM2_TI4_COMP2) ||\ 268 ((__TISEL__) == TIM_TIM2_TI4_COMP1_COMP2) ||\ 269 ((__TISEL__) == TIM_TIM3_TI1_GPIO) ||\ 270 ((__TISEL__) == TIM_TIM3_TI1_COMP1) ||\ 271 ((__TISEL__) == TIM_TIM3_TI1_COMP2) ||\ 272 ((__TISEL__) == TIM_TIM3_TI1_COMP1_COMP2) ||\ 273 ((__TISEL__) == TIM_TIM5_TI1_GPIO) ||\ 274 ((__TISEL__) == TIM_TIM5_TI1_CAN_TMP) ||\ 275 ((__TISEL__) == TIM_TIM5_TI1_CAN_RTP) ||\ 276 ((__TISEL__) == TIM_TIM15_TI1_GPIO) ||\ 277 ((__TISEL__) == TIM_TIM15_TI1_TIM2_CH1) ||\ 278 ((__TISEL__) == TIM_TIM15_TI1_TIM3_CH1) ||\ 279 ((__TISEL__) == TIM_TIM15_TI1_TIM4_CH1) ||\ 280 ((__TISEL__) == TIM_TIM15_TI1_RCC_LSE) ||\ 281 ((__TISEL__) == TIM_TIM15_TI1_RCC_CSI) ||\ 282 ((__TISEL__) == TIM_TIM15_TI1_RCC_MCO2) ||\ 283 ((__TISEL__) == TIM_TIM15_TI2_GPIO) ||\ 284 ((__TISEL__) == TIM_TIM15_TI2_TIM2_CH2) ||\ 285 ((__TISEL__) == TIM_TIM15_TI2_TIM3_CH2) ||\ 286 ((__TISEL__) == TIM_TIM15_TI2_TIM4_CH2) ||\ 287 ((__TISEL__) == TIM_TIM16_TI1_GPIO) ||\ 288 ((__TISEL__) == TIM_TIM16_TI1_RCC_LSI) ||\ 289 ((__TISEL__) == TIM_TIM16_TI1_RCC_LSE) ||\ 290 ((__TISEL__) == TIM_TIM16_TI1_WKUP_IT) ||\ 291 ((__TISEL__) == TIM_TIM17_TI1_GPIO) ||\ 292 ((__TISEL__) == TIM_TIM17_TI1_SPDIF_FS) ||\ 293 ((__TISEL__) == TIM_TIM17_TI1_RCC_HSE1MHZ) ||\ 294 ((__TISEL__) == TIM_TIM17_TI1_RCC_MCO1)) 295 296 #define IS_TIM_REMAP(__RREMAP__) (((__RREMAP__) == TIM_TIM1_ETR_GPIO) ||\ 297 ((__RREMAP__) == TIM_TIM1_ETR_ADC2_AWD1) ||\ 298 ((__RREMAP__) == TIM_TIM1_ETR_ADC2_AWD2) ||\ 299 ((__RREMAP__) == TIM_TIM1_ETR_ADC2_AWD3) ||\ 300 ((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD1) ||\ 301 ((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD2) ||\ 302 ((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD3) ||\ 303 ((__RREMAP__) == TIM_TIM1_ETR_COMP1) ||\ 304 ((__RREMAP__) == TIM_TIM1_ETR_COMP2) ||\ 305 ((__RREMAP__) == TIM_TIM8_ETR_GPIO) ||\ 306 ((__RREMAP__) == TIM_TIM8_ETR_ADC2_AWD1) ||\ 307 ((__RREMAP__) == TIM_TIM8_ETR_ADC2_AWD2) ||\ 308 ((__RREMAP__) == TIM_TIM8_ETR_ADC2_AWD3) ||\ 309 ((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD1) ||\ 310 ((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD2) ||\ 311 ((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD3) ||\ 312 ((__RREMAP__) == TIM_TIM8_ETR_COMP1) ||\ 313 ((__RREMAP__) == TIM_TIM8_ETR_COMP2) ||\ 314 ((__RREMAP__) == TIM_TIM2_ETR_GPIO) ||\ 315 ((__RREMAP__) == TIM_TIM2_ETR_COMP1) ||\ 316 ((__RREMAP__) == TIM_TIM2_ETR_COMP2) ||\ 317 ((__RREMAP__) == TIM_TIM2_ETR_RCC_LSE) ||\ 318 ((__RREMAP__) == TIM_TIM2_ETR_SAI1_FSA) ||\ 319 ((__RREMAP__) == TIM_TIM2_ETR_SAI1_FSB) ||\ 320 ((__RREMAP__) == TIM_TIM3_ETR_GPIO) ||\ 321 ((__RREMAP__) == TIM_TIM3_ETR_COMP1) ||\ 322 ((__RREMAP__) == TIM_TIM5_ETR_GPIO) ||\ 323 ((__RREMAP__) == TIM_TIM5_ETR_SAI2_FSA) ||\ 324 ((__RREMAP__) == TIM_TIM5_ETR_SAI2_FSB)) 325 326 327 /** 328 * @} 329 */ 330 /* End of private macro ------------------------------------------------------*/ 331 332 /* Exported functions --------------------------------------------------------*/ 333 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions 334 * @{ 335 */ 336 337 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions 338 * @brief Timer Hall Sensor functions 339 * @{ 340 */ 341 /* Timer Hall Sensor functions **********************************************/ 342 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig); 343 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); 344 345 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim); 346 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim); 347 348 /* Blocking mode: Polling */ 349 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim); 350 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim); 351 /* Non-Blocking mode: Interrupt */ 352 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim); 353 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim); 354 /* Non-Blocking mode: DMA */ 355 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); 356 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); 357 /** 358 * @} 359 */ 360 361 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions 362 * @brief Timer Complementary Output Compare functions 363 * @{ 364 */ 365 /* Timer Complementary Output Compare functions *****************************/ 366 /* Blocking mode: Polling */ 367 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 368 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 369 370 /* Non-Blocking mode: Interrupt */ 371 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 372 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 373 374 /* Non-Blocking mode: DMA */ 375 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); 376 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 377 /** 378 * @} 379 */ 380 381 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions 382 * @brief Timer Complementary PWM functions 383 * @{ 384 */ 385 /* Timer Complementary PWM functions ****************************************/ 386 /* Blocking mode: Polling */ 387 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 388 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 389 390 /* Non-Blocking mode: Interrupt */ 391 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 392 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 393 /* Non-Blocking mode: DMA */ 394 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); 395 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 396 /** 397 * @} 398 */ 399 400 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions 401 * @brief Timer Complementary One Pulse functions 402 * @{ 403 */ 404 /* Timer Complementary One Pulse functions **********************************/ 405 /* Blocking mode: Polling */ 406 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 407 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 408 409 /* Non-Blocking mode: Interrupt */ 410 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 411 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 412 /** 413 * @} 414 */ 415 416 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions 417 * @brief Peripheral Control functions 418 * @{ 419 */ 420 /* Extended Control functions ************************************************/ 421 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 422 uint32_t CommutationSource); 423 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 424 uint32_t CommutationSource); 425 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 426 uint32_t CommutationSource); 427 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, 428 TIM_MasterConfigTypeDef *sMasterConfig); 429 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, 430 TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); 431 #if defined(TIM_BREAK_INPUT_SUPPORT) 432 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, 433 TIMEx_BreakInputConfigTypeDef *sBreakInputConfig); 434 #endif /* TIM_BREAK_INPUT_SUPPORT */ 435 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels); 436 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); 437 HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel); 438 /** 439 * @} 440 */ 441 442 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions 443 * @brief Extended Callbacks functions 444 * @{ 445 */ 446 /* Extended Callback **********************************************************/ 447 void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim); 448 void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim); 449 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim); 450 void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim); 451 /** 452 * @} 453 */ 454 455 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions 456 * @brief Extended Peripheral State functions 457 * @{ 458 */ 459 /* Extended Peripheral State functions ***************************************/ 460 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim); 461 /** 462 * @} 463 */ 464 465 /** 466 * @} 467 */ 468 /* End of exported functions -------------------------------------------------*/ 469 470 /* Private functions----------------------------------------------------------*/ 471 /** @addtogroup TIMEx_Private_Functions TIMEx Private Functions 472 * @{ 473 */ 474 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); 475 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma); 476 /** 477 * @} 478 */ 479 /* End of private functions --------------------------------------------------*/ 480 481 /** 482 * @} 483 */ 484 485 /** 486 * @} 487 */ 488 489 #ifdef __cplusplus 490 } 491 #endif 492 493 494 #endif /* STM32H7xx_HAL_TIM_EX_H */ 495 496 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 497