1 /**************************************************************************//**
2 * @file core_cmInstr.h
3 * @brief CMSIS Cortex-M Core Instruction Access Header File
4 * @version V3.00
5 * @date 07. February 2012
6 *
7 * @note
8 * Copyright (C) 2009-2012 ARM Limited. All rights reserved.
9 *
10 * @par
11 * ARM Limited (ARM) is supplying this software for use with Cortex-M
12 * processor based microcontrollers. This file can be freely distributed
13 * within development tools that are supporting such ARM based processors.
14 *
15 * @par
16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
19 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
20 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
21 *
22 ******************************************************************************/
23
24 #ifndef __CORE_CMINSTR_H
25 #define __CORE_CMINSTR_H
26
27
28 /* ########################## Core Instruction Access ######################### */
29 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
30 Access to dedicated instructions
31 @{
32 */
33
34 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
35 /* ARM armcc specific functions */
36
37 #if (__ARMCC_VERSION < 400677)
38 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
39 #endif
40
41
42 /** \brief No Operation
43
44 No Operation does nothing. This instruction can be used for code alignment purposes.
45 */
46 #define __NOP __nop
47
48
49 /** \brief Wait For Interrupt
50
51 Wait For Interrupt is a hint instruction that suspends execution
52 until one of a number of events occurs.
53 */
54 #define __WFI __wfi
55
56
57 /** \brief Wait For Event
58
59 Wait For Event is a hint instruction that permits the processor to enter
60 a low-power state until one of a number of events occurs.
61 */
62 #define __WFE __wfe
63
64
65 /** \brief Send Event
66
67 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
68 */
69 #define __SEV __sev
70
71
72 /** \brief Instruction Synchronization Barrier
73
74 Instruction Synchronization Barrier flushes the pipeline in the processor,
75 so that all instructions following the ISB are fetched from cache or
76 memory, after the instruction has been completed.
77 */
78 #define __ISB() __isb(0xF)
79
80
81 /** \brief Data Synchronization Barrier
82
83 This function acts as a special kind of Data Memory Barrier.
84 It completes when all explicit memory accesses before this instruction complete.
85 */
86 #define __DSB() __dsb(0xF)
87
88
89 /** \brief Data Memory Barrier
90
91 This function ensures the apparent order of the explicit memory operations before
92 and after the instruction, without ensuring their completion.
93 */
94 #define __DMB() __dmb(0xF)
95
96
97 /** \brief Reverse byte order (32 bit)
98
99 This function reverses the byte order in integer value.
100
101 \param [in] value Value to reverse
102 \return Reversed value
103 */
104 #define __REV __rev
105
106
107 /** \brief Reverse byte order (16 bit)
108
109 This function reverses the byte order in two unsigned short values.
110
111 \param [in] value Value to reverse
112 \return Reversed value
113 */
__REV16(uint32_t value)114 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
115 {
116 rev16 r0, r0
117 bx lr
118 }
119
120
121 /** \brief Reverse byte order in signed short value
122
123 This function reverses the byte order in a signed short value with sign extension to integer.
124
125 \param [in] value Value to reverse
126 \return Reversed value
127 */
__REVSH(int32_t value)128 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
129 {
130 revsh r0, r0
131 bx lr
132 }
133
134
135 /** \brief Rotate Right in unsigned value (32 bit)
136
137 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
138
139 \param [in] value Value to rotate
140 \param [in] value Number of Bits to rotate
141 \return Rotated value
142 */
143 #define __ROR __ror
144
145
146 #if (__CORTEX_M >= 0x03)
147
148 /** \brief Reverse bit order of value
149
150 This function reverses the bit order of the given value.
151
152 \param [in] value Value to reverse
153 \return Reversed value
154 */
155 #define __RBIT __rbit
156
157
158 /** \brief LDR Exclusive (8 bit)
159
160 This function performs a exclusive LDR command for 8 bit value.
161
162 \param [in] ptr Pointer to data
163 \return value of type uint8_t at (*ptr)
164 */
165 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
166
167
168 /** \brief LDR Exclusive (16 bit)
169
170 This function performs a exclusive LDR command for 16 bit values.
171
172 \param [in] ptr Pointer to data
173 \return value of type uint16_t at (*ptr)
174 */
175 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
176
177
178 /** \brief LDR Exclusive (32 bit)
179
180 This function performs a exclusive LDR command for 32 bit values.
181
182 \param [in] ptr Pointer to data
183 \return value of type uint32_t at (*ptr)
184 */
185 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
186
187
188 /** \brief STR Exclusive (8 bit)
189
190 This function performs a exclusive STR command for 8 bit values.
191
192 \param [in] value Value to store
193 \param [in] ptr Pointer to location
194 \return 0 Function succeeded
195 \return 1 Function failed
196 */
197 #define __STREXB(value, ptr) __strex(value, ptr)
198
199
200 /** \brief STR Exclusive (16 bit)
201
202 This function performs a exclusive STR command for 16 bit values.
203
204 \param [in] value Value to store
205 \param [in] ptr Pointer to location
206 \return 0 Function succeeded
207 \return 1 Function failed
208 */
209 #define __STREXH(value, ptr) __strex(value, ptr)
210
211
212 /** \brief STR Exclusive (32 bit)
213
214 This function performs a exclusive STR command for 32 bit values.
215
216 \param [in] value Value to store
217 \param [in] ptr Pointer to location
218 \return 0 Function succeeded
219 \return 1 Function failed
220 */
221 #define __STREXW(value, ptr) __strex(value, ptr)
222
223
224 /** \brief Remove the exclusive lock
225
226 This function removes the exclusive lock which is created by LDREX.
227
228 */
229 #define __CLREX __clrex
230
231
232 /** \brief Signed Saturate
233
234 This function saturates a signed value.
235
236 \param [in] value Value to be saturated
237 \param [in] sat Bit position to saturate to (1..32)
238 \return Saturated value
239 */
240 #define __SSAT __ssat
241
242
243 /** \brief Unsigned Saturate
244
245 This function saturates an unsigned value.
246
247 \param [in] value Value to be saturated
248 \param [in] sat Bit position to saturate to (0..31)
249 \return Saturated value
250 */
251 #define __USAT __usat
252
253
254 /** \brief Count leading zeros
255
256 This function counts the number of leading zeros of a data value.
257
258 \param [in] value Value to count the leading zeros
259 \return number of leading zeros in value
260 */
261 #define __CLZ __clz
262
263 #endif /* (__CORTEX_M >= 0x03) */
264
265
266
267 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
268 /* IAR iccarm specific functions */
269
270 #include <cmsis_iar.h>
271
272
273 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
274 /* TI CCS specific functions */
275
276 #include <cmsis_ccs.h>
277
278
279 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
280 /* GNU gcc specific functions */
281
282 /** \brief No Operation
283
284 No Operation does nothing. This instruction can be used for code alignment purposes.
285 */
__NOP(void)286 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
287 {
288 __ASM volatile ("nop");
289 }
290
291
292 /** \brief Wait For Interrupt
293
294 Wait For Interrupt is a hint instruction that suspends execution
295 until one of a number of events occurs.
296 */
__WFI(void)297 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
298 {
299 __ASM volatile ("wfi");
300 }
301
302
303 /** \brief Wait For Event
304
305 Wait For Event is a hint instruction that permits the processor to enter
306 a low-power state until one of a number of events occurs.
307 */
__WFE(void)308 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
309 {
310 __ASM volatile ("wfe");
311 }
312
313
314 /** \brief Send Event
315
316 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
317 */
__SEV(void)318 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
319 {
320 __ASM volatile ("sev");
321 }
322
323
324 /** \brief Instruction Synchronization Barrier
325
326 Instruction Synchronization Barrier flushes the pipeline in the processor,
327 so that all instructions following the ISB are fetched from cache or
328 memory, after the instruction has been completed.
329 */
__ISB(void)330 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
331 {
332 __ASM volatile ("isb");
333 }
334
335
336 /** \brief Data Synchronization Barrier
337
338 This function acts as a special kind of Data Memory Barrier.
339 It completes when all explicit memory accesses before this instruction complete.
340 */
__DSB(void)341 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
342 {
343 __ASM volatile ("dsb");
344 }
345
346
347 /** \brief Data Memory Barrier
348
349 This function ensures the apparent order of the explicit memory operations before
350 and after the instruction, without ensuring their completion.
351 */
__DMB(void)352 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
353 {
354 __ASM volatile ("dmb");
355 }
356
357
358 /** \brief Reverse byte order (32 bit)
359
360 This function reverses the byte order in integer value.
361
362 \param [in] value Value to reverse
363 \return Reversed value
364 */
__REV(uint32_t value)365 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
366 {
367 uint32_t result;
368
369 __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
370 return(result);
371 }
372
373
374 /** \brief Reverse byte order (16 bit)
375
376 This function reverses the byte order in two unsigned short values.
377
378 \param [in] value Value to reverse
379 \return Reversed value
380 */
__REV16(uint32_t value)381 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
382 {
383 uint32_t result;
384
385 __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
386 return(result);
387 }
388
389
390 /** \brief Reverse byte order in signed short value
391
392 This function reverses the byte order in a signed short value with sign extension to integer.
393
394 \param [in] value Value to reverse
395 \return Reversed value
396 */
__REVSH(int32_t value)397 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
398 {
399 uint32_t result;
400
401 __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
402 return(result);
403 }
404
405
406 /** \brief Rotate Right in unsigned value (32 bit)
407
408 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
409
410 \param [in] value Value to rotate
411 \param [in] value Number of Bits to rotate
412 \return Rotated value
413 */
__ROR(uint32_t op1,uint32_t op2)414 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
415 {
416
417 __ASM volatile ("ror %0, %0, %1" : "+r" (op1) : "r" (op2) );
418 return(op1);
419 }
420
421
422 #if (__CORTEX_M >= 0x03)
423
424 /** \brief Reverse bit order of value
425
426 This function reverses the bit order of the given value.
427
428 \param [in] value Value to reverse
429 \return Reversed value
430 */
__RBIT(uint32_t value)431 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
432 {
433 uint32_t result;
434
435 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
436 return(result);
437 }
438
439
440 /** \brief LDR Exclusive (8 bit)
441
442 This function performs a exclusive LDR command for 8 bit value.
443
444 \param [in] ptr Pointer to data
445 \return value of type uint8_t at (*ptr)
446 */
__LDREXB(volatile uint8_t * addr)447 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
448 {
449 uint8_t result;
450
451 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
452 return(result);
453 }
454
455
456 /** \brief LDR Exclusive (16 bit)
457
458 This function performs a exclusive LDR command for 16 bit values.
459
460 \param [in] ptr Pointer to data
461 \return value of type uint16_t at (*ptr)
462 */
__LDREXH(volatile uint16_t * addr)463 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
464 {
465 uint16_t result;
466
467 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
468 return(result);
469 }
470
471
472 /** \brief LDR Exclusive (32 bit)
473
474 This function performs a exclusive LDR command for 32 bit values.
475
476 \param [in] ptr Pointer to data
477 \return value of type uint32_t at (*ptr)
478 */
__LDREXW(volatile uint32_t * addr)479 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
480 {
481 uint32_t result;
482
483 __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
484 return(result);
485 }
486
487
488 /** \brief STR Exclusive (8 bit)
489
490 This function performs a exclusive STR command for 8 bit values.
491
492 \param [in] value Value to store
493 \param [in] ptr Pointer to location
494 \return 0 Function succeeded
495 \return 1 Function failed
496 */
__STREXB(uint8_t value,volatile uint8_t * addr)497 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
498 {
499 uint32_t result;
500
501 __ASM volatile ("strexb %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
502 return(result);
503 }
504
505
506 /** \brief STR Exclusive (16 bit)
507
508 This function performs a exclusive STR command for 16 bit values.
509
510 \param [in] value Value to store
511 \param [in] ptr Pointer to location
512 \return 0 Function succeeded
513 \return 1 Function failed
514 */
__STREXH(uint16_t value,volatile uint16_t * addr)515 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
516 {
517 uint32_t result;
518
519 __ASM volatile ("strexh %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
520 return(result);
521 }
522
523
524 /** \brief STR Exclusive (32 bit)
525
526 This function performs a exclusive STR command for 32 bit values.
527
528 \param [in] value Value to store
529 \param [in] ptr Pointer to location
530 \return 0 Function succeeded
531 \return 1 Function failed
532 */
__STREXW(uint32_t value,volatile uint32_t * addr)533 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
534 {
535 uint32_t result;
536
537 __ASM volatile ("strex %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
538 return(result);
539 }
540
541
542 /** \brief Remove the exclusive lock
543
544 This function removes the exclusive lock which is created by LDREX.
545
546 */
__CLREX(void)547 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
548 {
549 __ASM volatile ("clrex");
550 }
551
552
553 /** \brief Signed Saturate
554
555 This function saturates a signed value.
556
557 \param [in] value Value to be saturated
558 \param [in] sat Bit position to saturate to (1..32)
559 \return Saturated value
560 */
561 #define __SSAT(ARG1,ARG2) \
562 ({ \
563 uint32_t __RES, __ARG1 = (ARG1); \
564 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
565 __RES; \
566 })
567
568
569 /** \brief Unsigned Saturate
570
571 This function saturates an unsigned value.
572
573 \param [in] value Value to be saturated
574 \param [in] sat Bit position to saturate to (0..31)
575 \return Saturated value
576 */
577 #define __USAT(ARG1,ARG2) \
578 ({ \
579 uint32_t __RES, __ARG1 = (ARG1); \
580 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
581 __RES; \
582 })
583
584
585 /** \brief Count leading zeros
586
587 This function counts the number of leading zeros of a data value.
588
589 \param [in] value Value to count the leading zeros
590 \return number of leading zeros in value
591 */
__CLZ(uint32_t value)592 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
593 {
594 uint8_t result;
595
596 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
597 return(result);
598 }
599
600 #endif /* (__CORTEX_M >= 0x03) */
601
602
603
604
605 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
606 /* TASKING carm specific functions */
607
608 /*
609 * The CMSIS functions have been implemented as intrinsics in the compiler.
610 * Please use "carm -?i" to get an up to date list of all intrinsics,
611 * Including the CMSIS ones.
612 */
613
614 #endif
615
616 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
617
618 #endif /* __CORE_CMINSTR_H */
619