1 /** 2 ****************************************************************************** 3 * @file stm32f4xx_sdio.h 4 * @author MCD Application Team 5 * @version V1.6.1 6 * @date 21-October-2015 7 * @brief This file contains all the functions prototypes for the SDIO firmware 8 * library. 9 ****************************************************************************** 10 * @attention 11 * 12 * <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2> 13 * 14 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 * You may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at: 17 * 18 * http://www.st.com/software_license_agreement_liberty_v2 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 * 26 ****************************************************************************** 27 */ 28 29 /* Define to prevent recursive inclusion -------------------------------------*/ 30 #ifndef __STM32F4xx_SDIO_H 31 #define __STM32F4xx_SDIO_H 32 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 37 /* Includes ------------------------------------------------------------------*/ 38 #include "stm32f4xx.h" 39 40 /** @addtogroup STM32F4xx_StdPeriph_Driver 41 * @{ 42 */ 43 44 /** @addtogroup SDIO 45 * @{ 46 */ 47 48 /* Exported types ------------------------------------------------------------*/ 49 50 typedef struct 51 { 52 uint32_t SDIO_ClockEdge; /*!< Specifies the clock transition on which the bit capture is made. 53 This parameter can be a value of @ref SDIO_Clock_Edge */ 54 55 uint32_t SDIO_ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is 56 enabled or disabled. 57 This parameter can be a value of @ref SDIO_Clock_Bypass */ 58 59 uint32_t SDIO_ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or 60 disabled when the bus is idle. 61 This parameter can be a value of @ref SDIO_Clock_Power_Save */ 62 63 uint32_t SDIO_BusWide; /*!< Specifies the SDIO bus width. 64 This parameter can be a value of @ref SDIO_Bus_Wide */ 65 66 uint32_t SDIO_HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled. 67 This parameter can be a value of @ref SDIO_Hardware_Flow_Control */ 68 69 uint8_t SDIO_ClockDiv; /*!< Specifies the clock frequency of the SDIO controller. 70 This parameter can be a value between 0x00 and 0xFF. */ 71 72 } SDIO_InitTypeDef; 73 74 typedef struct 75 { 76 uint32_t SDIO_Argument; /*!< Specifies the SDIO command argument which is sent 77 to a card as part of a command message. If a command 78 contains an argument, it must be loaded into this register 79 before writing the command to the command register */ 80 81 uint32_t SDIO_CmdIndex; /*!< Specifies the SDIO command index. It must be lower than 0x40. */ 82 83 uint32_t SDIO_Response; /*!< Specifies the SDIO response type. 84 This parameter can be a value of @ref SDIO_Response_Type */ 85 86 uint32_t SDIO_Wait; /*!< Specifies whether SDIO wait for interrupt request is enabled or disabled. 87 This parameter can be a value of @ref SDIO_Wait_Interrupt_State */ 88 89 uint32_t SDIO_CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM) 90 is enabled or disabled. 91 This parameter can be a value of @ref SDIO_CPSM_State */ 92 } SDIO_CmdInitTypeDef; 93 94 typedef struct 95 { 96 uint32_t SDIO_DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */ 97 98 uint32_t SDIO_DataLength; /*!< Specifies the number of data bytes to be transferred. */ 99 100 uint32_t SDIO_DataBlockSize; /*!< Specifies the data block size for block transfer. 101 This parameter can be a value of @ref SDIO_Data_Block_Size */ 102 103 uint32_t SDIO_TransferDir; /*!< Specifies the data transfer direction, whether the transfer 104 is a read or write. 105 This parameter can be a value of @ref SDIO_Transfer_Direction */ 106 107 uint32_t SDIO_TransferMode; /*!< Specifies whether data transfer is in stream or block mode. 108 This parameter can be a value of @ref SDIO_Transfer_Type */ 109 110 uint32_t SDIO_DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM) 111 is enabled or disabled. 112 This parameter can be a value of @ref SDIO_DPSM_State */ 113 } SDIO_DataInitTypeDef; 114 115 116 /* Exported constants --------------------------------------------------------*/ 117 118 /** @defgroup SDIO_Exported_Constants 119 * @{ 120 */ 121 122 /** @defgroup SDIO_Clock_Edge 123 * @{ 124 */ 125 126 #define SDIO_ClockEdge_Rising ((uint32_t)0x00000000) 127 #define SDIO_ClockEdge_Falling ((uint32_t)0x00002000) 128 #define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_ClockEdge_Rising) || \ 129 ((EDGE) == SDIO_ClockEdge_Falling)) 130 /** 131 * @} 132 */ 133 134 /** @defgroup SDIO_Clock_Bypass 135 * @{ 136 */ 137 138 #define SDIO_ClockBypass_Disable ((uint32_t)0x00000000) 139 #define SDIO_ClockBypass_Enable ((uint32_t)0x00000400) 140 #define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClockBypass_Disable) || \ 141 ((BYPASS) == SDIO_ClockBypass_Enable)) 142 /** 143 * @} 144 */ 145 146 /** @defgroup SDIO_Clock_Power_Save 147 * @{ 148 */ 149 150 #define SDIO_ClockPowerSave_Disable ((uint32_t)0x00000000) 151 #define SDIO_ClockPowerSave_Enable ((uint32_t)0x00000200) 152 #define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_ClockPowerSave_Disable) || \ 153 ((SAVE) == SDIO_ClockPowerSave_Enable)) 154 /** 155 * @} 156 */ 157 158 /** @defgroup SDIO_Bus_Wide 159 * @{ 160 */ 161 162 #define SDIO_BusWide_1b ((uint32_t)0x00000000) 163 #define SDIO_BusWide_4b ((uint32_t)0x00000800) 164 #define SDIO_BusWide_8b ((uint32_t)0x00001000) 165 #define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BusWide_1b) || ((WIDE) == SDIO_BusWide_4b) || \ 166 ((WIDE) == SDIO_BusWide_8b)) 167 168 /** 169 * @} 170 */ 171 172 /** @defgroup SDIO_Hardware_Flow_Control 173 * @{ 174 */ 175 176 #define SDIO_HardwareFlowControl_Disable ((uint32_t)0x00000000) 177 #define SDIO_HardwareFlowControl_Enable ((uint32_t)0x00004000) 178 #define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HardwareFlowControl_Disable) || \ 179 ((CONTROL) == SDIO_HardwareFlowControl_Enable)) 180 /** 181 * @} 182 */ 183 184 /** @defgroup SDIO_Power_State 185 * @{ 186 */ 187 188 #define SDIO_PowerState_OFF ((uint32_t)0x00000000) 189 #define SDIO_PowerState_ON ((uint32_t)0x00000003) 190 #define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState_ON)) 191 /** 192 * @} 193 */ 194 195 196 /** @defgroup SDIO_Interrupt_sources 197 * @{ 198 */ 199 200 #define SDIO_IT_CCRCFAIL ((uint32_t)0x00000001) 201 #define SDIO_IT_DCRCFAIL ((uint32_t)0x00000002) 202 #define SDIO_IT_CTIMEOUT ((uint32_t)0x00000004) 203 #define SDIO_IT_DTIMEOUT ((uint32_t)0x00000008) 204 #define SDIO_IT_TXUNDERR ((uint32_t)0x00000010) 205 #define SDIO_IT_RXOVERR ((uint32_t)0x00000020) 206 #define SDIO_IT_CMDREND ((uint32_t)0x00000040) 207 #define SDIO_IT_CMDSENT ((uint32_t)0x00000080) 208 #define SDIO_IT_DATAEND ((uint32_t)0x00000100) 209 #define SDIO_IT_STBITERR ((uint32_t)0x00000200) 210 #define SDIO_IT_DBCKEND ((uint32_t)0x00000400) 211 #define SDIO_IT_CMDACT ((uint32_t)0x00000800) 212 #define SDIO_IT_TXACT ((uint32_t)0x00001000) 213 #define SDIO_IT_RXACT ((uint32_t)0x00002000) 214 #define SDIO_IT_TXFIFOHE ((uint32_t)0x00004000) 215 #define SDIO_IT_RXFIFOHF ((uint32_t)0x00008000) 216 #define SDIO_IT_TXFIFOF ((uint32_t)0x00010000) 217 #define SDIO_IT_RXFIFOF ((uint32_t)0x00020000) 218 #define SDIO_IT_TXFIFOE ((uint32_t)0x00040000) 219 #define SDIO_IT_RXFIFOE ((uint32_t)0x00080000) 220 #define SDIO_IT_TXDAVL ((uint32_t)0x00100000) 221 #define SDIO_IT_RXDAVL ((uint32_t)0x00200000) 222 #define SDIO_IT_SDIOIT ((uint32_t)0x00400000) 223 #define SDIO_IT_CEATAEND ((uint32_t)0x00800000) 224 #define IS_SDIO_IT(IT) ((((IT) & (uint32_t)0xFF000000) == 0x00) && ((IT) != (uint32_t)0x00)) 225 /** 226 * @} 227 */ 228 229 /** @defgroup SDIO_Command_Index 230 * @{ 231 */ 232 233 #define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40) 234 /** 235 * @} 236 */ 237 238 /** @defgroup SDIO_Response_Type 239 * @{ 240 */ 241 242 #define SDIO_Response_No ((uint32_t)0x00000000) 243 #define SDIO_Response_Short ((uint32_t)0x00000040) 244 #define SDIO_Response_Long ((uint32_t)0x000000C0) 245 #define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_Response_No) || \ 246 ((RESPONSE) == SDIO_Response_Short) || \ 247 ((RESPONSE) == SDIO_Response_Long)) 248 /** 249 * @} 250 */ 251 252 /** @defgroup SDIO_Wait_Interrupt_State 253 * @{ 254 */ 255 256 #define SDIO_Wait_No ((uint32_t)0x00000000) /*!< SDIO No Wait, TimeOut is enabled */ 257 #define SDIO_Wait_IT ((uint32_t)0x00000100) /*!< SDIO Wait Interrupt Request */ 258 #define SDIO_Wait_Pend ((uint32_t)0x00000200) /*!< SDIO Wait End of transfer */ 259 #define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_Wait_No) || ((WAIT) == SDIO_Wait_IT) || \ 260 ((WAIT) == SDIO_Wait_Pend)) 261 /** 262 * @} 263 */ 264 265 /** @defgroup SDIO_CPSM_State 266 * @{ 267 */ 268 269 #define SDIO_CPSM_Disable ((uint32_t)0x00000000) 270 #define SDIO_CPSM_Enable ((uint32_t)0x00000400) 271 #define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_Enable) || ((CPSM) == SDIO_CPSM_Disable)) 272 /** 273 * @} 274 */ 275 276 /** @defgroup SDIO_Response_Registers 277 * @{ 278 */ 279 280 #define SDIO_RESP1 ((uint32_t)0x00000000) 281 #define SDIO_RESP2 ((uint32_t)0x00000004) 282 #define SDIO_RESP3 ((uint32_t)0x00000008) 283 #define SDIO_RESP4 ((uint32_t)0x0000000C) 284 #define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || ((RESP) == SDIO_RESP2) || \ 285 ((RESP) == SDIO_RESP3) || ((RESP) == SDIO_RESP4)) 286 /** 287 * @} 288 */ 289 290 /** @defgroup SDIO_Data_Length 291 * @{ 292 */ 293 294 #define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF) 295 /** 296 * @} 297 */ 298 299 /** @defgroup SDIO_Data_Block_Size 300 * @{ 301 */ 302 303 #define SDIO_DataBlockSize_1b ((uint32_t)0x00000000) 304 #define SDIO_DataBlockSize_2b ((uint32_t)0x00000010) 305 #define SDIO_DataBlockSize_4b ((uint32_t)0x00000020) 306 #define SDIO_DataBlockSize_8b ((uint32_t)0x00000030) 307 #define SDIO_DataBlockSize_16b ((uint32_t)0x00000040) 308 #define SDIO_DataBlockSize_32b ((uint32_t)0x00000050) 309 #define SDIO_DataBlockSize_64b ((uint32_t)0x00000060) 310 #define SDIO_DataBlockSize_128b ((uint32_t)0x00000070) 311 #define SDIO_DataBlockSize_256b ((uint32_t)0x00000080) 312 #define SDIO_DataBlockSize_512b ((uint32_t)0x00000090) 313 #define SDIO_DataBlockSize_1024b ((uint32_t)0x000000A0) 314 #define SDIO_DataBlockSize_2048b ((uint32_t)0x000000B0) 315 #define SDIO_DataBlockSize_4096b ((uint32_t)0x000000C0) 316 #define SDIO_DataBlockSize_8192b ((uint32_t)0x000000D0) 317 #define SDIO_DataBlockSize_16384b ((uint32_t)0x000000E0) 318 #define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DataBlockSize_1b) || \ 319 ((SIZE) == SDIO_DataBlockSize_2b) || \ 320 ((SIZE) == SDIO_DataBlockSize_4b) || \ 321 ((SIZE) == SDIO_DataBlockSize_8b) || \ 322 ((SIZE) == SDIO_DataBlockSize_16b) || \ 323 ((SIZE) == SDIO_DataBlockSize_32b) || \ 324 ((SIZE) == SDIO_DataBlockSize_64b) || \ 325 ((SIZE) == SDIO_DataBlockSize_128b) || \ 326 ((SIZE) == SDIO_DataBlockSize_256b) || \ 327 ((SIZE) == SDIO_DataBlockSize_512b) || \ 328 ((SIZE) == SDIO_DataBlockSize_1024b) || \ 329 ((SIZE) == SDIO_DataBlockSize_2048b) || \ 330 ((SIZE) == SDIO_DataBlockSize_4096b) || \ 331 ((SIZE) == SDIO_DataBlockSize_8192b) || \ 332 ((SIZE) == SDIO_DataBlockSize_16384b)) 333 /** 334 * @} 335 */ 336 337 /** @defgroup SDIO_Transfer_Direction 338 * @{ 339 */ 340 341 #define SDIO_TransferDir_ToCard ((uint32_t)0x00000000) 342 #define SDIO_TransferDir_ToSDIO ((uint32_t)0x00000002) 343 #define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TransferDir_ToCard) || \ 344 ((DIR) == SDIO_TransferDir_ToSDIO)) 345 /** 346 * @} 347 */ 348 349 /** @defgroup SDIO_Transfer_Type 350 * @{ 351 */ 352 353 #define SDIO_TransferMode_Block ((uint32_t)0x00000000) 354 #define SDIO_TransferMode_Stream ((uint32_t)0x00000004) 355 #define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TransferMode_Stream) || \ 356 ((MODE) == SDIO_TransferMode_Block)) 357 /** 358 * @} 359 */ 360 361 /** @defgroup SDIO_DPSM_State 362 * @{ 363 */ 364 365 #define SDIO_DPSM_Disable ((uint32_t)0x00000000) 366 #define SDIO_DPSM_Enable ((uint32_t)0x00000001) 367 #define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_Enable) || ((DPSM) == SDIO_DPSM_Disable)) 368 /** 369 * @} 370 */ 371 372 /** @defgroup SDIO_Flags 373 * @{ 374 */ 375 376 #define SDIO_FLAG_CCRCFAIL ((uint32_t)0x00000001) 377 #define SDIO_FLAG_DCRCFAIL ((uint32_t)0x00000002) 378 #define SDIO_FLAG_CTIMEOUT ((uint32_t)0x00000004) 379 #define SDIO_FLAG_DTIMEOUT ((uint32_t)0x00000008) 380 #define SDIO_FLAG_TXUNDERR ((uint32_t)0x00000010) 381 #define SDIO_FLAG_RXOVERR ((uint32_t)0x00000020) 382 #define SDIO_FLAG_CMDREND ((uint32_t)0x00000040) 383 #define SDIO_FLAG_CMDSENT ((uint32_t)0x00000080) 384 #define SDIO_FLAG_DATAEND ((uint32_t)0x00000100) 385 #define SDIO_FLAG_STBITERR ((uint32_t)0x00000200) 386 #define SDIO_FLAG_DBCKEND ((uint32_t)0x00000400) 387 #define SDIO_FLAG_CMDACT ((uint32_t)0x00000800) 388 #define SDIO_FLAG_TXACT ((uint32_t)0x00001000) 389 #define SDIO_FLAG_RXACT ((uint32_t)0x00002000) 390 #define SDIO_FLAG_TXFIFOHE ((uint32_t)0x00004000) 391 #define SDIO_FLAG_RXFIFOHF ((uint32_t)0x00008000) 392 #define SDIO_FLAG_TXFIFOF ((uint32_t)0x00010000) 393 #define SDIO_FLAG_RXFIFOF ((uint32_t)0x00020000) 394 #define SDIO_FLAG_TXFIFOE ((uint32_t)0x00040000) 395 #define SDIO_FLAG_RXFIFOE ((uint32_t)0x00080000) 396 #define SDIO_FLAG_TXDAVL ((uint32_t)0x00100000) 397 #define SDIO_FLAG_RXDAVL ((uint32_t)0x00200000) 398 #define SDIO_FLAG_SDIOIT ((uint32_t)0x00400000) 399 #define SDIO_FLAG_CEATAEND ((uint32_t)0x00800000) 400 #define IS_SDIO_FLAG(FLAG) (((FLAG) == SDIO_FLAG_CCRCFAIL) || \ 401 ((FLAG) == SDIO_FLAG_DCRCFAIL) || \ 402 ((FLAG) == SDIO_FLAG_CTIMEOUT) || \ 403 ((FLAG) == SDIO_FLAG_DTIMEOUT) || \ 404 ((FLAG) == SDIO_FLAG_TXUNDERR) || \ 405 ((FLAG) == SDIO_FLAG_RXOVERR) || \ 406 ((FLAG) == SDIO_FLAG_CMDREND) || \ 407 ((FLAG) == SDIO_FLAG_CMDSENT) || \ 408 ((FLAG) == SDIO_FLAG_DATAEND) || \ 409 ((FLAG) == SDIO_FLAG_STBITERR) || \ 410 ((FLAG) == SDIO_FLAG_DBCKEND) || \ 411 ((FLAG) == SDIO_FLAG_CMDACT) || \ 412 ((FLAG) == SDIO_FLAG_TXACT) || \ 413 ((FLAG) == SDIO_FLAG_RXACT) || \ 414 ((FLAG) == SDIO_FLAG_TXFIFOHE) || \ 415 ((FLAG) == SDIO_FLAG_RXFIFOHF) || \ 416 ((FLAG) == SDIO_FLAG_TXFIFOF) || \ 417 ((FLAG) == SDIO_FLAG_RXFIFOF) || \ 418 ((FLAG) == SDIO_FLAG_TXFIFOE) || \ 419 ((FLAG) == SDIO_FLAG_RXFIFOE) || \ 420 ((FLAG) == SDIO_FLAG_TXDAVL) || \ 421 ((FLAG) == SDIO_FLAG_RXDAVL) || \ 422 ((FLAG) == SDIO_FLAG_SDIOIT) || \ 423 ((FLAG) == SDIO_FLAG_CEATAEND)) 424 425 #define IS_SDIO_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFF3FF800) == 0x00) && ((FLAG) != (uint32_t)0x00)) 426 427 #define IS_SDIO_GET_IT(IT) (((IT) == SDIO_IT_CCRCFAIL) || \ 428 ((IT) == SDIO_IT_DCRCFAIL) || \ 429 ((IT) == SDIO_IT_CTIMEOUT) || \ 430 ((IT) == SDIO_IT_DTIMEOUT) || \ 431 ((IT) == SDIO_IT_TXUNDERR) || \ 432 ((IT) == SDIO_IT_RXOVERR) || \ 433 ((IT) == SDIO_IT_CMDREND) || \ 434 ((IT) == SDIO_IT_CMDSENT) || \ 435 ((IT) == SDIO_IT_DATAEND) || \ 436 ((IT) == SDIO_IT_STBITERR) || \ 437 ((IT) == SDIO_IT_DBCKEND) || \ 438 ((IT) == SDIO_IT_CMDACT) || \ 439 ((IT) == SDIO_IT_TXACT) || \ 440 ((IT) == SDIO_IT_RXACT) || \ 441 ((IT) == SDIO_IT_TXFIFOHE) || \ 442 ((IT) == SDIO_IT_RXFIFOHF) || \ 443 ((IT) == SDIO_IT_TXFIFOF) || \ 444 ((IT) == SDIO_IT_RXFIFOF) || \ 445 ((IT) == SDIO_IT_TXFIFOE) || \ 446 ((IT) == SDIO_IT_RXFIFOE) || \ 447 ((IT) == SDIO_IT_TXDAVL) || \ 448 ((IT) == SDIO_IT_RXDAVL) || \ 449 ((IT) == SDIO_IT_SDIOIT) || \ 450 ((IT) == SDIO_IT_CEATAEND)) 451 452 #define IS_SDIO_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFF3FF800) == 0x00) && ((IT) != (uint32_t)0x00)) 453 454 /** 455 * @} 456 */ 457 458 /** @defgroup SDIO_Read_Wait_Mode 459 * @{ 460 */ 461 462 #define SDIO_ReadWaitMode_DATA2 ((uint32_t)0x00000000) 463 #define SDIO_ReadWaitMode_CLK ((uint32_t)0x00000001) 464 #define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_ReadWaitMode_CLK) || \ 465 ((MODE) == SDIO_ReadWaitMode_DATA2)) 466 /** 467 * @} 468 */ 469 470 /** 471 * @} 472 */ 473 474 /* Exported macro ------------------------------------------------------------*/ 475 /* Exported functions --------------------------------------------------------*/ 476 /* Function used to set the SDIO configuration to the default reset state ****/ 477 void SDIO_DeInit(void); 478 479 /* Initialization and Configuration functions *********************************/ 480 void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct); 481 void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct); 482 void SDIO_ClockCmd(FunctionalState NewState); 483 void SDIO_SetPowerState(uint32_t SDIO_PowerState); 484 uint32_t SDIO_GetPowerState(void); 485 486 /* Command path state machine (CPSM) management functions *********************/ 487 void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct); 488 void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct); 489 uint8_t SDIO_GetCommandResponse(void); 490 uint32_t SDIO_GetResponse(uint32_t SDIO_RESP); 491 492 /* Data path state machine (DPSM) management functions ************************/ 493 void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct); 494 void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct); 495 uint32_t SDIO_GetDataCounter(void); 496 uint32_t SDIO_ReadData(void); 497 void SDIO_WriteData(uint32_t Data); 498 uint32_t SDIO_GetFIFOCount(void); 499 500 /* SDIO IO Cards mode management functions ************************************/ 501 void SDIO_StartSDIOReadWait(FunctionalState NewState); 502 void SDIO_StopSDIOReadWait(FunctionalState NewState); 503 void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode); 504 void SDIO_SetSDIOOperation(FunctionalState NewState); 505 void SDIO_SendSDIOSuspendCmd(FunctionalState NewState); 506 507 /* CE-ATA mode management functions *******************************************/ 508 void SDIO_CommandCompletionCmd(FunctionalState NewState); 509 void SDIO_CEATAITCmd(FunctionalState NewState); 510 void SDIO_SendCEATACmd(FunctionalState NewState); 511 512 /* DMA transfers management functions *****************************************/ 513 void SDIO_DMACmd(FunctionalState NewState); 514 515 /* Interrupts and flags management functions **********************************/ 516 void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState); 517 FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG); 518 void SDIO_ClearFlag(uint32_t SDIO_FLAG); 519 ITStatus SDIO_GetITStatus(uint32_t SDIO_IT); 520 void SDIO_ClearITPendingBit(uint32_t SDIO_IT); 521 522 #ifdef __cplusplus 523 } 524 #endif 525 526 #endif /* __STM32F4xx_SDIO_H */ 527 528 /** 529 * @} 530 */ 531 532 /** 533 * @} 534 */ 535 536 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 537